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    • 41. 发明授权
    • Single merging bit DC-suppressed run length limited coding
    • 单合并位直流抑制运行长度限制编码
    • US5774078A
    • 1998-06-30
    • US628167
    • 1996-04-05
    • Shin-ichi TanakaToshiyuki ShimadaKoichi HirayamaHisashi Yamada
    • Shin-ichi TanakaToshiyuki ShimadaKoichi HirayamaHisashi Yamada
    • G11B20/14H03M5/14H03M7/14H04L25/49H03M5/06
    • G11B20/1426H03M5/145G11B2020/1469
    • The information to be recorded is divided into 8-bit long data words. Each data word is then converted to 14-bit long code word. The code words are sequentially connected with a one-bit merging bit inserted between the code words to define a code bit sequence. The run-length of 0s in the code bit sequence is limited to be between 2 and 11. The one-bit merging bit normally takes a bit value of 0, but is changed to 1 when any one of the T.sub.min control or T.sub.max control is applied so as to accomplish the run-length limitation. The T.sub.min control is applied when the adjacent bits on both sides of the merging bit are 1s. The T.sub.max control is applied when trailing P bits of a code word preceding the merging bit and leading Q bits of a code word following the merging bit are all 0s, provided that P+Q.gtoreq.11, and in this case, at least either one of the P bits and Q bits has a bit sequence of (00000), and the bit sequence (00000) is changed to (00100).
    • 要记录的信息被分为8位长的数据字。 然后将每个数据字转换成14位长码字。 代码字与插入在代码字之间的一位合并位顺序连接,以定义代码位序列。 码位序列中的0的行程长度限制在2到11之间。一位合并位通常取值为0,但当任何一个Tmin控制或Tmax控制为 应用以实现游程限制。 当合并位两侧的相邻位为1时,应用Tmin控制。 如果P + Q> / = 11,并且在这种情况下,至少在合并位之后的码字的尾部P位和合并位之后的码字的前导Q位都为0,则应用Tmax控制 P位和Q位中的任一个具有(00000)的位序列,并且将位序列(00000)改变为(00100)。
    • 43. 再颁专利
    • Code conversion method and apparatus, code recording medium, code recording apparatus and code reproducing apparatus
    • 代码转换方法和装置,代码记录介质,代码记录装置和代码再现装置
    • USRE39771E1
    • 2007-08-14
    • US09844740
    • 2001-04-26
    • Yoshiharu KobayashiAkira MutohShin-ichi TanakaNobuo Akahira
    • Yoshiharu KobayashiAkira MutohShin-ichi TanakaNobuo Akahira
    • H03M7/00
    • H03M5/145
    • A code conversion method and apparatus is provided for scrambling and modulating data. The method and apparatus includes scrambling an input main data unit based on any of plural types of pseudo-random number sequences, and modulating the scrambled main data unit based on any of plural types of modulation data. An output main data unit is produced from the modulated main data unit, and a calculated value representing a difference between a number of 0 bits and a number of 1 bits included in the output main data unit is obtained. Any of the modulation data is then selected dependent upon the calculated value. The method and apparatus further includes determining whether or not a variation of the calculated value has exceeded a predetermined threshold, newly selecting another pseudo-random number sequence used for the step of scrambling if it is determined that the variation of the calculated value has exceeded the predetermined threshold value, and re-scrambling the input main data unit based on the newly selected pseudo-random number sequence.
    • 提供了用于对数据进行加扰和调制的代码转换方法和装置。 所述方法和装置包括基于多种类型的伪随机数序列中的任何一种对输入主数据单元进行加扰,并且基于多种类型的调制数据中的任何一种调制加扰的主数据单元。 从调制主数据单元产生输出主数据单元,得到表示输出主数据单元中包含的0位数与1位数之间的差的计算值。 然后根据计算值选择任何调制数据。 所述方法和装置还包括:确定计算值的变化是否已经超过预定阈值,如果确定计算值的变化已经超过所述阈值,则新选择用于加扰步骤的另一伪随机数序列 基于新选择的伪随机数序列重新加扰输入主数据单元。