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41. 发明申请

US20050127535A1 Method of manufacturing a semiconductor device and a semiconductor device 有权
标题翻译：制造半导体器件和半导体器件的方法
公开(公告)号：US20050127535A1
公开(公告)日：2005-06-16
申请号：US11047660
申请日：2005-02-02
申请人： Noriyuki Takahashi , Masayuki Suzuki , Kouji Tsuchiya , Takao Matsuura , Takanori Hashizume , Masahiro Ichitani , Kazunari Suzuki , Takafumi Nishita , Kenichi Imura , Takashi Miwa
发明人： Noriyuki Takahashi , Masayuki Suzuki , Kouji Tsuchiya , Takao Matsuura , Takanori Hashizume , Masahiro Ichitani , Kazunari Suzuki , Takafumi Nishita , Kenichi Imura , Takashi Miwa
IPC分类号： B29C45/14 , H01L21/56 , H01L23/00 , H01L23/12 , H01L23/31 , H01L23/498 , H01L23/28
CPC分类号： H01L23/564 , H01L21/561 , H01L21/565 , H01L23/3128 , H01L23/49816 , H01L23/49838 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/97 , H01L2223/5442 , H01L2223/54473 , H01L2224/16 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/73265 , H01L2224/92 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/07802 , H01L2924/0781 , H01L2924/14 , H01L2924/1433 , H01L2924/15151 , H01L2924/15311 , H01L2924/181 , H01L2924/20752 , H01L2924/30105 , H01L2924/351 , H01L2224/83 , H01L2224/85 , H01L2924/00014 , H01L2224/92247 , H01L2924/00 , H01L2924/00012
摘要： The back side of a strip substrate with plural semiconductor chips mounted thereon is vacuum-chucked to a lower mold half of a mold, and in this state the plural semiconductor chips are sealed with resin simultaneously to form a seal member. Thereafter, the strip substrate and the seal member are released from the mold and are cut into plural semiconductor devices. The semiconductor devices thus obtained are improved in their mounting reliability.
摘要翻译：将其上安装有多个半导体芯片的带状基板的背面真空吸附到模具的下半模，并且在该状态下，多个半导体芯片同时用树脂密封以形成密封构件。此后，带状基板和密封构件从模具中释放并切割成多个半导体器件。由此获得的半导体器件的安装可靠性得到改善。

42. 发明授权

US06872597B2 Method of manufacturing a semiconductor device and a semiconductor device 有权
公开(公告)号：US06872597B2
公开(公告)日：2005-03-29
申请号：US10784276
申请日：2004-02-24
申请人： Noriyuki Takahashi , Masayuki Suzuki , Kouji Tsuchiya , Takao Matsuura , Takanori Hashizume , Masahiro Ichitani , Kazunari Suzuki , Takafumi Nishita , Kenichi Imura , Takashi Miwa
发明人： Noriyuki Takahashi , Masayuki Suzuki , Kouji Tsuchiya , Takao Matsuura , Takanori Hashizume , Masahiro Ichitani , Kazunari Suzuki , Takafumi Nishita , Kenichi Imura , Takashi Miwa
IPC分类号： B29C45/14 , H01L21/56 , H01L23/00 , H01L23/12 , H01L23/31 , H01L23/498 , H01L21/44
CPC分类号： H01L23/564 , H01L21/561 , H01L21/565 , H01L23/3128 , H01L23/49816 , H01L23/49838 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/97 , H01L2223/5442 , H01L2223/54473 , H01L2224/16 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/73265 , H01L2224/92 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/07802 , H01L2924/0781 , H01L2924/14 , H01L2924/1433 , H01L2924/15151 , H01L2924/15311 , H01L2924/181 , H01L2924/20752 , H01L2924/30105 , H01L2924/351 , H01L2224/83 , H01L2224/85 , H01L2924/00014 , H01L2224/92247 , H01L2924/00 , H01L2924/00012
摘要： The back side of a strip substrate with plural semiconductor chips mounted thereon is vacuum-chucked to a lower mold half of a mold, and in this state the plural semiconductor chips are sealed with resin simultaneously to form a seal member. Thereafter, the strip substrate and the seal member are released from the mold and are cut into plural semiconductor devices. The semiconductor devices thus obtained are improved in their mounting reliability.

43. 发明授权

US06596561B2 Method of manufacturing a semiconductor device using reinforcing patterns for ensuring mechanical strength during manufacture 有权
标题翻译：使用加强图案制造半导体器件的方法，用于确保制造期间的机械强度
公开(公告)号：US06596561B2
公开(公告)日：2003-07-22
申请号：US09987532
申请日：2001-11-15
申请人： Noriyuki Takahashi , Masayuki Suzuki , Kouji Tsuchiya , Takao Matsuura , Takanori Hashizume , Masahiro Ichitani , Kazunari Suzuki , Takafumi Nishita , Kenichi Imura , Takashi Miwa
发明人： Noriyuki Takahashi , Masayuki Suzuki , Kouji Tsuchiya , Takao Matsuura , Takanori Hashizume , Masahiro Ichitani , Kazunari Suzuki , Takafumi Nishita , Kenichi Imura , Takashi Miwa
IPC分类号： H01L2144
CPC分类号： H01L23/564 , H01L21/561 , H01L21/565 , H01L23/3128 , H01L23/49816 , H01L23/49838 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/97 , H01L2223/5442 , H01L2223/54473 , H01L2224/16 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/73265 , H01L2224/92 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/07802 , H01L2924/0781 , H01L2924/14 , H01L2924/1433 , H01L2924/15151 , H01L2924/15311 , H01L2924/181 , H01L2924/20752 , H01L2924/30105 , H01L2924/351 , H01L2224/83 , H01L2224/85 , H01L2924/00014 , H01L2224/92247 , H01L2924/00 , H01L2924/00012
摘要： The back side of a strip substrate with plural semiconductor chips mounted thereon is vacuum-chucked to a lower mold half of a mold, and in this state the plural semiconductor chips are sealed with resin simultaneously to form a seal member. Thereafter, the strip substrate and the seal member are released from the mold and are cut into plural semiconductor devices. The semiconductor devices thus obtained are improved in their mounting reliability.
摘要翻译：将其上安装有多个半导体芯片的带状基板的背面真空吸附到模具的下半模，并且在该状态下，多个半导体芯片同时用树脂密封以形成密封构件。此后，带状基板和密封构件从模具中释放并切割成多个半导体器件。由此获得的半导体器件的安装可靠性得到改善。

44. 发明授权

US06476479B2 Semiconductor device and method of fabricating the same 失效
公开(公告)号：US06476479B2
公开(公告)日：2002-11-05
申请号：US10051009
申请日：2002-01-22
申请人： Yoshinori Miyaki , Kazunari Suzuki , Daisuke Omoda
发明人： Yoshinori Miyaki , Kazunari Suzuki , Daisuke Omoda
IPC分类号： H01L2348
CPC分类号： H01L24/32 , H01L21/565 , H01L23/49503 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2224/05554 , H01L2224/29007 , H01L2224/32014 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/49171 , H01L2224/73265 , H01L2224/83855 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/15747 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/01026 , H01L2924/3512 , H01L2924/00012
摘要： A semiconductor device includes a semiconductor chip having a plurality of electrodes formed on a first major surface thereof, a resin package sealing the semiconductor chip therein, a plurality of leads electrically connected to the electrodes of the semiconductor chip and formed so as to extend inside and outside the resin package, and a support lead supporting the semiconductor chip at a part of a second major surface of the semiconductor chip opposite the first major surface. The semiconductor chip is bonded to the support lead with an adhesive tape.

45. 发明授权

US5874773A Lead frame having a supporting pad with a plurality of slits arranged to permit the flow of resin so as to prevent the occurrence of voids 失效
标题翻译：引线框架具有支撑垫，多个狭缝布置成允许树脂流动以防止空隙的发生
公开(公告)号：US5874773A
公开(公告)日：1999-02-23
申请号：US841329
申请日：1997-04-30
申请人： Kazuhiro Terada , Kunihiro Tsubosaki , Hiroshi Watanabe , Kazunari Suzuki
发明人： Kazuhiro Terada , Kunihiro Tsubosaki , Hiroshi Watanabe , Kazunari Suzuki
IPC分类号： H01L21/60 , H01L23/495 , H01L23/50 , H01L23/48
CPC分类号： H01L23/49503 , H01L24/50 , H01L2224/45015 , H01L2224/45144 , H01L2224/45565 , H01L2224/4569 , H01L2224/48091 , H01L2224/48465 , H01L24/48 , H01L2924/00014 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/1433 , H01L2924/181
摘要： The resin-sealed package includes a lead frame having a supporting and heat spreading pad and inner and outer leads arranged to surround the supporting and head spreading pad. A tape automated bonding (TAB) structure is provided having a semiconductor chip having bonding pads formed on a periphery of a main surface of the semiconductor chip. A rear surface of the semiconductor chip is fixed to the supporting and head spreading pad. TAB leads are provided on the main surface of the semiconductor chip. One end of each TAB lead is connected with said bonding pads and the other end of each TAB lead is connected with one end of each inner lead of the lead frame. A resin molding is used for sealing the TAB structure and the supporting and head spreading pad and inner leads of the lead frame. An area of the supporting and head spreading pad is larger than that of the semiconductor chip of said TAB structure. The supporting and heat spreading pad includes a first slit positioned under the semiconductor chip and a second slit positioned outside of the semiconductor chip in a plane view.
摘要翻译：树脂密封包装包括具有支撑和散热垫的引线框架，以及围绕支撑头扩散垫的内和外引线。提供一种带状自动接合（TAB）结构，其具有半导体芯片，该半导体芯片具有形成在半导体芯片的主表面周围的接合焊盘。半导体芯片的后表面固定在支撑头扩散垫上。 TAB引线设置在半导体芯片的主表面上。每个TAB引线的一端与所述接合焊盘连接，并且每个TAB引线的另一端与引线框架的每个内引线的一端连接。使用树脂模制件来密封TAB结构以及引线框架的支撑头和扩散垫和内引线。支撑头扩散垫的面积大于所述TAB结构的半导体芯片的面积。支撑和散热垫包括位于半导体芯片下方的第一狭缝和位于半导体芯片的平面外的第二狭缝。

46. 发明授权

US5543189A Resin compositions, production process thereof, and products using the resin compositions 失效
公开(公告)号：US5543189A
公开(公告)日：1996-08-06
申请号：US471232
申请日：1995-06-06
申请人： Yasushi Nakakura , Hideki Tanaka , Akira Sano , Akio Mogi , Matsuhiro Miyamoto , Kazunari Suzuki
发明人： Yasushi Nakakura , Hideki Tanaka , Akira Sano , Akio Mogi , Matsuhiro Miyamoto , Kazunari Suzuki
IPC分类号： C08L23/04 , C08L23/16 , B32B1/08
CPC分类号： C08L23/06 , C08L23/0815 , C08L23/16 , C08L2205/03 , C08L2205/035 , C08L23/10 , C08L83/04 , Y10T428/1386
摘要： A resin composition comprises 100 parts by weight of an ethylene-base resin comprising at least 2 wt. % of linear low-density polyethylene and 0.1-30 parts by weight of an organopolysiloxane having an average molecular weight of at least 100,000. The resin composition can be produced by melting and kneading the organopolysiloxane together with the linear low-density polyethylene and then melting and kneading the resulting polymer blend together with the ethylene-base resin other than the linear low-density polyethylene. The resin composition may additionally comprise 0.1-100 parts by weight of a propylene-base resin. In the latter resin composition, the organopolysiloxane is contained in an amount of 0.1-30 parts by weight per 100 parts by weight of the sum of the ethylene-base resin and the propylene-base resin. The latter resin composition can be produced by melting and kneading the organopolysiloxane together with the propylene-base resin and then melting and kneading the resulting polymer blend together with the ethylene-base resin. Optical fiber feeding pipes and optical fiber units making use of such resin compositions are also described.

47. 发明申请

US20120257507A1 ETHERNET LINK AGGREGATION 审中-公开
标题翻译：以太网链路聚合
公开(公告)号：US20120257507A1
公开(公告)日：2012-10-11
申请号：US13529371
申请日：2012-06-21
申请人： Masakazu Sato , Satoshi Nakajima , Kazunari Suzuki
发明人： Masakazu Sato , Satoshi Nakajima , Kazunari Suzuki
IPC分类号： H04L12/24
CPC分类号： H04L45/245 , H04L12/413 , H04L45/745 , H04L49/351 , H04L61/2092 , H04L69/22 , H04W84/18 , Y02D50/30
摘要： A system and method of transmitting data across a first link aggregation formed by an intermediate switch and a downstream switch, the intermediate switch adopting a Media-Access Card (MAC)-address-based load sharing algorithm for distributing traffic among links to the downstream switch interfaced with a final destination device. The method comprises: receiving a packet having a MAC header and an IP header at an input port of an upstream switch for transmission from the upstream switch to the intermediate switch, the upstream switch and intermediate switch forming a second link aggregation; re-writing, at the upstream switch, the source MAC address of the received packet to a different source address; sending the packet through the second link aggregation to the intermediate switch, the intermediate switch implementing the load sharing algorithm for sending the packet to the downstream switch along a link through the first link aggregation to the destination device.
摘要翻译：一种通过中间交换机和下游交换机形成的第一链路聚合发送数据的系统和方法，所述中间交换机采用基于媒体接入卡（MAC）地址的负载分担算法，用于在下游交换机的链路之间分配业务与最终目的地设备连接。该方法包括：在上游交换机的输入端口接收具有MAC报头和IP报头的分组，从上游交换机向中间交换机发送，上游交换机和中间交换机形成第二链路聚合; 在上游交换机上重新写入接收到的数据包的源MAC地址到不同的源地址; 将所述分组通过所述第二链路聚合发送到所述中间交换机，所述中间交换机实现负载分担算法，用于通过所述第一链路聚合向所述目的设备沿着链路向所述下游交换机发送所述分组。

48. 发明申请

US20090285980A1 PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING PRINTED WIRING BOARD 有权
标题翻译：印刷线路板和制造印刷线路板的方法
公开(公告)号：US20090285980A1
公开(公告)日：2009-11-19
申请号：US12494948
申请日：2009-06-30
申请人： Tsutomu IWAI , Yoshihiro Kodera , Shinya Maeda , Hiroyuki Watanabe , Kazunari Suzuki , Kiyotaka Tsukada
发明人： Tsutomu IWAI , Yoshihiro Kodera , Shinya Maeda , Hiroyuki Watanabe , Kazunari Suzuki , Kiyotaka Tsukada
IPC分类号： B05D5/12
CPC分类号： H01L23/49816 , H01L21/4853 , H01L23/498 , H01L24/48 , H01L24/73 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/00014 , H01L2924/01004 , H01L2924/01012 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/12041 , H01L2924/15311 , H01L2924/19041 , H05K3/244 , H05K3/3463 , H05K3/4644 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A composite layer composed of an Ni layer and a Pd layer is formed on a solder pad, and a solder on the composite layer is composed of a solder containing no lead. Because a Pd layer (palladium layer) reduces phenomenons such as repellency of the solder, adhesiveness with the solder can be enhanced. Because a Pd layer has a higher degree of rigidity than a gold layer, thermal stress is absorbed into the Pd layer and buffered so as to reduce the degree of transmission of stress to the solder bump, or to the solder layer, by thermal stress.
摘要翻译：在焊盘上形成由Ni层和Pd层构成的复合层，复合层上的焊料由不含铅的焊料构成。由于Pd层（钯层）减少诸如焊料排斥性的现象，因此可以提高与焊料的粘合性。由于Pd层比金层具有更高的刚度，因此热应力被吸收到Pd层中并进行缓冲，从而通过热应力降低对焊料凸块或焊料层的应力传递程度。

49. 发明授权

US07541667B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07541667B2
公开(公告)日：2009-06-02
申请号：US11154803
申请日：2005-06-17
申请人： Yoshinori Miyaki , Hiromichi Suzuki , Kazunari Suzuki , Kunihiko Nishi
发明人： Yoshinori Miyaki , Hiromichi Suzuki , Kazunari Suzuki , Kunihiko Nishi
IPC分类号： H01L23/495
CPC分类号： H01L24/32 , H01L23/49503 , H01L23/49513 , H01L23/49541 , H01L23/49582 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/78 , H01L24/83 , H01L2224/29007 , H01L2224/29109 , H01L2224/29111 , H01L2224/29139 , H01L2224/2919 , H01L2224/32014 , H01L2224/32055 , H01L2224/32245 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/48639 , H01L2224/48664 , H01L2224/49171 , H01L2224/73265 , H01L2224/78301 , H01L2224/78983 , H01L2224/8319 , H01L2224/838 , H01L2224/85181 , H01L2224/85439 , H01L2224/85464 , H01L2224/92 , H01L2224/92247 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01047 , H01L2924/0105 , H01L2924/01051 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01083 , H01L2924/0132 , H01L2924/01322 , H01L2924/0133 , H01L2924/0134 , H01L2924/014 , H01L2924/0665 , H01L2924/078 , H01L2924/14 , H01L2924/15738 , H01L2924/15747 , H01L2924/1576 , H01L2924/181 , H01L2924/20753 , H01L2924/00014 , H01L2924/00 , H01L2924/01082 , H01L2924/01026 , H01L2924/01049 , H01L2924/00012 , H01L2924/3512
摘要： A manufacturing method of a semiconductor device including preparing a lead frame having a die pad, leads arranged around the die pad and a silver plating layer formed over a first portion of each of the leads, mounting a semiconductor chip over a main surface of the die pad with a rear surface of the chip fixed to the main surface of the die pad, electrically connecting electrodes of the chip with the leads through wires, forming a molding resin sealing the die pad, the first portion, the semiconductor chip, and the wires, and forming a lead-free solder plating layer over a second portion of each of the leads exposed from the molding resin. An area of the die pad is smaller than an area of the chip, and a part of the molding resin contacts with the rear surface of the chip exposed from the die pad.
摘要翻译：一种半导体器件的制造方法，包括制备具有管芯焊盘的引线框架，布置在管芯焊盘周围的引线和形成在每个引线的第一部分上的镀银层，将半导体芯片安装在模具的主表面上焊盘，芯片的后表面固定在芯片焊盘的主表面上，通过电线将芯片的电极与引线电连接，形成密封芯片焊盘，第一部分，半导体芯片和电线的模制树脂并且在从模制树脂暴露的每个引线的第二部分上形成无铅焊料镀层。芯片焊盘的区域小于芯片的面积，并且模制树脂的一部分与从芯片焊盘露出的芯片的后表面接触。

50. 发明授权

US07466649B1 Method for setting a value of waiting time for switching 失效
标题翻译：设置切换等待时间值的方法
公开(公告)号：US07466649B1
公开(公告)日：2008-12-16
申请号：US12060201
申请日：2008-03-31
申请人： Chienho Chen , Masakazu Satoh , Kazunari Suzuki , Takashi Murata
发明人： Chienho Chen , Masakazu Satoh , Kazunari Suzuki , Takashi Murata
IPC分类号： H04L12/26
CPC分类号： H04L41/06 , H04J3/08 , H04L12/43
摘要： In one general embodiment, a method for setting a value of waiting time for switching is provided. At a node in a sonet ring, it is determined which path to the node is an actual path and which path is a preliminary path. Additionally, it is determined whether a one way fiber transmission delay of the actual path is less than a one way fiber transmission delay of the preliminary path. If the one way fiber transmission delay of the actual path is greater than the one way fiber transmission delay of the preliminary path, a switching time is set to zero and normal switching is performed. If the one way fiber transmission delay of the actual path is less than the one way fiber transmission delay of the preliminary path, a switching time is set equal to the one way fiber transmission delay of the preliminary path minus the one way fiber transmission delay of the actual path and it is determined whether a path alarm indication signal (AIS) occurred in the actual path. If the path alarm indication signal occurred in the actual path, path switching of the actual path is stopped within the switching time and it is determined whether a path alarm indication signal occurred in the preliminary path. If the path alarm indication signal did not occur in the preliminary path, normal path switching is performed for the actual path.
摘要翻译：在一般的实施例中，提供了一种用于设置切换等待时间的值的方法。在sonet环的节点，确定到节点的哪个路径是实际路径，哪条路径是初步路径。此外，确定实际路径的单向光纤传输延迟是否小于预备路径的单向光纤传输延迟。如果实际路径的单向光纤传输延迟大于初步路径的单向光纤传输延迟，则切换时间设置为零，并执行正常切换。如果实际路径的单向光纤传输延迟小于预备路径的单向光纤传输延迟，则将切换时间设置为等于初始路径的单向光纤传输延迟减去单向光纤传输延迟确定实际路径，并确定在实际路径中是否发生路径报警指示信号（AIS）。如果在实际路径中发生路径报警指示信号，则在切换时间内停止实际路径的路径切换，并且确定在初始路径中是否发生路径报警指示信号。如果在初步路径中没有发生路径报警指示信号，则对实际路径进行正常路径切换。

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