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41. 发明申请

US20100309635A1 STRUCTURE FOR MOUNTING SEMICONDUCTOR PACKAGE 有权
标题翻译：用于安装半导体封装的结构
公开(公告)号：US20100309635A1
公开(公告)日：2010-12-09
申请号：US12525957
申请日：2007-11-30
申请人： Junichi Sasaki , Tomoyuki Hino
发明人： Junichi Sasaki , Tomoyuki Hino
IPC分类号： H05K7/20 , H01L23/40
CPC分类号： H05K1/0204 , H01L23/3677 , H01L23/4093 , H01L2224/0554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/32188 , H01L2924/00014 , H01L2924/01004 , H05K2201/09054 , H05K2201/10393 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A mounting structure, in which semiconductor package 1 and heat sink 8 for dissipating heat generated from semiconductor package 1 are mounted on mounting board 3. The rear surface of semiconductor package 1 is bonded to the front surface of mounting board 3 facing the rear surface. Heat sink 8 is brought into contact with the rear surface of semiconductor package 1 via through-ole 5 formed on mounting board 3. Semiconductor package 1 and heat sink 8 are pressed to each other by the elastic force of clip 6.
摘要翻译：其中将用于散发由半导体封装1产生的热量的半导体封装1和散热器8安装在安装板3上的安装结构。半导体封装1的后表面接合到安装板3的面向后表面的前表面。散热器8通过形成在安装板3上的通孔5与半导体封装1的后表面接触。半导体封装1和散热器8通过夹子6的弹力彼此挤压。

42. 发明授权

US07333683B2 Structure and method for mounting LSI package onto photoelectric wiring board, information processing apparatus, optical interface, and photoelectric wiring board 失效
标题翻译：将LSI封装安装到光电布线板，信息处理设备，光接口和光电布线板上的结构和方法
公开(公告)号：US07333683B2
公开(公告)日：2008-02-19
申请号：US11245334
申请日：2005-10-07
申请人： Junichi Sasaki , Ichiro Hatakeyama , Kazunori Miyoshi , Hikaru Kouta , Kaichiro Nakano , Mikio Oda , Hisaya Takahashi , Mitsuru Kurihara
发明人： Junichi Sasaki , Ichiro Hatakeyama , Kazunori Miyoshi , Hikaru Kouta , Kaichiro Nakano , Mikio Oda , Hisaya Takahashi , Mitsuru Kurihara
IPC分类号： G02B6/00
CPC分类号： H01L23/48 , G02B6/4214 , G02B6/4292 , G02B6/43 , H01L24/81 , H01L27/1443 , H01L31/0203 , H01L31/0232 , H01L2224/05001 , H01L2224/05023 , H01L2224/16 , H01L2224/8121 , H01L2224/81815 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/12043 , H01S5/02248 , H01S5/02284 , H01S5/02292 , H05K1/0274 , H01L2924/00 , H01L2224/05599 , H01L2224/05099
摘要： An LSI package having an optical interface is mounted on a surface of a photoelectric wiring board. The photoelectric wiring board and the optical interface are optically connected with sufficient precision. A wiring board side guide member including socket pins and guide pins is soldered and fixed onto the photoelectric wiring board including an optical transmission line, a guide pin, and a mirror. An optical interface side guide member having a fitting hole is glued to the optical interface. The optical interface is mounted on an interposer of the LSI package. The guide pin of the photoelectric wiring board is fitted into the fitting hole formed through the interposer. The guide pin of the guide member is fitted into the fitting hole of the guide member. As a result, position alignment between the optical interface and the photoelectric wiring board is conducted with high precision.
摘要翻译：具有光学接口的LSI封装安装在光电布线板的表面上。光电布线板和光接口以足够的精度光学连接。包括插座销和引导销的布线板侧引导构件焊接并固定在包括光传输线，引导销和反射镜的光电布线板上。具有嵌合孔的光学接口侧引导构件粘合到光学接口。光学接口安装在LSI封装的插入器上。光电布线板的引导销装配到通过插入件形成的嵌合孔中。引导构件的引导销装配到引导构件的装配孔中。结果，高精度地进行光接口和光电布线板之间的位置对准。

43. 发明授权

US07212453B2 Semiconductor memory having an error correction function 有权
标题翻译：具有纠错功能的半导体存储器
公开(公告)号：US07212453B2
公开(公告)日：2007-05-01
申请号：US11155731
申请日：2005-06-20
申请人： Akira Kikutake , Yasuhiro Onishi , Kuninori Kawabata , Junichi Sasaki , Toshiya Miyo
发明人： Akira Kikutake , Yasuhiro Onishi , Kuninori Kawabata , Junichi Sasaki , Toshiya Miyo
IPC分类号： G11C29/00
CPC分类号： G11C29/24 , G06F11/1032 , G11C11/401 , G11C29/50016 , G11C29/52 , G11C2029/0409
摘要： Regular data inputted/outputted to/from external terminals is read/written to/from a regular cell array, and parity data is read/written from/to a parity cell array. Since the parity data is generated by a parity generation circuit, it is difficult to write a desired pattern to the parity cell array. The regular data and the parity data are exchanged with each other by a switch circuit, so that the regular data can be written to the parity cell array and the parity data can be written to the regular cell array. This enables the write of desired data to the parity cell array. A test of the parity data can be easily conducted. In particular, a leakage test or the like between memory cells can be easily conducted.
摘要翻译：向/从外部端子输入/输出的常规数据被读取/写入常规单元阵列，并且从奇偶校验单元阵列读取/写入奇偶校验数据。由于奇偶校验数据由奇偶产生电路产生，因此难以将奇偶校验单元阵列所需的模式写入。常规数据和奇偶校验数据通过开关电路彼此交换，使得常规数据可以写入奇偶校验单元阵列，并且奇偶校验数据可以写入正常单元阵列。这使得能够将所需数据写入奇偶校验单元阵列。可以容易地进行奇偶校验数据的测试。特别地，可以容易地进行存储单元之间的泄漏测试等。

44. 发明申请

US20070092185A1 Optical connection structure between optical backplane and circuit substrate 有权
标题翻译：光背板与电路基板之间的光连接结构
公开(公告)号：US20070092185A1
公开(公告)日：2007-04-26
申请号：US11543140
申请日：2006-10-05
申请人： Junichi Sasaki
发明人： Junichi Sasaki
IPC分类号： G02B6/36
CPC分类号： G02B6/3885 , G02B6/3897 , G02B6/43
摘要： Information processing equipment includes a photoelectric conversion module disposed on a circuit substrate, a first optical connector connected to the photoelectric conversion module through a plurality of first optical fibers and disposed to an edge portion of the circuit substrate, and a second optical connector disposed on an optical backplane and optically connected to the first optical connector. The disposing direction of the optical fibers in the photoelectric conversion module is in nonparallel with the main surface of the circuit substrate and the disposing direction of the optical fibers in the first optical connector and the disposing direction of the optical fibers in the second optical connector are in nonparallel with the main surface of the circuit substrate.
摘要翻译：信息处理设备包括设置在电路基板上的光电转换模块，通过多个第一光纤连接到光电转换模块并且设置在电路基板的边缘部分的第一光学连接器，以及设置在电路基板上的第二光学连接器光学背板并且光学连接到第一光学连接器。光电转换模块中的光纤的布置方向与电路基板的主表面不平行，第一光连接器中的光纤的布置方向和第二光连接器中的光纤的布置方向为与电路基板的主表面不平行。

45. 发明授权

US08609549B2 Plasma etching method, plasma etching apparatus, and computer-readable storage medium 有权
标题翻译：等离子体蚀刻方法，等离子体蚀刻装置和计算机可读存储介质
公开(公告)号：US08609549B2
公开(公告)日：2013-12-17
申请号：US13045988
申请日：2011-03-11
申请人： Sungtae Lee , Masahiro Ogasawara , Junichi Sasaki , Naohito Yanagida
发明人： Sungtae Lee , Masahiro Ogasawara , Junichi Sasaki , Naohito Yanagida
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/31144 , H01J37/32091
摘要： A plasma etching method is provided to perform a plasma etching on a silicon oxide film or a silicon nitride film formed below an amorphous carbon film by using a pattern of the amorphous carbon film as a final mask in a multilayer mask including a photoresist layer having a predetermined pattern, an organic bottom anti-reflection coating (BARC) film formed below the photoresist layer, an SiON film formed below the BARC film, and the amorphous carbon film formed below the SiON film. An initial mask used at the time when the plasma etching of the silicon oxide film or the silicon nitride film is started is under a state in which the SiON film remains on the amorphous carbon film and a ratio of a film thickness of the amorphous carbon film to a film thickness of the residual SiON film is smaller than or equal to about 14.
摘要翻译：提供了一种等离子体蚀刻方法，用于通过在非晶碳膜的图案作为最终掩模的非晶碳膜上形成的氧化硅膜或氮化硅膜上进行等离子体蚀刻，所述多层掩模包括具有预定图案，在光致抗蚀剂层下形成的有机底部防反射涂层（BARC）膜，在BARC膜下面形成的SiON膜和形成在SiON膜下面的无定形碳膜。在氧化硅膜或氮化硅膜的等离子体蚀刻开始时使用的初始掩模是在无定形碳膜上残留SiON膜的状态和无定形碳膜的膜厚比残留SiON膜的膜厚小于或等于约14。

46. 发明授权

US08436589B2 Charging device, image forming apparatus, and computer program product 有权
公开(公告)号：US08436589B2
公开(公告)日：2013-05-07
申请号：US12834282
申请日：2010-07-12
申请人： Junichi Sasaki
发明人： Junichi Sasaki
IPC分类号： H02J7/00 , H02M3/06 , H02M3/18
摘要： An charging device includes: capacitors connected in series; a charging unit that charges the capacitors; bypass units, each respectively connects in parallel to each capacitors, wherein each bypass unit causes, when a charged voltage of any capacitor has reached a set voltage, a charging current to bypass the capacitor whose charged voltage has reached the set voltage; and a control unit that controls the charging unit to charge the capacitors in such a manner that, when a charging voltage of the any capacitor has reached the set voltage, the control unit causes the charging unit to reduce the charging current, and if a predetermined period has elapsed since the charging voltage has reached the set voltage, and if a charging voltage of any of the other capacitors has not reached the set voltage after the predetermined period, the control unit causes the charging unit to increase the charging current.

47. 发明申请

US20100124528A1 HIGH-STRENGTH COLUMNAR CRYSTAL SILICON PART OF PLASMA ETCHING DEVICE CONSISTING THEREOF 审中-公开
标题翻译：等离子体蚀刻装置的高强度柱状晶体硅部分
公开(公告)号：US20100124528A1
公开(公告)日：2010-05-20
申请号：US12452217
申请日：2008-08-01
申请人： Junichi Sasaki
发明人： Junichi Sasaki
IPC分类号： C01B33/02
CPC分类号： H01J37/32467 , H01J37/32642
摘要： The present invention relates to a columnar crystal silicon having a high strength. In the case where plasma etching device parts such as a focus ring, an upper electrode plate, and a shield ring which are formed from a high-strength columnar crystal silicon ingot having an interstitial oxygen concentration within a range of 1×1018 to 2×1018 atms/cm3, it is possible to further increase the diameters of these parts without increasing their thicknesses.
摘要翻译：本发明涉及具有高强度的柱状晶体硅。在由具有间隙氧浓度在1×1018到2×的范围内的高强度柱状晶体硅锭形成的等离子体蚀刻装置部件如聚焦环，上电极板和屏蔽环的情况下 1018atms / cm3，可以进一步增加这些部件的直径而不增加其厚度。

48. 发明授权

US07186928B2 Electronic device including chip parts and a method for manufacturing the same 失效
标题翻译：包括芯片部件的电子设备及其制造方法
公开(公告)号：US07186928B2
公开(公告)日：2007-03-06
申请号：US10522686
申请日：2003-08-01
申请人： Hideo Kikuchi , Junichi Sasaki
发明人： Hideo Kikuchi , Junichi Sasaki
IPC分类号： H05K9/00
CPC分类号： H01L24/81 , H01C1/06 , H01G2/22 , H01G4/228 , H01L23/552 , H01L24/10 , H01L24/13 , H01L2224/05568 , H01L2224/05573 , H01L2224/13 , H01L2224/13099 , H01L2224/131 , H01L2224/14051 , H01L2224/16 , H01L2224/16235 , H01L2224/1703 , H01L2224/17515 , H01L2224/2929 , H01L2224/293 , H01L2224/73153 , H01L2224/73253 , H01L2224/81201 , H01L2224/8121 , H01L2224/81815 , H01L2224/83851 , H01L2224/92225 , H01L2924/0001 , H01L2924/00011 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H01L2924/12043 , H01L2924/15192 , H01L2924/15787 , H01L2924/16152 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/3025 , H05K1/0218 , H05K1/181 , H05K2201/10371 , H05K2201/10734 , H01L2224/81801 , H01L2224/29075 , H01L2924/00 , H01L2224/05599
摘要： In a shielding configuration of a chip part, a shielding effect and a cooling effect are sufficiently obtained at the same time. In an electronic device including a chip part to be disclosed, a shielding conductor includes a ceiling plate section covering the chip part and side plate sections which are formed to be united with the ceiling plate section and to be at a position lower than the ceiling plate section and which are arranged on both sides in a horizontal direction of the chip part, and openings are formed in both side ends in a front-rear direction of the shielding conductor to open both sides in a front-rear direction of the chip part, and the side plate sections of the shielding conductor are electrically connected via a plurality of shielding bumps in the front-rear direction to a ground layer pattern of a mounting substrate.
摘要翻译：在芯片部件的屏蔽结构中，同时充分获得屏蔽效果和冷却效果。在包括要公开的芯片部件的电子设备中，屏蔽导体包括覆盖芯片部分的顶板部分和形成为与顶板部分结合并且处于比顶板的下方的位置的侧板部分并且在芯片部分的水平方向上布置在两侧，并且在屏蔽导体的前后方向的两个侧端形成开口，以在芯片部分的前后方向上打开两侧，并且屏蔽导体的侧板部分经由多个前后方向的屏蔽凸块电连接到安装基板的接地层图案。

49. 发明授权

US06238100B1 Optical module and a method for fabricating a same 有权
标题翻译：光模块及其制造方法
公开(公告)号：US06238100B1
公开(公告)日：2001-05-29
申请号：US09421041
申请日：1999-10-20
申请人： Junichi Sasaki , Tomoaki Kato , Masataka Itoh
发明人： Junichi Sasaki , Tomoaki Kato , Masataka Itoh
IPC分类号： G02B638
CPC分类号： G02B6/4292 , G02B6/421 , G02B6/4215 , G02B6/423 , G02B6/4245 , G02B6/4249 , G02B6/4257 , G02B6/4274
摘要： A semiconductor optical amplifier is mounted on a substrate which is provided for a package. Fiber blocks in which plural parallel internal optical fibers are supported are fitted to the package. The optical fibers are optically coupled with the semiconductor optical amplifier via optical waveguides formed on the substrate. V grooves for supporting the optical fibers which protrude out from the fiber block are formed on the substrate. Positionings of the optical fibers are performed by fitting the fiber blocks to the package so that end faces of the optical fibers butt against end walls of the V grooves.
摘要翻译：半导体光放大器安装在为封装提供的基板上。其中多个平行的内部光纤被支撑的纤维块被装配到包装上。光纤通过形成在基板上的光波导与半导体光放大器光学耦合。在基板上形成用于支撑从纤维块突出的光纤的V形槽。光纤的定位是通过将光纤块装配到封装上来实现的，使得光纤的端面对接V沟槽的端壁。

50. 发明授权

US6115515A Optical device mounting board 有权
标题翻译：光学装置安装板
公开(公告)号：US6115515A
公开(公告)日：2000-09-05
申请号：US154714
申请日：1998-09-17
申请人： Masataka Itoh , Junichi Sasaki
发明人： Masataka Itoh , Junichi Sasaki
IPC分类号： G02B6/42 , G02B6/43 , H01L27/14 , H01L31/10 , H01L33/62 , H01S5/00 , H05K1/02 , G02B6/12
CPC分类号： G02B6/4232 , G02B6/423 , G02B6/4249 , G02B6/4245 , G02B6/428 , G02B6/43
摘要： An optical device mounting board with electrodes mounted on the surface of the mounting board and separated from one another by grooves dividing the surface of the mounting board includes printed circuit boards having distribution lines for connecting the divided electrodes and spanning the grooves.
摘要翻译：具有安装在安装板的表面上并且通过分隔安装板的表面的凹槽彼此分离的电极的光学装置安装板包括印刷电路板，其具有用于连接分割电极并横跨槽的分配线。

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