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41. 发明授权

US5223751A Logic level shifter for 3 volt CMOS to 5 volt CMOS or TTL 失效
标题翻译：用于3伏CMOS到5伏CMOS或TTL的逻辑电平变换
公开(公告)号：US5223751A
公开(公告)日：1993-06-29
申请号：US780677
申请日：1991-10-29
申请人： Laura E. Simmons , Richard W. Ulmer , James Ward
发明人： Laura E. Simmons , Richard W. Ulmer , James Ward
IPC分类号： H03K19/00 , H03K19/0185
CPC分类号： H03K19/0013 , H03K19/018521
摘要： A logic level shifter characterized by a first inverting stage which shifts an input signal downwardly to a lower level, and a second inverting stage which shifts the lower level upwardly to an output signal level which is greater than the input signal level. Feedback from the output is used to virtually eliminate static current drain when the input logic level is 0. The method of the invention involves downwardly shifting an input range of voltages to a lower range of voltages, and then upwardly shifting the lower range of voltages to an output range of voltages which is greater than the input range of voltages. There is preferably a first inversion in the downward shift and a second inversion in the upward shift. A sensing step senses the output voltage to reduce the static current consumed by the process.
摘要翻译：一种逻辑电平移位器，其特征在于将输入信号向下移动到较低电平的第一反相级，以及向下移动较低电平至大于输入信号电平的输出信号电平的第二反相级。当输入逻辑电平为0时，来自输出的反馈用于实际消除静态电流消耗。本发明的方法涉及将输入范围的电压向下移位到较低的电压范围，然后向下移动较低的电压范围电压的输出范围大于电压的输入范围。优选地，向下移动中的第一反转和向上移位的第二反转。感测步骤检测输出电压以减少由该过程消耗的静态电流。

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