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41. 发明授权

US08017482B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08017482B2
公开(公告)日：2011-09-13
申请号：US12974819
申请日：2010-12-21
申请人： Toshikazu Matsui , Yasuyuki Sayama , Hiroki Eto , Takumi Hosoya
发明人： Toshikazu Matsui , Yasuyuki Sayama , Hiroki Eto , Takumi Hosoya
IPC分类号： H01L21/336
CPC分类号： H01L29/66734 , H01L21/26586 , H01L29/42376 , H01L29/7397
摘要： The invention provides a method of manufacturing a semiconductor device at low cost in which the gate insulation film having a trench structure is not damaged by arsenic ions when the emitter layer or the like is formed and the insulation breakdown voltage is enhanced. A gate electrode made of polysilicon formed in a trench is thermally oxidized in a high temperature furnace or the like to form a thick polysilicon thermal oxide film on the gate electrode. Impurity ions are then ion-implanted to form an N type semiconductor layer that is to be an emitter layer or the like. At this time, the polysilicon thermal oxide film is formed thicker than the projected range Rp of impurity ions in the silicon oxide film for forming the N type semiconductor layer as the emitter layer or the like by ion implantation. This prevents a gate insulation film between the gate electrode and the N type semiconductor layer from being damaged by the impurity ions.
摘要翻译：本发明提供了一种以低成本制造半导体器件的方法，其中当形成发射极层等时，具有沟槽结构的栅极绝缘膜不被砷离子损坏并且绝缘击穿电压增强。在沟槽中形成的由多晶硅形成的栅电极在高温炉等中被热氧化，以在栅电极上形成厚的多晶硅热氧化膜。然后将杂质离子离子注入以形成作为发射极层等的N型半导体层。此时，通过离子注入，多晶硅热氧化膜形成得比用于形成N型半导体层的氧化硅膜中的杂质离子的投射范围Rp比发射极层等厚。这防止了栅电极和N型半导体层之间的栅极绝缘膜被杂质离子损坏。

42. 发明授权

US07663176B2 Method of manufacturing a nonvolatile semiconductor memory device, and a nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件的制造方法以及非易失性半导体存储器件
公开(公告)号：US07663176B2
公开(公告)日：2010-02-16
申请号：US12114074
申请日：2008-05-02
申请人： Takeshi Sakai , Yasushi Ishii , Tsutomu Okazaki , Masaru Nakamichi , Toshikazu Matsui , Kyoya Nitta , Satoru Machida , Munekatsu Nakagawa , Yuichi Tsukada
发明人： Takeshi Sakai , Yasushi Ishii , Tsutomu Okazaki , Masaru Nakamichi , Toshikazu Matsui , Kyoya Nitta , Satoru Machida , Munekatsu Nakagawa , Yuichi Tsukada
IPC分类号： H01L21/00
CPC分类号： H01L27/11568 , H01L21/823842 , H01L21/82385 , H01L21/823857 , H01L21/823864 , H01L27/105 , H01L27/1052 , H01L27/11573
摘要： For enhancing the high performance of a non-volatile semiconductor memory device having an MONOS type transistor, a non-volatile semiconductor memory device is provided with MONOS type transistors having improved performance in which the memory cell of an MONOS non-volatile memory comprises a control transistor and a memory transistor. A control gate of the control transistor comprises an n-type polycrystal silicon film and is formed over a gate insulative film comprising a silicon oxide film. A memory gate of the memory transistor comprises an n-type polycrystal silicon film and is disposed on one of the side walls of the control gate. The memory gate comprises a doped polycrystal silicon film with a sheet resistance lower than that of the control gate comprising a polycrystal silicon film formed by ion implantation of impurities to the undoped silicon film.
摘要翻译：为了增强具有MONOS型晶体管的非易失性半导体存储器件的高性能，非易失性半导体存储器件被提供有具有改进性能的MONOS型晶体管，其中MONOS非易失性存储器的存储单元包括控制晶体管和存储晶体管。控制晶体管的控制栅极包括n型多晶硅膜，并且形成在包括氧化硅膜的栅极绝缘膜上。存储晶体管的存储栅极包括n型多晶硅膜，并设置在控制栅极的一个侧壁上。存储器栅极包括具有低于控制栅极的薄层电阻的掺杂多晶硅膜，其包括通过将杂质离子注入未掺杂的硅膜形成的多晶硅膜。

43. 发明申请

US20090256193A1 SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090256193A1
公开(公告)日：2009-10-15
申请号：US12490147
申请日：2009-06-23
申请人： YASUSHI ISHII , Takashi Hashimoto , Yoshiyuki Kawashima , Koichi Toba , Satoru Machida , Kozo Katayama , Kentaro Saito , Toshikazu Matsui
发明人： YASUSHI ISHII , Takashi Hashimoto , Yoshiyuki Kawashima , Koichi Toba , Satoru Machida , Kozo Katayama , Kentaro Saito , Toshikazu Matsui
IPC分类号： H01L29/792
CPC分类号： H01L27/115 , H01L21/823462 , H01L27/0629 , H01L27/0922 , H01L27/105 , H01L27/11526 , H01L27/11546 , H01L27/11568 , H01L29/6653
摘要： In a semiconductor device which includes a split-gate type memory cell having a control gate and a memory gate, a low withstand voltage MISFET and a high withstand voltage MISFET, variations of the threshold voltage of the memory cell are suppressed. A gate insulating film of a control gate is thinner than a gate insulating film of a high withstand voltage MISFET, the control gate is thicker than a gate electrode 14 of the low withstand voltage MISFET and the ratio of thickness of a memory gate with respect to the gate length of the memory gate is larger than 1. The control gate and a gate electrode 15 are formed in a multilayer structure including an electrode material film 8A and an electrode material layer 8B, and the gate electrode 14 is a single layer structure formed at the same time as the electrode material film 8A of the control gate.
摘要翻译：在包括具有控制栅极和存储器栅极的分离栅极型存储单元，低耐压MISFET和高耐压MISFET的半导体器件中，抑制了存储单元的阈值电压的变化。控制栅极的栅极绝缘膜比高耐压MISFET的栅极绝缘膜薄，控制栅极比低耐压MISFET的栅电极14厚，存储栅的厚度比相对于存储器栅极的栅极长度大于1.控制栅极和栅电极15形成为包括电极材料膜8A和电极材料层8B的多层结构，并且栅电极14是形成的单层结构同时作为控制栅极的电极材料膜8A。

44. 发明授权

US07557005B2 Semiconductor device and a method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07557005B2
公开(公告)日：2009-07-07
申请号：US11727591
申请日：2007-03-27
申请人： Yasushi Ishii , Takashi Hashimoto , Yoshiyuki Kawashima , Koichi Toba , Satoru Machida , Kozo Katayama , Kentaro Saito , Toshikazu Matsui
发明人： Yasushi Ishii , Takashi Hashimoto , Yoshiyuki Kawashima , Koichi Toba , Satoru Machida , Kozo Katayama , Kentaro Saito , Toshikazu Matsui
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L21/823462 , H01L27/0629 , H01L27/0922 , H01L27/105 , H01L27/11526 , H01L27/11546 , H01L27/11568 , H01L29/6653
摘要： In a semiconductor device which includes a split-gate type memory cell having a control gate and a memory gate, a low withstand voltage MISFET and a high withstand voltage MISFET, variations of the threshold voltage of the memory cell are suppressed. A gate insulating film of a control gate is thinner than a gate insulating film of a high withstand voltage MISFET, the control gate is thicker than a gate electrode 14 of the low withstand voltage MISFET and the ratio of thickness of a memory gate with respect to the gate length of the memory gate is larger than 1. The control gate and a gate electrode 15 are formed in a multilayer structure including an electrode material film 8A and an electrode material layer 8B, and the gate electrode 14 is a single layer structure formed at the same time as the electrode material film 8A of the control gate.
摘要翻译：在包括具有控制栅极和存储器栅极的分离栅极型存储单元，低耐压MISFET和高耐压MISFET的半导体器件中，抑制了存储单元的阈值电压的变化。控制栅极的栅极绝缘膜比高耐压MISFET的栅极绝缘膜薄，控制栅极比低耐压MISFET的栅电极14厚，存储栅的厚度比相对于存储器栅极的栅极长度大于1.控制栅极和栅电极15形成为包括电极材料膜8A和电极材料层8B的多层结构，并且栅电极14是形成的单层结构同时作为控制栅极的电极材料膜8A。

45. 发明申请

US20080283889A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20080283889A1
公开(公告)日：2008-11-20
申请号：US12101959
申请日：2008-04-11
申请人： Keiichi HARAGUCHI , Toshikazu Matsui , Satoshi Kamei , Hisanori Ito
发明人： Keiichi HARAGUCHI , Toshikazu Matsui , Satoshi Kamei , Hisanori Ito
IPC分类号： H01L29/94 , H01L29/92
CPC分类号： H01L27/0805 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： The present invention aims to enhance the reliability of a semiconductor device having first through fourth capacitive elements. The first through fourth capacitive elements are disposed over a semiconductor substrate. A series circuit of the first and second capacitive elements and a series circuit of the third and fourth capacitive elements are coupled in parallel between first and second potentials. Lower electrodes of the first and third capacitive elements are respectively formed by a common conductor pattern and coupled to the first potential. Lower electrodes of the second and fourth capacitive elements are respectively formed by a conductor pattern of the same layer as the above conductor pattern and coupled to the second potential. Upper electrodes of the first and second capacitive elements are respectively formed by a common conductor pattern and brought to a floating potential. Upper electrodes of the third and fourth capacitive elements are respectively formed by a conductor pattern of the same layer as the above conductor pattern and brought to a floating potential, but not coupled to the upper electrodes of the first and second capacitive elements by a conductor.
摘要翻译：本发明旨在提高具有第一至第四电容元件的半导体器件的可靠性。第一至第四电容元件设置在半导体衬底上。第一和第二电容元件的串联电路和第三和第四电容元件的串联电路在第一和第二电位之间并联耦合。第一和第三电容元件的下电极分别由公共导体图案形成并耦合到第一电位。第二和第四电容元件的下电极分别由与上述导体图案相同的层的导体图案形成并耦合到第二电位。第一和第二电容元件的上电极分别由公共导体图形形成并且具有浮动电位。第三和第四电容元件的上电极分别由与上述导体图案相同的层的导体图形形成浮动电位，但不通过导体耦合到第一和第二电容元件的上电极。

46. 发明申请

US20080206975A1 METHOD OF MANUFACTURING A NONVOLATILE SEMICONDUCTOR MEMORY DEVICE, AND A NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 审中-公开
标题翻译：制造非易失性半导体存储器件的方法和非易失性半导体存储器件
公开(公告)号：US20080206975A1
公开(公告)日：2008-08-28
申请号：US12114064
申请日：2008-05-02
申请人： Takeshi SAKAI , Yasushi Ishii , Tsutomu Okazaki , Masaru Nakamichi , Toshikazu Matsui , Kyoya Nitta , Satoru Machida , Munekatsu Nakagawa , Yuichi Tsukada
发明人： Takeshi SAKAI , Yasushi Ishii , Tsutomu Okazaki , Masaru Nakamichi , Toshikazu Matsui , Kyoya Nitta , Satoru Machida , Munekatsu Nakagawa , Yuichi Tsukada
IPC分类号： H01L21/28
CPC分类号： H01L27/11568 , H01L21/823842 , H01L21/82385 , H01L21/823857 , H01L21/823864 , H01L27/105 , H01L27/1052 , H01L27/11573
摘要： For enhancing the high performance of a non-volatile semiconductor memory device having an MONOS type transistor, a non-volatile semiconductor memory device is provided with MONOS type transistors having improved performance in which the memory cell of an MONOS non-volatile memory comprises a control transistor and a memory transistor. A control gate of the control transistor comprises an n-type polycrystal silicon film and is formed over a gate insulative film comprising a silicon oxide film. A memory gate of the memory transistor comprises an n-type polycrystal silicon film and is disposed on one of the side walls of the control gate. The memory gate comprises a doped polycrystal silicon film with a sheet resistance lower than that of the control gate comprising a polycrystal silicon film formed by ion implantation of impurities to the undoped silicon film.
摘要翻译：为了增强具有MONOS型晶体管的非易失性半导体存储器件的高性能，非易失性半导体存储器件被提供有具有改进性能的MONOS型晶体管，其中MONOS非易失性存储器的存储单元包括控制晶体管和存储晶体管。控制晶体管的控制栅极包括n型多晶硅膜，并且形成在包括氧化硅膜的栅极绝缘膜上。存储晶体管的存储栅极包括n型多晶硅膜，并设置在控制栅极的一个侧壁上。存储器栅极包括具有低于控制栅极的薄层电阻的掺杂多晶硅膜，其包括通过将杂质离子注入未掺杂的硅膜形成的多晶硅膜。

47. 发明授权

US5253023A Electrostatographic apparatus without cleaner 失效
标题翻译：无干净的静电摄影装置
公开(公告)号：US5253023A
公开(公告)日：1993-10-12
申请号：US834653
申请日：1992-02-12
申请人： Yasuo Hosaka , Hitoshi Nagato , Yuzo Koike , Toshikazu Matsui , Shuzo Hirahara
发明人： Yasuo Hosaka , Hitoshi Nagato , Yuzo Koike , Toshikazu Matsui , Shuzo Hirahara
IPC分类号： G03G15/05 , G03G15/01 , G03G15/08 , G03G15/16 , G03G15/23 , G03G15/24 , G03G21/00 , G03G15/14
CPC分类号： G03G21/0064 , G03G15/0131 , G03G15/0163 , G03G15/167 , G03G15/234 , G03G15/24 , G03G2215/0177 , G03G2221/0005
摘要： An electrostatographic apparatus has a driving roller, a tension roller, a belt-like recording medium that moves over the roller in an endless track manner, an ion head that forms an electrostatic image on the surface of the recording medium, a development apparatus that develops the electrostatic image to form a toner image, and a heat transfer unit that transfers the toner image onto the recording sheet by Ion-Deposition imaging techniques (or by electrophotographic techniques). The toner remaining on the recording medium is removed by applying a direct-current to the development apparatus.
摘要翻译：静电摄影装置具有驱动辊，张紧辊，以环形轨迹方式在辊上移动的带状记录介质，在记录介质的表面上形成静电图像的离子头，显影装置静电图像以形成调色剂图像;以及传热单元，其通过离子沉积成像技术（或通过电子照相技术）将调色剂图像转印到记录片材上。通过向显影装置施加直流电流来除去残留在记录介质上的调色剂。

48. 发明授权

US5201503A Sheet sorter with common supply and discharge rollers 失效
标题翻译：与普通供应商和放弃辊子的销售商
公开(公告)号：US5201503A
公开(公告)日：1993-04-13
申请号：US778361
申请日：1991-10-17
申请人： Toshikazu Matsui , Hiromi Sakata , Masanori Itakiyo , Kunihiko Ishikawa , Kenzo Ono
发明人： Toshikazu Matsui , Hiromi Sakata , Masanori Itakiyo , Kunihiko Ishikawa , Kenzo Ono
IPC分类号： B41J29/00 , B42B4/00 , B42C1/12 , B65H39/11 , G03G15/00
CPC分类号： G03G15/6541 , B42C1/125 , B65H39/11 , G03G15/6538 , B65H2408/113 , B65H2408/1141 , G03G2215/00827
摘要： A sorter incorporating a stapler sorts and staples sheets discharged from a discharger of an image forming apparatus. The sorter includes a plurality of bins, a stapler, a stacker, and a supplying/discharging mechanism. The plurality of bins are vertically arranged and vertically movable. The stapler staples a stack of sheets stored in each of the bins. The stacker stores the bundles of sheets stapled by the stapler. The supplying/discharging mechanism supplies into the bins of the sorter the sheets discharged from the discharger, and discharges the bundles of sheets stapled by the stapler into the stacker.

49. 发明授权

US4914349A Photo-electric conversion tube with optical fiber plate 失效
标题翻译：带光纤板的光电转换管
公开(公告)号：US4914349A
公开(公告)日：1990-04-03
申请号：US112490
申请日：1987-10-26
申请人： Toshikazu Matsui , Takeo Sugawara
发明人： Toshikazu Matsui , Takeo Sugawara
IPC分类号： H01J40/02 , H01J29/89 , H01J43/28
CPC分类号： H01J43/28 , H01J29/892
摘要： A photo electric conversion tube in which a translucent photocathode surface is provided inside of an incident light window. The incident light window is made of glass plate and an optical fiber plate bonded to at least part of the glass plate or just the optical fiber plate on the photocathode surface. The optical fiber plate contains fibers which are inclined at an angle to the photocathode surface.
摘要翻译：一种光电转换管，其中在入射光窗内设置有半透明光电阴极表面。入射光窗由玻璃板和光纤板制成，该光纤板与玻璃板的至少一部分或仅在光电阴极表面上的光纤板接合。光纤板含有与光电阴极表面倾斜一定角度的纤维。

50. 发明授权

US4380579A Electrostatic copying process and apparatus 失效
标题翻译：静电复印工艺及设备
公开(公告)号：US4380579A
公开(公告)日：1983-04-19
申请号：US88655
申请日：1979-10-26
申请人： Shoji Matsumoto , Toshikazu Matsui , Toshimitsu Ikeda , Nobuhiko Kozuka , Hitoshi Nishihama , Tatsuo Aizawa
发明人： Shoji Matsumoto , Toshikazu Matsui , Toshimitsu Ikeda , Nobuhiko Kozuka , Hitoshi Nishihama , Tatsuo Aizawa
IPC分类号： G03G15/09 , G03G15/30 , G03G13/00 , G03G21/00
CPC分类号： G03G15/30 , G03G15/09 , G03G21/1661 , G03G2221/0005 , G03G2221/1606 , G03G2221/1627 , G03G2221/1633 , G03G2221/1654 , G03G2221/1657 , G03G2221/1672 , G03G2221/1678 , G03G2221/1684 , G03G2221/1869
摘要： An electrostatic copying apparatus has a housing having at its top surface a transparent plate on which to place an original to be copied, a rotary drum disposed within the housing and having a photosensitive member on its surface, a charging, a developing, a transferring and a cleaning mechanism which are successively arranged around the rotary drum in the moving direction of its surface, an optical system for projecting the image of the original onto the surface of the rotary drum between the charging means and the developing means, and a receptor sheet conveying system for transferring a receptor sheet through a transfer station defined between the surface of the rotary drum and the transferring mechanism. A support is mounted on the housing so that it is slidable in the forward and rearward directions between its operating position within the housing and its pulled-out position ahead of the housing, and the rotary drum and the developing device are mounted on the support so that they can be separately and independently detached from the support. An electrostatic copying process can be efficiently practiced by using this apparatus.
摘要翻译：静电复印设备具有壳体，其顶表面具有透明板，放置要复制的原件，设置在壳体内的旋转鼓，表面具有感光构件，充电，显影，转印和一个在其表面移动方向上依次布置在旋转滚筒周围的清洁机构，用于将原稿的图像投影到充电装置和显影装置之间的旋转滚筒表面上的光学系统，以及传送用于通过限定在旋转鼓的表面和转印机构之间的转印站转印接收片的系统。支撑件安装在壳体上，使得其可以在壳体内的操作位置和其在壳体前方的拉出位置之间在前后方向上滑动，并且旋转鼓和显影装置安装在支撑件上它们可以单独地和独立地从支撑体分离。通过使用该装置可以有效地实施静电复印处理。

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