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41. 发明授权

US5729760A System for providing first type access to register if processor in first mode and second type access to register if processor not in first mode 失效
标题翻译：用于提供第一类访问的系统，如果处理器处于第一模式并且第二类型访问则注册处理器不处于第一模式
公开(公告)号：US5729760A
公开(公告)日：1998-03-17
申请号：US667789
申请日：1996-06-21
申请人： David I. Poisner
发明人： David I. Poisner
IPC分类号： G06F13/10 , G06F9/38 , G06F15/00 , G06F15/02
CPC分类号： G06F9/3869
摘要： A method of providing access to an input/output (I/O)-mapped register of a computer system is described. The computer system includes a processor operable in a system management mode (SMM), in which the processor accesses a dedicated system management memory space, a real mode, a protected mode and a virtual 8086 mode. The method includes the steps of firstly receiving an access request at the I/O-mapped register. Logic circuitry associated with the I/O-mapped register then determines whether the processor is operating in SMM by examining the status of a system management interrupt acknowledge (SMIACT#) output of the processor. If the logic circuitry determines that the processor is operating in SMM, a first, unrestricted type of access by the processor to the I/O-mapped register is provided. Alternatively, if the logic circuitry determines that the processor is not operating in SMM, a second, restricted type of access by the processor to the I/O-mapped register is provided. If the first, unrestricted type of access is provided to the processor, it performs an operation, under the direction of code stored in the dedicated system management memory address space, on the contents of the I/O-mapped register.
摘要翻译：描述了提供对计算机系统的输入/输出（I / O）映射寄存器的访问的方法。计算机系统包括可以以系统管理模式（SMM）操作的处理器，其中处理器访问专用系统管理存储器空间，实模式，保护模式和虚拟8086模式。该方法包括首先在I / O映射寄存器处接收访问请求的步骤。与I / O映射寄存器相关联的逻辑电路然后通过检查处理器的系统管理中断确认（SMIACT＃）输出的状态来确定处理器是否在SMM中运行。如果逻辑电路确定处理器在SMM中操作，则提供处理器对I / O映射寄存器的第一种无限制类型的访问。或者，如果逻辑电路确定处理器不在SMM中操作，则提供处理器对I / O映射寄存器的第二种限制类型的访问。如果向处理器提供第一种不受限制的访问类型，则在存储在专用系统管理存储器地址空间中的代码的方向上执行对I / O映射寄存器的内容的操作。

42. 发明申请

US20170091346A1 TECHNOLOGIES FOR PHYSICAL PROGRAMMING 审中-公开
公开(公告)号：US20170091346A1
公开(公告)日：2017-03-30
申请号：US14866897
申请日：2015-09-26
申请人： Glen J. Anderson , Kevin W. Bross , Shawn S. Mceuen , Mark R. Francis , Yevgeniy Y. Yarmosh , Blanka Vlasak , Gregory A. Peek , Therese E. Dugan , Cory A. Harris , Ravishankar Iyer , Omesh Tickoo , David I. Poisner
发明人： Glen J. Anderson , Kevin W. Bross , Shawn S. Mceuen , Mark R. Francis , Yevgeniy Y. Yarmosh , Blanka Vlasak , Gregory A. Peek , Therese E. Dugan , Cory A. Harris , Ravishankar Iyer , Omesh Tickoo , David I. Poisner
IPC分类号： G06F17/50
摘要： Technologies for physical programming include a model compute system to determine one or more physical blocks assembled in a constructed model. The model compute system determines rules associated with the one or more physical blocks in which at least one rule defines a behavior of the constructed model and determines a program stack for execution by the model compute system based on the rules associated with the one or more physical blocks.

43. 发明申请

US20160310838A1 MAGIC WAND METHODS, APPARATUSES AND SYSTEMS 有权
标题翻译：魔法方法，装置和系统
公开(公告)号：US20160310838A1
公开(公告)日：2016-10-27
申请号：US14697343
申请日：2015-04-27
申请人： David I. Poisner , Gregory A. Peek , Blanka Vlasak , Yevgeniy Y. Yarmosh , Mark R. Francis
发明人： David I. Poisner , Gregory A. Peek , Blanka Vlasak , Yevgeniy Y. Yarmosh , Mark R. Francis
IPC分类号： A63F13/23 , G06F3/16 , A63F13/92 , G06F3/01 , A63F13/215 , H04L29/08 , A63F13/211
CPC分类号： H04L67/306 , A63F13/00 , H04L67/10 , H04L67/38
摘要： Methods, apparatuses, systems, and storage media for creating, discovering, and/or resolving spells using a wand are provided. In embodiments, a computing device or a wand may detect one or more gestures and sensors in the wand may generate sensor data representative of the one or more gestures. The one or more gestures may be movements performed using the wand. The computing device or wand may convert the sensor data representative of the one or more gestures into a spell sequence. The wand may transmit the spell sequence to a computing device, and receive, from the computing device, a spell output based on the spell sequence and a wand position. The wand may also determine the spell output based on the spell sequence without transmitting the spell sequence to another device. Other embodiments may be described and/or claimed.
摘要翻译：提供了使用魔杖创建，发现和/或解析法术的方法，设备，系统和存储介质。在实施例中，计算设备或魔杖可以检测一个或多个手势，并且魔杖中的传感器可以生成代表一个或多个手势的传感器数据。一个或多个手势可以是使用魔杖执行的动作。计算设备或魔杖可以将表示一个或多个手势的传感器数据转换成拼写序列。魔杖可以将拼写序列传送到计算设备，并且从计算设备接收基于拼写序列和魔杖位置的拼写输出。魔杖还可以基于拼写顺序确定拼写输出，而不将拼写序列传输到另一个设备。可以描述和/或要求保护其他实施例。

44. 发明授权

US08775803B2 High security display of private data 有权
标题翻译：高安全性显示私有数据
公开(公告)号：US08775803B2
公开(公告)日：2014-07-08
申请号：US12974994
申请日：2010-12-21
申请人： David I. Poisner
发明人： David I. Poisner
IPC分类号： H04L9/00 , G06F21/60 , G09C5/00 , G06F21/62 , H04L29/06
CPC分类号： G06F21/606 , G06F21/6245 , G09C5/00 , H04L63/0471 , H04L63/0492 , H04L2209/16 , H04L2209/88
摘要： A device, method, and computer-readable medium are disclosed. In one embodiment, the device includes an inbound port to receive information from an information retrieval peripheral. The device also includes an outbound port to send information to a local computing device. The device includes masking logic to cause the local computing device to recognize the portable security device as at least one of a plurality of endpoint devices. The device also includes data obfuscation logic that is capable of obfuscating simple data format data, received from the information retrieval peripheral, obfuscating that data into a non-simple data format, and sending the obfuscated data to the local computing device. The non-simple data format includes at least one frame of video.
摘要翻译：公开了一种设备，方法和计算机可读介质。在一个实施例中，设备包括用于从信息检索外设接收信息的入站端口。该设备还包括向本地计算设备发送信息的出站端口。该设备包括屏蔽逻辑，以使本地计算设备将便携式安全设备识别为多个端点设备中的至少一个。该设备还包括数据混淆逻辑，其能够模糊从信息检索外设接收的简单数据格式数据，将数据模糊成非简单数据格式，以及将混淆数据发送到本地计算设备。非简单数据格式包括至少一帧视频。

45. 发明申请

US20140176572A1 Offloading Touch Processing To A Graphics Processor 有权
公开(公告)号：US20140176572A1
公开(公告)日：2014-06-26
申请号：US13724291
申请日：2012-12-21
申请人： Balaji Vembu , David I. Poisner , Arvind Kumar , Chaitanya R. Gandra
发明人： Balaji Vembu , David I. Poisner , Arvind Kumar , Chaitanya R. Gandra
IPC分类号： G06T1/20
CPC分类号： G06T1/20
摘要： In an embodiment, a processor includes a graphics domain including a graphics engines each having at least one execution unit. The graphics domain is to schedule a touch application offloaded from a core domain to at least one of the plurality of graphics engines. The touch application is to execute responsive to an update to a doorbell location in a system memory coupled to the processor, where the doorbell location is written responsive to a user input to the touch input device. Other embodiments are described and claimed.

46. 发明申请

US20110213990A1 APPARATUS AND METHOD FOR CONTENT PROTECTION USING ONE-WAY BUFFERS 审中-公开
标题翻译：使用单向缓冲器的内容保护的装置和方法
公开(公告)号：US20110213990A1
公开(公告)日：2011-09-01
申请号：US13104795
申请日：2011-05-10
申请人： David I. Poisner
发明人： David I. Poisner
IPC分类号： G06F12/14
CPC分类号： G06F21/126 , H04L9/08 , H04L2209/60
摘要： Method and apparatus for content protection using one-way buffers. In one embodiment, the method includes storage of content decrypted by a host processor within a reserved range of memory. In one embodiment, a peripheral device requires the host processor to decrypt the received content for playback by the peripheral device. The decrypted content is stored within a reserved range of memory that is not accessible by malicious software. Hence, content is transferred from the reserved range of memory to a device driver of the peripheral device. In one embodiment, access to the reserved range of memory consists of write-only access by the host processor and read-only access by the peripheral device. In one embodiment, prior to storage of the content within the reserved range of memory, the content is re-encrypted prior to storage and decryption prior to transfer to the peripheral device. Other embodiments are described and claimed.
摘要翻译：使用单向缓冲器进行内容保护的方法和装置。在一个实施例中，该方法包括将主机处理器解密的内容存储在存储器的保留范围内。在一个实施例中，外围设备要求主机处理器解密所接收的内容以供外围设备重放。解密的内容存储在不能被恶意软件访问的存储器的保留范围内。因此，内容从存储器的保留范围传送到外围设备的设备驱动器。在一个实施例中，对存储器的保留范围的访问由主处理器的只写访问和外围设备的只读访问组成。在一个实施例中，在将内容存储在存储器的保留范围之前，在传送到外围设备之前，内容在存储和解密之前被重新加密。描述和要求保护其他实施例。

47. 发明授权

US07921293B2 Apparatus and method for unilaterally loading a secure operating system within a multiprocessor environment 有权
标题翻译：在多处理器环境中单方面加载安全操作系统的装置和方法
公开(公告)号：US07921293B2
公开(公告)日：2011-04-05
申请号：US11340181
申请日：2006-01-24
申请人： Michael A. Kozuch , James A. Sutton, II , David Grawrock , Gilbert Neiger , Richard A. Uhlig , Bradley G. Burgess , David I. Poisner , Clifford D. Hall , Andy Glew , Lawrence O. Smith, III , Robert George
发明人： Michael A. Kozuch , James A. Sutton, II , David Grawrock , Gilbert Neiger , Richard A. Uhlig , Bradley G. Burgess , David I. Poisner , Clifford D. Hall , Andy Glew , Lawrence O. Smith, III , Robert George
IPC分类号： H04L9/00 , G06F21/00
CPC分类号： G06F21/57
摘要： An apparatus and method for unilaterally loading a secure operating system within a multiprocessor environment are described. The method includes disregarding a received load secure region instruction when a currently active load secure region operation is detected. Otherwise, a memory protection element is directed, in response to the received load secure region instruction, to form a secure memory environment. Once directed, unauthorized read/write access to one or more protected memory regions are prohibited. Finally, a cryptographic hash value of the one or more protected memory regions is stored within a digest information repository as a secure software identification value. Once stored, outside agents may request access to a digitally signed software identification value to establish security verification of secure software within the secure memory environment.
摘要翻译：描述了在多处理器环境内单方面加载安全操作系统的装置和方法。该方法包括当检测到当前活动的负载安全区域操作时忽略接收的负载安全区域指令。否则，响应于接收到的负载安全区域指令，引导存储器保护元件以形成安全存储器环境。一旦定向，就禁止对一个或多个受保护的存储器区域进行未经授权的读/写访问。最后，一个或多个受保护的存储器区域的加密散列值作为安全的软件识别值存储在摘要信息库中。一旦存储，外部代理可以请求访问数字签名的软件标识值以建立安全存储器环境内的安全软件的安全验证。

48. 发明授权

US07903502B2 Automatic read of current time when exiting low-power state utility 有权
标题翻译：自动读取当前时间退出低功耗状态实用程序
公开(公告)号：US07903502B2
公开(公告)日：2011-03-08
申请号：US10830201
申请日：2004-04-21
申请人： David I. Poisner
发明人： David I. Poisner
IPC分类号： G04F8/00
CPC分类号： G06F9/4843 , G06F9/4893 , Y02D10/24
摘要： A method and apparatus is described for computing a duration of a reduced power consumption state. A time of exiting from the reduced power consumption state is read prior to an execution of an interrupt routine. The read time of exiting is then stored in a register and a calculation of a reduced power consumption state duration may be performed.
摘要翻译：描述了用于计算降低功耗状态的持续时间的方法和装置。在执行中断程序之前，读取从降低功耗状态退出的时间。然后将读出的时间存储在寄存器中，并且可以执行降低的功耗状态持续时间的计算。

49. 发明授权

US07797728B2 Mechanism to generate restricted and unrestricted execution environments 有权
标题翻译：生成受限和不受限制的执行环境的机制
公开(公告)号：US07797728B2
公开(公告)日：2010-09-14
申请号：US10974217
申请日：2004-10-27
申请人： David I. Poisner
发明人： David I. Poisner
IPC分类号： H04L9/32 , G06F7/04 , H04L9/00
CPC分类号： G06F21/71 , G06F9/468 , G06F9/50
摘要： According to one embodiment, computer system is disclosed. The computer system includes a central processing unit (CPU) having a first thread having first associated thread identification (ID) and a second thread having second associated thread ID. The computer system also includes a chipset coupled to receive access requests from the CPU and to examine a thread ID included with the access request to determine which thread is requesting access.
摘要翻译：根据一个实施例，公开了一种计算机系统。计算机系统包括具有具有第一相关联的线程标识（ID）的第一线程和具有第二相关线程ID的第二线程的中央处理单元（CPU）。计算机系统还包括耦合以从CPU接收访问请求并检查包含在访问请求中的线程ID以确定哪个线程正在请求访问的芯片组。

50. 发明授权

US07363523B2 Method and apparatus for controlling power management state transitions 有权
标题翻译：用于控制电源管理状态转换的方法和装置
公开(公告)号：US07363523B2
公开(公告)日：2008-04-22
申请号：US10931565
申请日：2004-08-31
申请人： Tsvika Kurts , Alon Naveh , Efraim Rotem , Brad M. Dendinger , Jorge P. Rodriguez , Ernest Knoll , David I. Poisner
发明人： Tsvika Kurts , Alon Naveh , Efraim Rotem , Brad M. Dendinger , Jorge P. Rodriguez , Ernest Knoll , David I. Poisner
IPC分类号： G06F1/32 , G06F1/00 , G01R21/06
CPC分类号： G06F1/324 , G06F1/3203 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： An integrated circuit device, such as a processor initiates a transition to a first power management state. The device then receives a request to exit the first power management state and, in response exits the first power management state at the highest of a reference operating voltage, such as a minimum operating voltage, and a current voltage. For one aspect, an analog to digital converter may be used to determine the current voltage level. Further, for one aspect the first power management state may be a deeper sleep (C4) state, and the processor may quickly exit to a C2 state in response to a bus event such as a bus snoop.
摘要翻译：诸如处理器的集成电路器件启动向第一电源管理状态的转变。然后，设备接收到退出第一电源管理状态的请求，并且响应于退出基准工作电压（例如最小工作电压）和当前电压的最高处的第一电源管理状态。一方面，可以使用模数转换器来确定当前的电压电平。此外，对于一个方面，第一电源管理状态可以是更深的睡眠（C 4）状态，并且处理器可以响应于总线事件（例如总线监听）而快速退出到C 2状态。

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