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41. 发明授权

US07676626B2 Non-volatile memory system storing data in single-level cell or multi-level cell according to data characteristics 有权
标题翻译：非易失性存储器系统根据数据特性将数据存储在单级单元或多级单元中
公开(公告)号：US07676626B2
公开(公告)日：2010-03-09
申请号：US11640304
申请日：2006-12-18
申请人： Yang-sup Lee , Prakash Talawar , Chan-ik Park
发明人： Yang-sup Lee , Prakash Talawar , Chan-ik Park
IPC分类号： G06F13/00 , G11C5/06
CPC分类号： G06F3/0643 , G06F3/0613 , G06F3/0616 , G06F3/064 , G06F3/0679 , G06F3/068 , G06F12/0246 , G06F2212/7202 , G06F2212/7211 , G11C2211/5641
摘要： Provided is a system storing data received from an application or file system in a non-volatile memory system of single-level cells and multi-level cells in accordance with one or more data characteristics. The non-volatile memory system includes a non-volatile memory cell array having a plurality of multi-level cells forming a MLC area and a plurality of single-level cells forming a SLC area, and an interface unit analyzing a characteristic of the write data and generating a corresponding data characteristic signal. A flash transition layer receives the data characteristic signal, and determines whether the write data should be stored in the MLC area or the SLC area based on whether or not the write data will be accessed by the file, or whether the address associated with the write data is frequently updated or not.
摘要翻译：提供了一种系统，其根据一个或多个数据特征将从应用或文件系统接收的数据存储在单级单元和多级单元的非易失性存储器系统中。非易失性存储器系统包括具有形成MLC区域的多个多电平单元和形成SLC区域的多个单电平单元的非易失性存储单元阵列，以及分析写入数据的特性的接口单元并产生相应的数据特征信号。闪速转换层接收数据特征信号，并且基于写入数据是否被文件访问来确定写入数据是否应存储在MLC区域或SLC区域中，或者是否与写入相关联的地址数据频繁更新。

42. 发明授权

US07487303B2 Flash memory device and associated data merge method 失效
标题翻译：闪存设备及相关数据合并方法
公开(公告)号：US07487303B2
公开(公告)日：2009-02-03
申请号：US11319281
申请日：2005-12-29
申请人： Dong-Hyun Song , Chan-Ik Park , Sang-Ryul Min
发明人： Dong-Hyun Song , Chan-Ik Park , Sang-Ryul Min
IPC分类号： G06F12/00
CPC分类号： G06F3/064 , G06F3/061 , G06F3/0679 , G06F12/0246
摘要： A memory system comprises a flash memory and a controller comprising a control logic circuit and a working memory storing a flash translation layer. The memory system performs a merge operation by selectively copying a page from a first block of the flash memory to a second block of the flash memory. Where the page is valid and marked as allocated according to a file allocation table stored in the flash memory, the page is copied to the second block. However, where the page is valid and marked as deleted in the file allocation table, the page is not copied to the second block.
摘要翻译：存储器系统包括闪速存储器和包括控制逻辑电路和存储闪存转换层的工作存储器的控制器。存储器系统通过选择性地将闪存的第一块的页面复制到闪速存储器的第二块来执行合并操作。如果页面有效并且根据存储在闪存中的文件分配表被标记为分配页面，则将该页面复制到第二块。但是，如果页面有效并在文件分配表中标记为已删除，则页面不会复制到第二个块。

43. 发明申请

US20080195833A1 SYSTEMS, METHODS AND COMPUTER PROGRAM PRODUCTS FOR OPERATING A DATA PROCESSING SYSTEM IN WHICH A FILE SYSTEM'S UNIT OF MEMORY ALLOCATION IS COORDINATED WITH A STORAGE SYSTEM'S READ/WRITE OPERATION UNIT 审中-公开
标题翻译：用于操作数据处理系统的系统，方法和计算机程序产品，其中文件系统的存储器分配单元与存储系统的读/写操作单元协调
公开(公告)号：US20080195833A1
公开(公告)日：2008-08-14
申请号：US12016702
申请日：2008-01-18
申请人： Chan-Ik Park
发明人： Chan-Ik Park
IPC分类号： G06F12/00 , G06F15/177
CPC分类号： G06F12/0246 , G06F3/061 , G06F3/064 , G06F3/0679
摘要： A data processing system is operated by obtaining a read/write operation unit size used in performing data operations in a data storage device, setting a file system unit of memory allocation size to a multiple of the read/write operation unit size, and setting a unit of memory allocation starting address to a read/write operation unit starting address used by the data storage device.
摘要翻译：数据处理系统通过获得在数据存储装置中执行数据操作所使用的读/写操作单元尺寸来操作，将存储器分配大小的文件系统单元设置为读/写操作单元大小的倍数，并设置存储器分配单元开始地址到由数据存储设备使用的读/写操作单元起始地址。

44. 发明申请

US20080189485A1 COOPERATIVE MEMORY MANAGEMENT 有权
标题翻译：合作记忆管理
公开(公告)号：US20080189485A1
公开(公告)日：2008-08-07
申请号：US11833731
申请日：2007-08-03
申请人： Myoung-Soo Jung , Chan-Ik Park , Sang-Jin Oh
发明人： Myoung-Soo Jung , Chan-Ik Park , Sang-Jin Oh
IPC分类号： G06F13/00
CPC分类号： G06F12/0246 , G06F2212/1041 , G06F2212/7201 , G06F2212/7205 , G06F2212/7206 , G11C16/349
摘要： A cooperative memory card system includes a memory card device, and a host in signal communication with the memory card device, where the host assumes at least one memory management function for the memory card device; and a corresponding method of cooperative memory management between a host and a memory card device includes selecting at least one of several memory management functions to be performed by the host for the device.
摘要翻译：协作存储卡系统包括存储卡设备和与存储卡设备进行信号通信的主机，其中主机对存储卡设备采取至少一个存储器管理功能; 以及在主机和存储卡设备之间的协作存储器管理的相应方法包括选择由主机为设备执行的几个存储器管理功能中的至少一个。

45. 发明申请

US20080184006A1 Method and System for Preloading Page Using Control Flow 有权
标题翻译：使用控制流预加载页面的方法和系统
公开(公告)号：US20080184006A1
公开(公告)日：2008-07-31
申请号：US11833003
申请日：2007-08-02
申请人： Min-Soo Moon , Chan Ik Park
发明人： Min-Soo Moon , Chan Ik Park
IPC分类号： G06F12/02
CPC分类号： G06F8/4442
摘要： A method and system for page preloading using a control flow are provided. The method includes extracting preload page information from one or more pages in a first program code, and generating a second program code including the first program code and the extracted preload page information. The second program code is stored in non-volatile memory. When loading a page from the second program code stored in the non-volatile memory into main memory, preloading one or more pages from the non-volatile memory based on the preload page information stored in the loaded page.
摘要翻译：提供了一种使用控制流程进行页面预加载的方法和系统。该方法包括从第一程序代码中的一个或多个页面提取预加载页面信息，以及生成包括第一程序代码和所提取的预加载页面信息的第二程序代码。第二个程序代码存储在非易失性存储器中。当将存储在非易失性存储器中的第二程序代码的页面加载到主存储器中时，基于存储在加载的页面中的预加载页面信息，从非易失性存储器预加载一个或多个页面。

46. 发明申请

US20060212674A1 Run level address mapping table and related method of construction 有权
标题翻译：运行级地址映射表及相关方法
公开(公告)号：US20060212674A1
公开(公告)日：2006-09-21
申请号：US11319280
申请日：2005-12-29
申请人： Hyun-Mo Chung , Hye-Young Kim , Chan-Ik Park
发明人： Hyun-Mo Chung , Hye-Young Kim , Chan-Ik Park
IPC分类号： G06F12/10 , G06F12/00
CPC分类号： G06F12/0246
摘要： A run level address mapping table and related method of construction is disclosed. The address mapping table is constructed on a run basis, e.g., a group of consecutive pages having consecutive logical or physical addresses. The run level address mapping table stores only an initial physical page number of each run and the number of the consecutive physical pages.
摘要翻译：公开了运行级地址映射表及相关的构造方法。地址映射表以运行为基础构建，例如，具有连续逻辑或物理地址的一组连续页面。运行级地址映射表仅存储每个运行的初始物理页号和连续物理页的数量。

47. 发明授权

US08838875B2 Systems, methods and computer program products for operating a data processing system in which a file delete command is sent to an external storage device for invalidating data thereon 有权
标题翻译：用于操作数据处理系统的系统，方法和计算机程序产品，其中将文件删除命令发送到外部存储设备以使其上的数据无效
公开(公告)号：US08838875B2
公开(公告)日：2014-09-16
申请号：US12016737
申请日：2008-01-18
申请人： Chan-Ik Park
发明人： Chan-Ik Park
IPC分类号： G06F12/00 , G06F12/02 , G06F17/30 , G06F3/06 , G06F12/14
CPC分类号： G06F12/0246 , G06F3/0623 , G06F3/0652 , G06F3/0679 , G06F12/14 , G06F17/30117 , G06F2212/1052 , G06F2212/7209
摘要： A data processing system that includes a host system and an external data storage device with an erase before write memory device thereon can be operated by sending a file delete command from the host to the data storage device for one or more files stored thereon. The file delete command may specify a logical address and data to be invalidated associated with the deleted file. The data storage device may identify one or more units of memory allocation in the erase before write memory as containing invalid data based on the specified logical address and data to be invalidated. The data storage device may maintain a data structure that associates physical addresses for units of memory allocation in the erase before write memory with indications of whether the units of memory allocation contain invalid data. The data structure may be used to mark units of memory allocation associated with deleted files as containing invalid data.
摘要翻译：可以通过从主机向存储在其上的一个或多个文件的数据存储设备发送文件删除命令来操作包括主机系统和其上具有擦除的外部数据存储设备的数据处理系统。文件删除命令可以指定与被删除的文件相关联的逻辑地址和要被无效的数据。数据存储装置可以基于指定的逻辑地址和要被无效的数据来识别在写入存储器之前的擦除中的一个或多个存储器分配单元包含无效数据。数据存储装置可以保持将写入存储器中的擦除中的存储器分配单元的物理地址与存储器分配单元是否包含无效数据的指示相关联的数据结构。数据结构可以用于将与删除的文件相关联的存储器分配的单位标记为包含无效数据。

48. 发明授权

US08745309B2 Cooperative memory management 有权
标题翻译：合作记忆管理
公开(公告)号：US08745309B2
公开(公告)日：2014-06-03
申请号：US11833731
申请日：2007-08-03
申请人： Myoung-Soo Jung , Chan-Ik Park , Sang-Jin Oh
发明人： Myoung-Soo Jung , Chan-Ik Park , Sang-Jin Oh
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/0246 , G06F2212/1041 , G06F2212/7201 , G06F2212/7205 , G06F2212/7206 , G11C16/349
摘要： A cooperative memory card system includes a memory card device, and a host in signal communication with the memory card device, where the host assumes at least one memory management function for the memory card device; and a corresponding method of cooperative memory management between a host and a memory card device includes selecting at least one of several memory management functions to be performed by the host for the device.
摘要翻译：协作存储卡系统包括存储卡设备和与存储卡设备进行信号通信的主机，其中主机对存储卡设备采取至少一个存储器管理功能; 以及在主机和存储卡设备之间的协作存储器管理的相应方法包括选择由主机为设备执行的几个存储器管理功能中的至少一个。

49. 发明授权

US08732413B2 Method and system for preloading page using control flow 有权
标题翻译：使用控制流预加载页面的方法和系统
公开(公告)号：US08732413B2
公开(公告)日：2014-05-20
申请号：US11833003
申请日：2007-08-02
申请人： Min-Soo Moon , Chan Ik Park
发明人： Min-Soo Moon , Chan Ik Park
IPC分类号： G06F12/00
CPC分类号： G06F8/4442
摘要： A method and system for page preloading using a control flow are provided. The method includes extracting preload page information from one or more pages in a first program code, and generating a second program code including the first program code and the extracted preload page information. The second program code is stored in non-volatile memory. When loading a page from the second program code stored in the non-volatile memory into main memory, preloading one or more pages from the non-volatile memory based on the preload page information stored in the loaded page.
摘要翻译：提供了一种使用控制流程进行页面预加载的方法和系统。该方法包括从第一程序代码中的一个或多个页面提取预加载页面信息，以及生成包括第一程序代码和所提取的预加载页面信息的第二程序代码。第二个程序代码存储在非易失性存储器中。当将存储在非易失性存储器中的第二程序代码的页面加载到主存储器中时，基于存储在加载的页面中的预加载页面信息，从非易失性存储器预加载一个或多个页面。

50. 发明授权

US08489852B2 Method and system for manipulating data 有权
公开(公告)号：US08489852B2
公开(公告)日：2013-07-16
申请号：US12815445
申请日：2010-06-15
申请人： Myung-hyun Jo , Chan-ik Park
发明人： Myung-hyun Jo , Chan-ik Park
IPC分类号： G06F12/00
CPC分类号： G06F12/00 , G06F12/0246 , G06F2212/7201 , Y02D10/13
摘要： A method of manipulating data includes receiving a data manipulation command for corresponding data, which corresponds to a first logical block address, to a second logical block address. The method further includes mapping the second logical block address to a physical block address, which is mapped to the first logical block address, in response to the data manipulation command. A system for manipulating data includes a host and a flash translation layer. The host transmits a data manipulation command for corresponding data, which corresponds to a first logical block address, to a second logical block address. The flash translation layer maps the second logical block address to a physical block address, which is mapped to the first logical block address, in response to the data manipulation command.

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