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1. 发明授权

US08769378B2 Controller, a method of operating the controller and a memory system 有权
标题翻译：控制器，操作控制器和存储器系统的方法
公开(公告)号：US08769378B2
公开(公告)日：2014-07-01
申请号：US13070620
申请日：2011-03-24
申请人： Sung Joo Yoo , Nam-Wook Kang , Chan Ik Park , Hyun Jin Choi
发明人： Sung Joo Yoo , Nam-Wook Kang , Chan Ik Park , Hyun Jin Choi
IPC分类号： G11C29/00
CPC分类号： G06F11/1068 , G11C2029/0411
摘要： The present disclosure provides a controller which comprises a command generator configured to generate a command to non volatile memory, and buffer configured to receive a first data and a second data and configured to combine the first data and the second data, an ECC unit configured to perform the ECC decoding. And the first page data may include at least one error bit corresponding to an error location table and the second page data may include at least one original bit which can be replaced with the error bit. The buffer may replace the at least one error bit with the said at least one original bit. The error location table may save information of location for the repeated error bit.
摘要翻译：本公开提供一种控制器，其包括命令发生器，其被配置为生成对非易失性存储器的命令，以及配置为接收第一数据和第二数据并被配置为组合第一数据和第二数据的缓冲器，ECC单元，被配置为执行ECC解码。并且第一页数据可以包括对应于错误位置表的至少一个错误位，并且第二页数据可以包括可以用错误位替换的至少一个原始位。所述缓冲器可以用所述至少一个原始位替换所述至少一个错误位。错误位置表可以保存重复错误位的位置信息。

2. 发明授权

US08615702B2 Method and apparatus for correcting errors in memory device 有权
标题翻译：用于校正存储器件中的错误的方法和装置
公开(公告)号：US08615702B2
公开(公告)日：2013-12-24
申请号：US13236701
申请日：2011-09-20
申请人： Sung Joo Yoo , Nam-Wook Kang , Chan Ik Park , Hyun Jin Choi
发明人： Sung Joo Yoo , Nam-Wook Kang , Chan Ik Park , Hyun Jin Choi
IPC分类号： H03M13/00
CPC分类号： G06F11/1012
摘要： A memory controller analyzes read data received from a memory device and first error correction code (ECC) data of the read data. A control unit generates a plurality of sub-data from write data to be written in the memory device where the number of error bits in the read data is greater than a number of error bits that can be corrected using the first ECC data. An ECC block generates the first ECC data and second ECC data by using substantially the same algorithm to correct errors in each of the sub-data. The control unit transmits each of the sub-data, the first ECC data and the second ECC data to the memory device.
摘要翻译：存储器控制器分析从存储器件接收的读取数据和读取数据的第一纠错码（ECC）数据。控制单元从要写入存储器件的写入数据产生多个子数据，其中读取数据中的错误位数大于可以使用第一ECC数据校正的错误位数。 ECC块通过使用基本上相同的算法来校正每个子数据中的错误来生成第一ECC数据和第二ECC数据。控制单元将每个子数据，第一ECC数据和第二ECC数据发送到存储器件。

3. 发明授权

US08510500B2 Device driver including a flash memory file system and method thereof and a flash memory device and method thereof 有权
标题翻译：包括闪速存储器文件系统及其方法的设备驱动程序和闪速存储器件及其方法
公开(公告)号：US08510500B2
公开(公告)日：2013-08-13
申请号：US12926193
申请日：2010-11-01
申请人： Min-Soo Moon , Chan-Ik Park , Prakash Talawar
发明人： Min-Soo Moon , Chan-Ik Park , Prakash Talawar
IPC分类号： G06F12/00
CPC分类号： G06F12/0246
摘要： A device driver including a flash memory file system and method thereof and a flash memory device and method thereof are provided. The example device driver may include a flash memory file system configured to receive data scheduled to be written into the flash memory device, the flash memory file system selecting one of a first data storage area and a second data storage area within the flash memory device to write the received data to based upon an expected frequency of updating for the received data, the first data storage area configured to store data which is expected to be updated more often than the second data storage area. The example flash memory device may include a first data storage area configured to store first data, the first data having a first expected frequency for updating and a second data storage area configured to store second data, the second data having a second expected frequency of updating, the first expected frequency being higher than the second expected frequency.
摘要翻译：提供了一种包括闪速存储器文件系统及其方法的设备驱动器和闪速存储器件及其方法。该示例设备驱动器可以包括：闪速存储器文件系统，被配置为接收被调度以写入闪速存储器件的数据;闪速存储器文件系统，选择闪速存储器件内的第一数据存储区域和第二数据存储区域中的一个，基于接收到的数据的预期更新频率来写入接收到的数据，第一数据存储区域被配置为存储期望比第二数据存储区域更频繁地更新的数据。示例性闪存设备可以包括被配置为存储第一数据的第一数据存储区域，具有用于更新的第一预期频率的第一数据和被配置为存储第二数据的第二数据存储区域，第二数据具有第二预期频率的更新，第一预期频率高于第二预期频率。

4. 发明申请

US20120151294A1 METHOD AND APPARATUS FOR CORRECTING ERRORS IN MEMORY DEVICE 有权
标题翻译：用于校正存储器件中的错误的方法和装置
公开(公告)号：US20120151294A1
公开(公告)日：2012-06-14
申请号：US13236701
申请日：2011-09-20
申请人： Sung Joo Yoo , Nam-Wook Kang , Chan Ik Park , Hyun Jin Choi
发明人： Sung Joo Yoo , Nam-Wook Kang , Chan Ik Park , Hyun Jin Choi
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： G06F11/1012
摘要： A memory controller analyzes read data received from a memory device and first error correction code (ECC) data of the read data. A control unit generates a plurality of sub-data from write data to be written in the memory device where the number of error bits in the read data is greater than a number of error bits that can be corrected using the first ECC data. An ECC block generates the first ECC data and second ECC data by using substantially the same algorithm to correct errors in each of the sub-data. The control unit transmits each of the sub-data, the first ECC data and the second ECC data to the memory device.
摘要翻译：存储器控制器分析从存储器件接收的读取数据和读取数据的第一纠错码（ECC）数据。控制单元从要写入存储器件的写入数据产生多个子数据，其中读取数据中的错误位数大于可以使用第一ECC数据校正的错误位数。 ECC块通过使用基本上相同的算法来校正每个子数据中的错误来生成第一ECC数据和第二ECC数据。控制单元将每个子数据，第一ECC数据和第二ECC数据发送到存储器件。

5. 发明授权

US07970981B2 Flash memory device with multi-level cells and method of writing data therein 有权
标题翻译：具有多级单元的闪存设备及其中写入数据的方法
公开(公告)号：US07970981B2
公开(公告)日：2011-06-28
申请号：US11702573
申请日：2007-02-06
申请人： Won-Moon Cheon , Seon-Taek Kim , Chan-Ik Park , Sung-up Choi
发明人： Won-Moon Cheon , Seon-Taek Kim , Chan-Ik Park , Sung-up Choi
IPC分类号： G06F12/06 , G11C16/04 , G11C11/34 , G11C16/06
CPC分类号： G06F3/0613 , G06F3/0631 , G06F3/0632 , G06F3/064 , G06F3/0679 , G06F12/0246 , G06F2212/1021 , G06F2212/2022 , G06F2212/7202 , G06F2212/7208 , G11C2211/5641
摘要： In one aspect, a method of writing data in a flash memory system is provided. The flash memory system forms an address mapping pattern according to a log block mapping scheme. The method includes determining a writing pattern of data to be written in a log block, and allocating one of SLC and MLC blocks to the log block in accordance with the writing pattern of the data.
摘要翻译：一方面，提供一种在闪存系统中写入数据的方法。闪存系统根据日志块映射方案形成地址映射模式。该方法包括确定要写入日志块的数据的写入模式，并根据数据的写入模式将SLC和MLC块中的一个分配给对数块。

6. 发明申请

US20110138115A1 SOLID STATE MEMORY (SSM), COMPUTER SYSTEM INCLUDING AN SSM, AND METHOD OF OPERATING AN SSM 审中-公开
标题翻译：固态存储器（SSM），包括SSM的计算机系统以及操作SSM的方法
公开(公告)号：US20110138115A1
公开(公告)日：2011-06-09
申请号：US13027299
申请日：2011-02-15
申请人： Moon-wook Oh , Do-geun Kim , Chan-ik Park
发明人： Moon-wook Oh , Do-geun Kim , Chan-ik Park
IPC分类号： G06F12/00
CPC分类号： G06F3/0605 , G06F3/0604 , G06F3/0647 , G06F3/0649 , G06F3/0658 , G06F3/0659 , G06F3/0679 , G06F12/0246 , G06F12/08 , G06F2003/0697 , G06F2212/7202 , G11C11/56 , G11C16/10
摘要： In one aspect, data is stored in a solid state memory which includes first and second memory layers. A first assessment is executed to determine whether received data is hot data or cold data. Received data which is assessed as hot data during the first assessment is stored in the first memory layer, and received data which is first assessed as cold data during the first assessment is stored in the second memory layer. Further, a second assessment is executed to determine whether the data stored in the first memory layer is hot data or cold data. Data which is then assessed as cold data during the second assessment is migrated from the first memory layer to the second memory layer.
摘要翻译：在一个方面，数据被存储在包括第一和第二存储器层的固态存储器中。执行第一次评估以确定接收的数据是热数据还是冷数据。在第一次评估期间被评估为热数据的接收数据被存储在第一存储器层中，并且在第一次评估期间首先被评估为冷数据的接收数据被存储在第二存储器层中。此外，执行第二评估以确定存储在第一存储器层中的数据是热数据还是冷数据。然后在第二次评估期间被评估为冷数据的数据从第一存储器层迁移到第二存储器层。

7. 发明申请

US20110004724A1 METHOD AND SYSTEM FOR MANIPULATING DATA 有权
标题翻译：用于操作数据的方法和系统
公开(公告)号：US20110004724A1
公开(公告)日：2011-01-06
申请号：US12815445
申请日：2010-06-15
申请人： Myung-hyun Jo , Chan-ik Park
发明人： Myung-hyun Jo , Chan-ik Park
IPC分类号： G06F12/00 , G06F12/16
CPC分类号： G06F12/00 , G06F12/0246 , G06F2212/7201 , Y02D10/13
摘要： A method of manipulating data includes receiving a data manipulation command for corresponding data, which corresponds to a first logical block address, to a second logical block address. The method further includes mapping the second logical block address to a physical block address, which is mapped to the first logical block address, in response to the data manipulation command. A system for manipulating data includes a host and a flash translation layer. The host transmits a data manipulation command for corresponding data, which corresponds to a first logical block address, to a second logical block address. The flash translation layer maps the second logical block address to a physical block address, which is mapped to the first logical block address, in response to the data manipulation command.
摘要翻译：一种操纵数据的方法包括：将对应于第一逻辑块地址的相应数据的数据操作命令接收到第二逻辑块地址。该方法还包括响应于数据操作命令将第二逻辑块地址映射到映射到第一逻辑块地址的物理块地址。用于操纵数据的系统包括主机和闪存转换层。主机将对应于第一逻辑块地址的相应数据的数据操作命令发送到第二逻辑块地址。闪存转换层响应于数据操作命令将第二逻辑块地址映射到映射到第一逻辑块地址的物理块地址。

8. 发明申请

US20100290283A1 Programming Method for Flash Memory Device 有权
标题翻译：闪存设备编程方法
公开(公告)号：US20100290283A1
公开(公告)日：2010-11-18
申请号：US12776620
申请日：2010-05-10
申请人： Hyun-jin Choi , Chan-ik Park
发明人： Hyun-jin Choi , Chan-ik Park
IPC分类号： G11C16/04
CPC分类号： G11C11/5628 , G11C16/0483 , G11C16/32
摘要： Provided is a programming method that increases writing performance of a flash memory device. The programming method for a flash memory device that includes a plurality of banks including a plurality of memory cells for storing multi-bit data includes the following: programming a most significant bit (MSB) page with respect to banks of a first bank group; programming a least significant bit (LSB) page with respect to banks of a second bank group; programming the MSB page with respect to the banks of the second bank group; and programming the LSB page with respect to the banks of the first bank group.
摘要翻译：提供了一种提高闪存设备的写入性能的编程方法。一种包括多个存储多位数据存储单元的多个存储单元的闪速存储器件的编程方法，包括以下步骤：针对第一组组的存储体编程最高位（MSB）页; 编程相对于第二银行组的银行的最低有效位（LSB）页面; 针对第二银行集团的银行编程MSB页面; 并且相对于第一银行组的银行编程LSB页面。

9. 发明申请

US20100274953A1 DATA STORAGE DEVICE AND INFORMATION PROCESSING SYSTEM INCORPORATING DATA STORAGE DEVICE 有权
标题翻译：数据存储设备和信息处理系统，包含数据存储设备
公开(公告)号：US20100274953A1
公开(公告)日：2010-10-28
申请号：US12764464
申请日：2010-04-21
申请人： Tae Hack LEE , Sang Kyoo JEONG , Myung Hyun JO , Chan Ik PARK
发明人： Tae Hack LEE , Sang Kyoo JEONG , Myung Hyun JO , Chan Ik PARK
IPC分类号： G06F12/00 , G06F1/26 , G06F12/02
CPC分类号： G06F12/0607 , G06F1/266 , Y02D10/13
摘要： A data storage device comprises a plurality of memory devices and a memory controller. The memory controller exchanges data with the memory devices via a plurality of channels. The memory controller decodes an external command to generate a driving power mode and accesses the memory devices according to the driving power mode.
摘要翻译：数据存储装置包括多个存储装置和存储器控制器。存储器控制器通过多个通道与存储器件交换数据。存储器控制器解码外部命令以产生驱动功率模式，并根据驱动功率模式访问存储器件。

10. 发明申请

US20100153631A1 Method and data storage device for processing commands 有权
标题翻译：用于处理命令的方法和数据存储设备
公开(公告)号：US20100153631A1
公开(公告)日：2010-06-17
申请号：US12657029
申请日：2010-01-11
申请人： Kui-Yon Moon , Moon-Wook Oh , Do-Geun Kim , Chan-Ik Park
发明人： Kui-Yon Moon , Moon-Wook Oh , Do-Geun Kim , Chan-Ik Park
IPC分类号： G06F12/00 , G06F12/02 , G06F11/16 , G06F13/14
CPC分类号： G06F12/0246 , G06F12/08 , G06F13/1694 , G06F2212/7202 , G11C11/5628 , G11C16/10 , G11C2211/5641
摘要： A data storage device for processing a command includes a host interface and a controller. The host interface stores program information sent within the command from a host. The controller decodes the program information that indicates a memory type to be accessed for the command. In addition, the controller determines whether the specified memory type can be accessed according to the command. The controller performs the command by accessing the memory type when the memory type specified by the program information is available for access.
摘要翻译：用于处理命令的数据存储装置包括主机接口和控制器。主机接口存储从主机发出的命令中发送的程序信息。控制器对指示要访问的命令的存储器类型的程序信息进行解码。此外，控制器根据命令确定是否可以访问指定的存储器类型。当由程序信息指定的存储器类型可用于访问时，控制器通过访问存储器类型执行命令。

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