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31. 发明申请

US20020140003A1 Solid-state imaging device 有权
标题翻译：固态成像装置
公开(公告)号：US20020140003A1
公开(公告)日：2002-10-03
申请号：US09821936
申请日：2001-03-30
发明人： Koichi Mizobuchi , Hiroyuki Gotoh , Satoru Adachi
IPC分类号： H01L021/00 , H01L021/339 , H01L027/148 , H01L029/768
CPC分类号： H01L27/14806
摘要： Object: To provide a solid-state imaging device having contacts for a charge sweeping component or the like, with which increases in dark current can be suppressed while increases in contact resistance and the production of alloy spikes can be prevented, and to provide a method for manufacturing this device. Means for Solution: A solid-state imaging device having a charge accumulator for producing and accumulating signal charges when light is received, and a charge transfer component for transferring these signal charges, comprising a conductive layer 18 formed on a substrate 10, such as a silicon layer or metal wiring; an insulating film 21 formed over the conductive layer 18; an opening CH formed over the insulating film 21 and leading to the conductive layer 18; and a wiring layer 34 composed of aluminum containing copper in an amount between 0.4 and 5 wt %, formed at least inside the opening CH contiguously with the surface of the conductive layer 18. The wiring layer 34 is formed by coherent sputtering, and the treatment steps following the formation of the wiring layer 34 are carried out at a temperature of 350null C. or lower.
摘要翻译：目的：提供一种具有用于电荷清除部件等的触点的固态成像装置，能够抑制接触电阻的增加并且可以防止暗电流的增加，并且可以防止合金尖峰的产生，并且提供一种方法用于制造此设备。解决方案的手段：具有用于在接收光时产生和累积信号电荷的电荷累加器的固态成像装置和用于传送这些信号电荷的电荷转移部件，包括形成在基板10上的导电层18，例如硅层或金属布线; 形成在导电层18上的绝缘膜21; 形成在绝缘膜21上并通向导电层18的开口CH; 以及由铜含量为0.4〜5重量％的铜构成的布线层34，至少在与导电层18的表面连续的开口部CH内形成。布线层34通过相干溅射形成，在形成布线层34之后的步骤在350℃或更低的温度下进行。

32. 发明申请

US20020117690A1 CMOS imager with storage capacitor 有权
标题翻译：具有存储电容器的CMOS成像器
公开(公告)号：US20020117690A1
公开(公告)日：2002-08-29
申请号：US10132273
申请日：2002-04-26
发明人： Howard E. Rhodes
IPC分类号： H01L027/148
CPC分类号： H01L27/14609 , H01L27/14643 , H01L27/14689 , H01L28/90
摘要： A CMOS imager having an improved signal to noise ratio and improved dynamic range is disclosed. The CMOS imager provides improved charge storage by fabricating a storage capacitor in parallel with the photocollection area of the imager. The storage capacitor may be a flat plate capacitor formed over the pixel, a stacked capacitor or a trench imager formed in the photosensor. The CMOS imager thus exhibits a better signal-to-noise ratio and improved dynamic range. Also disclosed are processes for forming the CMOS imager.
摘要翻译：公开了具有改善的信噪比和改善的动态范围的CMOS成像器。 CMOS成像器通过与成像器的光电收集区域并行地制造存储电容器来提供改进的电荷存储。存储电容器可以是形成在像素上的平板电容器，形成在光电传感器中的层叠电容器或沟槽成像器。因此，CMOS成像器具有更好的信噪比和改善的动态范围。还公开了用于形成CMOS成像器的工艺。

33. 发明申请

US20020079518A1 Solid imaging device and production method thereof 失效
公开(公告)号：US20020079518A1
公开(公告)日：2002-06-27
申请号：US09852736
申请日：2001-05-11
申请人： Mitsubishi Denki Kabushiki Kaisha
发明人： Atsushi Maeda
IPC分类号： H01L021/00 , H01L027/148 , H01L029/768
CPC分类号： H01L27/14643 , H01L27/14609 , H01L27/1463 , H01L27/14689
摘要： A solid imaging device includes a semiconductor substrate, a photodiode including a first diffusion layer formed on the substrate; and a MOS transistor including a second diffusion layer (FD region) and a third diffusion layer formed on the principal surface as source/drain regions. The FD region serves to perform a function of converting a signal charge, which is determined by the photodiode, into a signal voltage. An Nnull diffusion layer having an impurity implanted at a high concentration is formed in the third diffusion layer in addition to an Nnull diffusion layer having an impurity implanted at a low concentration, whereas only an Nnull diffusion layer is formed in the FD region. An upper side of the FD region is covered with an oxide film serving as an implantation shielding layer for shielding against ion implantation.

34. 发明申请

US20020033504A1 Si-MOS high-frequency semiconductor device and the manufacturing method of the same 失效
标题翻译： Si-MOS高频半导体器件及其制造方法
公开(公告)号：US20020033504A1
公开(公告)日：2002-03-21
申请号：US09911581
申请日：2001-07-25
申请人： Mitsubishi Denki Kabushiki Kaisha
发明人： Takahiro Ohnakado
IPC分类号： H01L027/148
CPC分类号： H01L27/0255 , H01L27/0629 , H01L2924/0002 , H01L2924/00
摘要： An object of the present invention is to provide a sophisticated and highly reliable high-frequency Si-MOS semiconductor device having high ESD resistance. In the semiconductor device according to the present invention, lateral polysilicon diodes are formed and connected between high-frequency I/O signal line and the external supply voltage VDD, and between the ground GND and the high-frequency I/O signal line respectively. The forward direction of the diodes is the direction from the high-frequency I/O signal line to the VDD and the direction from the ground GND to the high-frequency I/O signal line respectively.
摘要翻译：本发明的目的是提供一种具有高耐ESD性的复杂且高可靠性的高频Si-MOS半导体器件。在根据本发明的半导体器件中，横向多晶硅二极管分别形成并连接在高频I / O信号线和外部电源电压VDD之间，并分别连接在地GND和高频I / O信号线之间。二极管的正向是分别从高频I / O信号线到VDD的方向以及从地GND到高频I / O信号线的方向。

35. 发明申请

US20020017684A1 Transistor with integrated photodetector for conductivity modulation 失效
公开(公告)号：US20020017684A1
公开(公告)日：2002-02-14
申请号：US09560658
申请日：2000-04-27
发明人： Richard A. Blanchard , David L. Whitney
IPC分类号： H01L027/148 , H01L029/768 , H01L029/76 , H01L029/94 , H01L031/062 , H01L031/113 , H01L031/119
CPC分类号： H01L27/1443 , H01L29/7393
摘要： A semiconductor device and a method of modulating the conductivity of a DMOS transistor included in the device utilize photocurrent generated by a photodetector for minority-carrier injection. The injection of minority carriers into the DMOS transistor of the device reduces the on-resistance of the transistor. The semiconductor device may be used in an optocoupling application. In a first embodiment, the semiconductor device includes a lateral DMOS transistor, a minority-carrier injector, and a photodetector. In a preferred embodiment, the semiconductor device is an integrated device, such that the transistor, the injector and the photodetector are collectively formed on a single semiconductive substrate. The photodetector of the device includes at least one electrically isolated photodiode. As an example, the photodetector may include two dielectrically isolated photodiodes. The photodiodes are serially connected between the drain terminal of the transistor and the minority-carrier injector. The connection to the minority-carrier injector allows the photocurrent generated by the photodiodes to be transmitted to the injector to provide the current/voltage needed by the injector to introduce minority carriers into the transistor. The connection to the drain terminal ensures that the voltage applied to the injector, when the photodetector is generating photocurrent, is maintained at a higher voltage than the drain voltage applied to the drain terminal, even if the drain voltage is fluctuating. In a second embodiment, the semiconductor device includes a vertical DMOS transistor, instead of a lateral DMOS transistor.

36. 发明申请

US20020000582A1 Semiconductor device including voltage down converter allowing tuning in short period of time and reduction of chip area 失效
标题翻译：包括电压降低转换器的半导体器件允许在短时间内调谐并减少芯片面积
公开(公告)号：US20020000582A1
公开(公告)日：2002-01-03
申请号：US09489474
申请日：2000-01-21
发明人： Mako Kobayashi , Fukashi Morishita
IPC分类号： H01L027/148
CPC分类号： G11C11/4074
摘要： When a tuning mode signal VTUNE is activated, control clock signal TCLK is output, and counter counts up tuning signals TSIG1 to TSIG4. Tuning circuits render conductive the terminals of respective transistors, and reference potential Vref lowers in accordance with the reduction in the resistance value. When reference potential Vref attains equal to the external reference potential Ext.Vref, differential amplifier circuit stops output of the control clock signal TCLK. In accordance with the plurality of the determined tuning signals TSIG1 to TSIG4, fuse elements inside the tuning circuits are programmed.
摘要翻译：当调谐模式信号VTUNE被激活时，输出控制时钟信号TCLK，并且计数器对调谐信号TSIG1至TSIG4进行计数。调谐电路使各个晶体管的端子导通，并且参考电位Vref根据电阻值的降低而降低。当参考电位Vref达到等于外部参考电位Ext.Vref时，差分放大电路停止输出控制时钟信号TCLK。根据多个确定的调谐信号TSIG1至TSIG4，编程调谐电路内的熔丝元件。

37. 发明申请

US20010035538A1 CHARGE COUPLED DEVICE HAVING CHARGE ACCUMULATING LAYER FREE FROM TOW-DIMENSIONAL EFFECT UNDER MINIATURIZATION AND PROCESS FOR FABRICATION THEREOF 有权
标题翻译：具有电荷积累层的电荷耦合装置在微型化过程中不受其尺寸效应和制造过程的影响
公开(公告)号：US20010035538A1
公开(公告)日：2001-11-01
申请号：US09451770
申请日：1999-12-01
发明人： YUKIYA KAWAKAMI , SHIGERU TOHYAMA
IPC分类号： H01L021/00 , H01L021/339 , H01L027/148
CPC分类号： H01L27/14812 , H01L27/14683
摘要： A charge coupled device has an n- type charge accumulating layer equal to or less than 5 micron in width, and the unit cells suffer from reduction of signal charge accumulated therein and an increased pulse height of a pulse signal for a substrate shutter, wherein at least one p- type local impurity region is formed in such a manner as to form a p-n junction together with the n- type charge accumulating layer and the n- type semiconductor substrate, thereby increasing the amount of signal charge accumulated in each unit cell without sacrifice of the pulse height of the pulse signal for the substrate shutter.
摘要翻译：电荷耦合器件具有宽度等于或小于5微米的n型电荷累积层，并且单位单元受到其中累积的信号电荷的减小和用于衬底快门的脉冲信号的增加的脉冲高度，其中在以与n型电荷累积层和n型半导体衬底一起形成pn结的方式形成至少一个p型局部杂质区域，从而增加在每个单元电池中累积的信号电荷量，而没有牺牲基板快门脉冲信号的脉冲高度。

38. 发明申请

US20010028066A1 Signal processing apparatus 失效
标题翻译：信号处理装置
公开(公告)号：US20010028066A1
公开(公告)日：2001-10-11
申请号：US09793572
申请日：2001-02-27
发明人： Mahito Shinohara , Tomoyuki Noda
IPC分类号： H01L031/111 , H01L027/148 , H01L031/072 , H01L031/109
CPC分类号： H04N5/378 , H04N5/3575 , H04N5/365 , H04N5/3742
摘要： The invention provides a signal processing apparatus comprising clamp capacitance means for receiving, at one electrode thereof, first and second signals outputted from a signal source, a signal transfer transistor of which one main electrode is connected to an other electrode of the clamp capacitance means, signal accumulating capacitance means connected to an other main electrode of the signal transfer transistor, and reset means for fixing the potential of the signal accumulating capacitance means, wherein the potential of the signal accumulating capacitance means is fixed by the reset means while the first signal is outputted from the signal source and the signal accumulating capacitance means is maintained in a floating state while the second signal is outputted from the signal source, and the signal transfer transistor is controlled in such a manner that the potential of the main electrode of the signal transfer transistor and that of the other main electrode thereof show different saturation operations while the signal charge is transferred through the clamp capacitance means and the signal transfer transistor during the output of the first and second signals, thereby causing the saturation current to transfer the signal charge.
摘要翻译：本发明提供了一种信号处理装置，包括钳位电容装置，用于在其一个电极处接收从信号源输出的第一和第二信号，一个主电极连接到钳位电容装置的另一个电极的信号传输晶体管，连接到信号传输晶体管的另一个主电极的信号累积电容装置，以及用于固定信号积聚电容装置的电位的复位装置，其中信号累积电容装置的电位由复位装置固定，而第一信号为从信号源输出并且信号积聚电容装置在从信号源输出第二信号的同时保持在浮置状态，并且信号传输晶体管被控制为使得信号传输的主电极的电位晶体管和其他主电极的晶体管显示不同在第一和第二信号的输出期间信号电荷通过钳位电容装置和信号传输晶体管传送，从而使饱和电流传送信号电荷。

39. 发明申请

US20010018097A1 Electrostatic-erasing abrasion-proof coating and method for forming the same 失效
公开(公告)号：US20010018097A1
公开(公告)日：2001-08-30
申请号：US09837335
申请日：2001-04-19
发明人： Kenji Itoh
IPC分类号： H01L027/148
CPC分类号： C04B41/85 , C03C17/3441 , C03C17/3488 , C03C17/42 , C04B41/5001 , C04B41/52 , C04B41/89 , C23C16/26 , C23C16/509 , H01L31/02161 , Y10S427/103 , Y10S427/104 , Y10T428/12931 , Y10T428/24983 , Y10T428/30
摘要： An abrasion-proof and static-erasing coating is formed on the contact surface of a contact image sensor. The coating comprises a first film having a high hardness and a low conductivity, a second film formed on the first film and having a low hardness and a high conductivity, and a third film having a high hardness and a high resistivity providing an abrasion-proof insulating external surface.

40. 发明申请

US20010017382A1 Optimized low leakage diodes, including photodiodes 有权
标题翻译：优化的低漏电二极管，包括光电二极管
公开(公告)号：US20010017382A1
公开(公告)日：2001-08-30
申请号：US09780390
申请日：2001-02-12
发明人： Howard E. Rhodes , Werner Juengling , Thomas A. Figura , Steven D. Cummings
IPC分类号： H01L027/148 , H01L029/768 , H01L031/062 , H01L031/113
CPC分类号： H01L27/14687 , H01L27/14609 , H01L27/14806 , H01L29/8611
摘要： A photodiode for use in an imager having an improved charge leakage. The photodiode has a doped region that is spaced away from the field isolation to minimize charge leakage. A second embodiment of invention provides a second implant to improve charge leakage to the substrate. The photodiodes according to the invention provide improve charge leakage, improved reactions to dark current and an improved signal to noise ratio. Also disclosed are processes for forming the photodiode.
摘要翻译：用于具有改善的电荷泄漏的成像器中的光电二极管。光电二极管具有与场隔离间隔开的掺杂区域，以最小化电荷泄漏。本发明的第二实施例提供了一种第二种植入物，用于改善对衬底的电荷泄漏。根据本发明的光电二极管提供改善电荷泄漏，改善对暗电流的反应和改善的信噪比。还公开了用于形成光电二极管的工艺。

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