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31. 发明授权

US5748029A MOS transistor switching circuit without body effect 失效
标题翻译： MOS晶体管开关电路无体效应
公开(公告)号：US5748029A
公开(公告)日：1998-05-05
申请号：US624126
申请日：1996-03-29
申请人： Luciano Tomasini , Rinaldo Castello , Giancarlo Clerici , Ivan Bietti
发明人： Luciano Tomasini , Rinaldo Castello , Giancarlo Clerici , Ivan Bietti
IPC分类号： H01L21/8234 , H01L27/088 , H03K17/16 , H03K17/687
CPC分类号： H03K17/6874 , H03K17/162 , H03K2217/0018
摘要： A switching circuit utilizing MOS transistors without body effect having a first transistor inserted with source and drain terminals between two connection terminals, and a second and third transistors inserted in series by means of their respective source and drain terminals between the first transistor and a ground. The gate terminal of the second transistor is connected to the gate terminal of the first transistor to which is applied a command signal. Upon switching a signal is applied in phase opposition to the command signal to the gate terminal of the third transistor. The substrates of the first and the second transistors are connected to a connection node between the second and third transistors. The substrate of the third transistor is connected to ground.
摘要翻译：利用具有体效应的MOS晶体管的开关电路具有在两个连接端子之间插入源极和漏极端子的第一晶体管，以及通过其第一晶体管和地之间的各自的源极和漏极端子串联插入的第二和第三晶体管。第二晶体管的栅极端子连接到施加有命令信号的第一晶体管的栅极端子。在切换时，与第三晶体管的栅极端子相反地施加与指令信号相反的信号。第一和第二晶体管的基板连接到第二和第三晶体管之间的连接节点。第三晶体管的基板连接到地。

32. 发明授权

US5337355A Supply circuit device for a user's telephone circuit, having a low voltage loss 失效
标题翻译：用于电话电路的供电电路装置，具有低电压损耗
公开(公告)号：US5337355A
公开(公告)日：1994-08-09
申请号：US991564
申请日：1992-12-16
申请人： Luciano Tomasini , Rinaldo Castello
发明人： Luciano Tomasini , Rinaldo Castello
IPC分类号： H04M1/00 , H04M19/08 , H04M19/00
CPC分类号： H04M19/08
摘要： A circuit is described which comprises an operational amplifier, two resistors connected between the telephone line and the inputs of the amplifier, a capacitor which is charged via a first bipolar transistor controlled by the amplifier via a first FET transistor, a second bipolar transistor in parallel to the connection of the first transistor and the capacitor, a second FET transistor, identical to the first and having its source and gate terminals connected to the corresponding terminals of the first, and two current generators connected to the drain terminals respectively of the first and the second FET transistor and to the bases, respectively, of the first and second bipolar transistor. The currents of the two generators and the other parameters of the circuit are such as to hold the first and second bipolar transistors in a conductive and a switched off state respectively, except when the line voltage fails below a minimum predetermined value; in which case the first and second transistors commute to the switched off and conductive states respectively. The circuit has a lower "voltage loss" than known circuits.
摘要翻译：描述了一种电路，其包括运算放大器，连接在电话线路和放大器的输入端之间的两个电阻器，经由第一FET晶体管由放大器控制的第一双极晶体管充电的电容器，并联的第二双极晶体管到第一晶体管和电容器的连接，第二FET晶体管，与第一晶体管和电容器的连接相同，并且其源极和栅极端子连接到第一晶体管的相应端子，以及两个电流发生器分别连接到第一和第二晶体管的漏极端子，第二FET晶体管和第一和第二双极晶体管的基极。除了当线路电压故障低于最小预定值之外，两个发生器的电流和电路的其它参数分别保持第一和第二双极晶体管处于导通和断开状态; 在这种情况下，第一和第二晶体管分别转换成关断和导通状态。该电路具有比已知电路低的“电压损耗”。

33. 发明授权

US5061901A Circuit arrangement for increasing the gain-bandwidth product of a CMOS amplifier 失效
标题翻译：用于增加CMOS放大器的增益带宽产品的电路布置
公开(公告)号：US5061901A
公开(公告)日：1991-10-29
申请号：US515952
申请日：1990-04-27
申请人： Germano Nicollini , Rinaldo Castello
发明人： Germano Nicollini , Rinaldo Castello
IPC分类号： H03F1/48 , H03F1/08 , H03F3/345 , H03F3/45
CPC分类号： H03F3/45179 , H03F1/086 , H03F3/45183 , H03F2203/45031 , H03F2203/45034 , H03F2203/45192 , H03F2203/45281 , H03F2203/45288 , H03F2203/45318 , H03F2203/45366 , H03F2203/45658
摘要： A circuit arrangement for increasing the gain-bandwidth product of a CMOS amplifier having a differential cell input stage comprises, within said input stage:a pair of active components having a characteristic function which corresponds with that of a negative value resistor, for increasing the transconductance of the stage,a pair of capacitors being each respectively associated with a corresponding one of the active components to introduce a pole/zero pair in the frequency response from the amplifier, andan additional input stage cross-connected to the differential cell for bringing the frequency value of the zero a predetermined distance away from the amplifier clipping frequency.

34. 发明申请

US20120139764A1 Continuous Time Sigma-Delta ADC with Embedded Low-Pass Filter 有权
标题翻译：具有嵌入式低通滤波器的连续时间Sigma-Delta ADC
公开(公告)号：US20120139764A1
公开(公告)日：2012-06-07
申请号：US13310587
申请日：2011-12-02
申请人： Marco Sosio , Antonio Liscidini , Rinaldo Castello , Gabriele Gandolfi , Vittorio Colonna
发明人： Marco Sosio , Antonio Liscidini , Rinaldo Castello , Gabriele Gandolfi , Vittorio Colonna
IPC分类号： H03M3/02 , H03M1/36 , H03M1/12
CPC分类号： H03M1/06 , H03M3/344 , H03M3/368 , H03M3/424 , H03M3/454 , H03M3/456
摘要： A filtering analog to digital converter (ADC) includes an integrator receiving at its input an analog input signal. A filtering capacitor at the input of the integrator filters out a large portion of out-of-band interferers in the analog input signal. The integrator produces an output that is quantized to produce a digital output. A feedback path between the quantizer output and the integrator input includes a digital to analog converter (DAC).
摘要翻译：滤波模数转换器（ADC）包括积分器，在其输入端接收模拟输入信号。积分器输入端的滤波电容滤除模拟输入信号中的大部分带外干扰源。积分器产生一个被量化以产生数字输出的输出。量化器输出和积分器输入之间的反馈路径包括数模转换器（DAC）。

35. 发明授权

US07880545B1 Cascode compensation circuit and method for amplifier stability 有权
标题翻译：串级补偿电路和放大器稳定性方法
公开(公告)号：US07880545B1
公开(公告)日：2011-02-01
申请号：US12397118
申请日：2009-03-03
申请人： Alessandro Venca , Daniele Ottini , Francesco Rezzi , Rinaldo Castello
发明人： Alessandro Venca , Daniele Ottini , Francesco Rezzi , Rinaldo Castello
IPC分类号： H03F1/14
CPC分类号： H03F3/45475 , H03F1/14 , H03F1/34 , H03F3/3022 , H03F2200/153 , H03F2200/297
摘要： The present invention provides compensation for circuits. In one embodiment, a compensation circuit has a first terminal coupled to an output terminal of the circuit and a second terminal coupled to feed back the output voltage to an internal node. A damping circuit may also be coupled to the output terminal. The damping circuit adds a pole and a zero to the transfer function of the circuit. In one embodiment, the damping circuit modifies the effect of the output impedance of a load on the transfer function to increase the phase margin of the circuit such that the circuit remains stable over an increased range of output capacitor values.
摘要翻译：本发明提供对电路的补偿。在一个实施例中，补偿电路具有耦合到电路的输出端的第一端子和耦合以将输出电压反馈到内部节点的第二端子。阻尼电路也可以耦合到输出端子。阻尼电路向电路的传递函数添加极点和零点。在一个实施例中，阻尼电路改变负载的输出阻抗对传递函数的影响，以增加电路的相位裕度，使得电路在输出电容器值的增加范围内保持稳定。

36. 发明授权

US06411166B1 Fully differential, switched capacitor, operational amplifier circuit with common-mode controlled output 有权
公开(公告)号：US06411166B1
公开(公告)日：2002-06-25
申请号：US09864916
申请日：2001-05-23
申请人： Andrea Baschirotto , Paolo Cusinato , Giampiero Montagna , Rinaldo Castello
发明人： Andrea Baschirotto , Paolo Cusinato , Giampiero Montagna , Rinaldo Castello
IPC分类号： H03F345
摘要： A switched operational amplifier with fully differential topology, alternately switchable on and off, and a control circuit. The operational amplifier has a first differential output (4a) and a second differential output, and a control terminal. The control circuit includes a capacitive detecting network including a first capacitor and a second capacitor connected between the first and second differential outputs and a common-mode node, and a third capacitor connected between the common-mode node and ground in a first operative condition, and between the common-mode node and the supply voltage in a second operative condition. A control transistor is connected between the common-mode node and the control terminal of the operational amplifier and supplies a control current correlated to the voltage on the common-mode node. A switchable voltage source, connected to the common-mode node, supplies a desired voltage in a first operative condition, when the operational amplifier is off.

37. 发明授权

US06239653B1 Biquadratic basic cell for programmable analog time-continuous filter 失效
标题翻译：可编程模拟时间连续滤波器的二次基本单元
公开(公告)号：US06239653B1
公开(公告)日：2001-05-29
申请号：US08984107
申请日：1997-12-03
申请人： Frencesco Rezzi , Rinaldo Castello , Marco Cazzaniga , Ivan Bietti
发明人： Frencesco Rezzi , Rinaldo Castello , Marco Cazzaniga , Ivan Bietti
IPC分类号： H03K500
CPC分类号： H03H11/0433
摘要： The invention relates to an elementary biquadratic cell for programmable time-continuous analog filters. The biquadratic cell is coupled between a first voltage reference and a second voltage reference and has at least one pair of input terminals and first and second pairs of output terminals. The cell includes a pair of half-cells, which half-cells are structurally identical with each other. Each half-cell comprises at least a first transistor coupled between the first and the second voltage reference and having a base terminal connected to a respective one of the input terminals. Each half-cell further comprises second and third transistors coupled between the first and second voltage references. The second transistor has a base terminal connected to the first output terminal of the first pair of output terminals and a collector terminal connected to the first output terminal of the second pair of output terminals. The third transistor has a collector terminal connected to the first output terminal of the first pair of output terminals and a base terminal connected to the second output terminal of the second pair of output terminals.
摘要翻译：本发明涉及用于可编程时间连续模拟滤波器的基本二次电池。二次电池耦合在第一参考电压和第二参考电压之间，并且具有至少一对输入端和第一和第二对输出端。细胞包括一对半细胞，半细胞在结构上彼此相同。每个半电池包括耦合在第一和第二参考电压之间的至少第一晶体管，并且具有连接到相应输入端子的基极端子。每个半电池还包括耦合在第一和第二电压基准之间的第二和第三晶体管。第二晶体管具有连接到第一对输出端子的第一输出端子的基极端子和与第二对输出端子的第一输出端子连接的集电极端子。第三晶体管具有连接到第一对输出端子的第一输出端子的集电极端子和连接到第二对输出端子的第二输出端子的基极端子。

38. 发明授权

US5825250A Operational amplifier having an adjustable frequency compensation 失效
标题翻译：具有可调频率补偿的运算放大器
公开(公告)号：US5825250A
公开(公告)日：1998-10-20
申请号：US757384
申请日：1996-11-27
申请人： Luciano Tomasini , Rinaldo Castello , Giancarlo Clerici , Ivan Bietti
发明人： Luciano Tomasini , Rinaldo Castello , Giancarlo Clerici , Ivan Bietti
IPC分类号： H03F1/08 , H03F1/14
CPC分类号： H03F1/086
摘要： An integrated operational amplifier with adjustable frequency compensation having a transconductance input stage and an amplifier output stage connected serially together between an input terminal and an output terminal of the operational amplifier. For the purpose of frequency compensation, moreover, a compensation block is connected across the input and the output of the output stage. The compensation block uses a plurality of charge storage elements connected in parallel together and in series with switch block which selects a sub-plurality of said charge storage elements in response to an external signal of the amplifier. The compensation block thereby provides an overall effective capacitance for frequency compensation.
摘要翻译：具有可变频率补偿的集成运算放大器，具有串联连接在运算放大器的输入端和输出端之间的跨导输入级和放大器输出级。此外，为了频率补偿的目的，在输出级的输入端和输出端之间连接补偿块。补偿块使用并联连接并与开关块串联的多个电荷存储元件，该开关块响应于放大器的外部信号选择子多个所述电荷存储元件。因此，补偿块为频率补偿提供总体有效电容。

39. 发明授权

US5815037A High-pass filter, particularly for canceling out the offset in a chain of amplifiers 失效
标题翻译：高通滤波器，特别是用于消除放大器链中的偏移
公开(公告)号：US5815037A
公开(公告)日：1998-09-29
申请号：US651106
申请日：1996-05-21
申请人： Luciano Tomasini , Rinaldo Castello , Ivan Bietti , Giancarlo Clerici
发明人： Luciano Tomasini , Rinaldo Castello , Ivan Bietti , Giancarlo Clerici
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , H03F3/45982 , H03F2203/45526
摘要： A high-pass filter includes at least one circuit unit constituted by a first branch and a second branch both connected to an input of the filter on one side and, on the other side, to an adder the output of which is the output of the filter. The first branch includes means for transferring an input signal substantially without modifying its frequency content, and the second branch comprises a low-pass filter. The circuit elements are chosen such that the components of the input signal with frequencies below the cut-off frequency of the low-pass filter are substantially cancelled out at the output of the adder. The filter is suitable for being produced within a particularly small area in an integrated circuit.
摘要翻译：高通滤波器包括由一侧连接到滤波器的输入的第一分支和第二分支构成的至少一个电路单元，另一侧由加法器输出，该加法器的输出为过滤。第一分支包括用于基本上不修改其频率内容来传送输入信号的装置，并且第二分支包括低通滤波器。电路元件被选择为使得低于低通滤波器的截止频率的输入信号的分量在加法器的输出处基本抵消。该滤波器适合于在集成电路的特别小的区域内产生。

40. 发明授权

US5587682A Four-quadrant biCMOS analog multiplier 失效
标题翻译：四象限biCMOS模拟乘法器
公开(公告)号：US5587682A
公开(公告)日：1996-12-24
申请号：US413772
申请日：1995-03-30
申请人： Gianluca Colli , Massimo Franciotta , Rinaldo Castello
发明人： Gianluca Colli , Massimo Franciotta , Rinaldo Castello
IPC分类号： G06G7/163 , G06G7/16 , H03K5/22
CPC分类号： G06G7/163
摘要： An analog multiplier circuit includes three transconductance stages. One of the transconductance stages, receiving a first differential voltage, conducts a differential current responsive to the first differential voltage from the other two transconductance stages. The differential current changes the transconductance in the other two transconductance stages, which are cross-coupled with one another. The second differential input voltage is presented to the other two transconductance stages in parallel, resulting in an output differential current or voltage based on the product of the first and second differential input voltages. Each of the transconductance stages is implemented in BiCMOS, and each includes two differential legs, each having a MOS transistor receiving an input signal and a cascode bipolar transistor. Each transconductance stage also includes a reference leg which develops the drain-source voltage for the MOS transistors; the first transconductance stage differentially varies this drain-source voltage in the other two stages to produce the product.
摘要翻译：模拟乘法器电路包括三个跨导级。接收第一差分电压的跨导级中的一个传导响应于来自其它两个跨导级的第一差分电压的差分电流。差分电流改变了另外两个跨导级的跨导，它们彼此交叉耦合。第二差分输入电压并联提供给另外两个跨导级，导致基于第一和第二差分输入电压的乘积的输出差分电流或电压。每个跨导级在BiCMOS中实现，并且每个跨导级包括两个差分支路，每个支路具有接收输入信号的MOS晶体管和共源共栅双极晶体管。每个跨导级还包括产生MOS晶体管的漏 - 源电压的参考支路; 第一跨导级在其他两个阶段差异地改变该漏极 - 源极电压以产生该产品。

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