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31. 发明申请

US20090063670A1 Method and apparatus for a network hub to diagnose network operation and broadcast information to a remote host or monitoring device 有权
标题翻译：用于网络集线器诊断网络操作和向远程主机或监控设备广播信息的方法和装置
公开(公告)号：US20090063670A1
公开(公告)日：2009-03-05
申请号：US12289194
申请日：2008-10-22
申请人： Ian Crayford , Thomas J. Runaldue
发明人： Ian Crayford , Thomas J. Runaldue
IPC分类号： G06F15/16
CPC分类号： H04L49/602 , H04L41/0213 , H04L41/022 , H04L43/0817 , H04L49/351
摘要： A network hub in a communication network that acts as a server to network clients to push, or transmit, information regarding the state of local and remote devices and networks. The information can be one, or more, status information, which information can be one or more predefined fields in a frame, which represents a packet of data. In one embodiment, it is desirable that the frame be a “legitimate” Ethernet-type frame. The status field can be a “push”-Type status field. The push operation can be a unicast, a multicast, or a broadcast, or a hybrid transmission. The hub can be a switch, repeater, a bridge, a router, a gateway, or a hybrid thereof. Also, the hub according to the present invention can be an OSI Layer 2 device, an OSI Layer 3 device, or a hybrid thereof. It is desirable that the hub be devoid of a microprocessor. As described herein, the hub may have plural ports, for example, four, eight, or more ports.
摘要翻译：通信网络中的网络集线器，充当服务器，以网络客户端推送或发送关于本地和远程设备和网络的状态的信息。该信息可以是一个或多个状态信息，哪个信息可以是表示数据分组的帧中的一个或多个预定义字段。在一个实施例中，期望该帧是“合法的”以太网类型的帧。状态字段可以是“推” - 类型状态字段。推送操作可以是单播，多播或广播或混合传输。集线器可以是交换机，中继器，网桥，路由器，网关或其混合。此外，根据本发明的集线器可以是OSI第二层设备，OSI第三层设备或其混合。希望集线器没有微处理器。如这里所述，集线器可以具有多个端口，例如四个，八个或更多个端口。

32. 发明授权

US07457857B1 Method and apparatus for a network hub to diagnose network operation and broadcast information to a remote host or monitoring device 有权
标题翻译：用于网络集线器诊断网络操作和向远程主机或监控设备广播信息的方法和装置
公开(公告)号：US07457857B1
公开(公告)日：2008-11-25
申请号：US09580665
申请日：2000-05-26
申请人： Ian Crayford , Thomas J. Runaldue
发明人： Ian Crayford , Thomas J. Runaldue
IPC分类号： G06F15/16
CPC分类号： H04L49/602 , H04L41/0213 , H04L41/022 , H04L43/0817 , H04L49/351
摘要： A network hub in a communication network that acts as a server to network clients to push, or transmit, information regarding the state of local and remote devices and networks. The information can be one, or more, status information, which information can be one or more predefined fields in a frame, which represents a packet of data. In one embodiment, it is desirable that the frame be a “legitimate” Ethernet-type frame. The status field can be a “push”-Type status field. The push operation can be a unicast, a multicast, or a broadcast, or a hybrid transmission. The hub can be a switch, repeater, a bridge, a router, a gateway, or a hybrid thereof. Also, the hub according to the present invention can be an OSI Layer 2 device, an OSI Layer 3 device, or a hybrid thereof. It is desirable that the hub be devoid of a microprocessor. As described herein, the hub may have plural ports, for example, four, eight, or more ports.
摘要翻译：通信网络中的网络集线器，充当服务器，以网络客户端推送或发送关于本地和远程设备和网络的状态的信息。该信息可以是一个或多个状态信息，哪个信息可以是表示数据分组的帧中的一个或多个预定义字段。在一个实施例中，期望该帧是“合法的”以太网类型的帧。状态字段可以是“推” - 类型状态字段。推送操作可以是单播，多播或广播或混合传输。集线器可以是交换机，中继器，网桥，路由器，网关或其混合。此外，根据本发明的集线器可以是OSI第二层设备，OSI第三层设备或其混合。希望集线器没有微处理器。如这里所述，集线器可以具有多个端口，例如四个，八个或更多个端口。

33. 发明授权

US06178483B1 Method and apparatus for prefetching data read by PCI host 失效
标题翻译：用于预取由PCI主机读取的数据的方法和装置
公开(公告)号：US06178483B1
公开(公告)日：2001-01-23
申请号：US08993045
申请日：1997-12-18
申请人： Thomas J. Runaldue , Denise Kerstein
发明人： Thomas J. Runaldue , Denise Kerstein
IPC分类号： G06F1200
CPC分类号： H04L49/3009 , G06F13/1605 , G06F13/24 , G11C11/412 , H04L12/1863 , H04L12/4641 , H04L12/4645 , H04L12/467 , H04L41/0213 , H04L47/50 , H04L47/6225 , H04L49/103 , H04L49/201 , H04L49/25 , H04L49/255 , H04L49/30 , H04L49/3027 , H04L49/3054 , H04L49/351 , H04L49/354 , H04L49/40 , H04L49/50 , H04L49/552 , H04L49/555 , H04L49/90 , H04L49/901 , H04L49/9047 , H04L49/9063 , H04L49/9073 , H04L49/9078 , H04L49/9084 , H04Q3/54591 , H04Q2213/1316 , H04Q2213/13162
摘要： Write posting buffers and read prefetch buffers are arranged in an integrated multiport switch between a PCI interface and an external memory interface. When a PCI host initiates a PCI transaction to write data from an external memory, the data provided by the PCI host is written into the write posting buffers. Then, the contents of the write posting buffers is transferred to the external memory. The read prefetch buffers are used to temporarily store data prefetched in anticipation of a PCI transaction initiated by the PCI host to read that data from the external memory. When the PCI host initiates the read transaction, the address of the requested data is compared with the address of the prefetched data to transfer the prefetched data to the host if a match is detected. In an auto-prefetch mode, data is automatically prefetched from the external memory when an extension bus port output queue contains a frame pointer for a frame queued for transmission over the PCI interface to the PCI host.
摘要翻译：写入缓冲区和读取预取缓冲区被布置在PCI接口和外部存储器接口之间的集成多端口交换机中。当PCI主机启动PCI事务以从外部存储器写入数据时，由PCI主机提供的数据被写入写入缓冲区。然后，写入缓冲区的内容被传送到外部存储器。读取预取缓冲器用于临时存储预先由PCI主机发起的PCI事务预读的数据，以从外部存储器读取该数据。当PCI主机启动读取事务时，将所请求数据的地址与预取数据的地址进行比较，以便在检测到匹配时将预取数据传输到主机。在自动预取模式下，当扩展总线端口输出队列包含排队等待通过PCI接口传送到PCI主机的帧的帧指针时，数据将自动从外部存储器预取。

34. 发明授权

US06169742A Multiport data network switch having direct media access control link to external management 失效
标题翻译：多端口数据网络交换机具有直接的媒体访问控制链接到外部管理
公开(公告)号：US06169742A
公开(公告)日：2001-01-02
申请号：US08992923
申请日：1997-12-18
申请人： Peter Ka-Fai Chow , Thomas J. Runaldue
发明人： Peter Ka-Fai Chow , Thomas J. Runaldue
IPC分类号： H04L1256
CPC分类号： H04L49/3009 , G06F13/1605 , G06F13/24 , G11C11/412 , H04L12/1863 , H04L12/4641 , H04L12/4645 , H04L12/467 , H04L41/0213 , H04L47/50 , H04L47/6225 , H04L49/103 , H04L49/201 , H04L49/25 , H04L49/255 , H04L49/30 , H04L49/3027 , H04L49/3054 , H04L49/351 , H04L49/354 , H04L49/40 , H04L49/50 , H04L49/552 , H04L49/555 , H04L49/90 , H04L49/901 , H04L49/9047 , H04L49/9063 , H04L49/9073 , H04L49/9078 , H04L49/9084 , H04Q3/54591 , H04Q2213/1316 , H04Q2213/13162
摘要： An integrated multiport switch (IMS) for a data network has a management port for direct communication with an external management agent. The switch, which is integrated into a single chip, includes a management interface that comprises logic circuit elements. This interface acts as a virtual physical layer for both the media access controller (MAC) at the management port and the MAC at the external management agent. The latter may be located on the same circuit board as the IMS chip. PHY devices for these MACs are eliminated while the collision signal and carrier sense signal generation functions are maintained. The PHY devices are replaced by a logic interface while permitting use of the standard Simplified Network Management Protocol (SNMP) software for the interfacing operations. No modification of MAC software is required.
摘要翻译：用于数据网络的集成多端口交换机（IMS）具有用于与外部管理代理进行直接通信的管理端口。集成到单个芯片中的开关包括包括逻辑电路元件的管理接口。该接口充当管理端口的媒体访问控制器（MAC）和外部管理代理的MAC的虚拟物理层。后者可以位于与IMS芯片相同的电路板上。消除了用于这些MAC的PHY设备，同时保持了冲突信号和载波感测信号生成功能。 PHY设备被逻辑接口替代，同时允许使用标准简化网络管理协议（SNMP）软件进行接口操作。不需要修改MAC软件。

35. 发明授权

US6094436A Integrated multiport switch having shared media access control circuitry 失效
标题翻译：具有共享媒体访问控制电路的集成多端口交换机
公开(公告)号：US6094436A
公开(公告)日：2000-07-25
申请号：US992921
申请日：1997-12-18
申请人： Thomas J. Runaldue , Somnath Viswanath , Peter Ka-Fai Chow
发明人： Thomas J. Runaldue , Somnath Viswanath , Peter Ka-Fai Chow
IPC分类号： G06F5/06 , G06F12/12 , G11C7/10 , G11C11/412 , H04L12/18 , H04L12/24 , H04L12/46 , H04L12/56 , H04L29/06 , H04Q3/545 , H04B7/212
CPC分类号： H04L41/0213 , G06F12/128 , G06F5/06 , G11C11/412 , G11C7/1015 , H04L49/3054 , H04L69/26 , H04Q3/54591 , H04L49/103 , H04L49/30 , H04L49/351 , H04L49/354 , H04Q2213/1316 , H04Q2213/13162
摘要： An integrated multiport switch (IMS) in which one combinational logic and register arrangement is provided for executing similar media access control (MAC) functions for a plurality of switch ports. The current access state at each of a plurality of switch ports is maintained at a single state storage location, whereby access of a stored port MAC state and update thereof is simplified. Access to state storage in coordination with the single common combinational logic and register arrangement enables MAC functions for each of the plurality of ports to be performed on a time shared basis to maximize efficiency of use of chip resources and architecture space.
摘要翻译：一种集成多端口交换机（IMS），其中提供一个组合逻辑和寄存器装置，用于为多个交换机端口执行类似的媒体访问控制（MAC）功能。在多个交换机端口中的每一个处的当前访问状态被保持在单个状态存储位置，由此简化了存储的端口MAC状态的访问及其更新。与单个公共组合逻辑和寄存器布置协调地访问状态存储使得能够以时间共享的方式执行多个端口中的每一个的MAC功能，以最大化芯片资源和架构空间的使用效率。

36. 发明授权

US6049885A Method and apparatus for allowing a remote node to awaken a sleeping node of a network 失效
标题翻译：允许远程节点唤醒网络的休眠节点的方法和装置
公开(公告)号：US6049885A
公开(公告)日：2000-04-11
申请号：US881067
申请日：1997-06-24
申请人： Glen Gibson , Thomas J. Runaldue , Ching Yu
发明人： Glen Gibson , Thomas J. Runaldue , Ching Yu
IPC分类号： G06F1/26 , G06F1/32 , G06F13/00 , H04L12/12 , H04L29/06 , H04Q9/00 , G06F1/00
CPC分类号： G06F1/3209 , H04L12/12 , Y02B60/32 , Y02B60/34
摘要： A system and method for remotely waking up a device connected to a local area network (LAN) is disclosed. A special data packet is disclosed wherein the destination address of the packet is embedded at least 16 consecutive times within the data field of the packet. When this particular type of packet is transmitted on the LAN, it is first decoded by the I/O subsystem of the device to determine whether or not it is a remote wake-up packet. After determining that the packet received is a remote wake-up packet, a wake-up enable line is activated thereby taking the system out of its low power mode, for providing further processing of future received packets.
摘要翻译：公开了用于远程唤醒连接到局域网（LAN）的设备的系统和方法。公开了一种特殊数据分组，其中分组的目的地地址至少在数据包的数据字段内嵌入16次。当这种特定类型的分组在LAN上发送时，首先由设备的I / O子系统解码，以确定它是否是远程唤醒分组。在确定接收到的分组是远程唤醒分组之后，激活唤醒使能线，从而使系统脱离其低功率模式，以提供未来接收分组的进一步处理。

37. 发明授权

US5479649A Method and apparatus for forming a logical combination of signals from diagnostic nodes in an IC chip for passive observation at a dedicated diagnostic pin 失效
标题翻译：用于形成来自IC芯片中的诊断节点的信号的逻辑组合的方法和装置，用于在专用诊断引脚处被动观察
公开(公告)号：US5479649A
公开(公告)日：1995-12-26
申请号：US877566
申请日：1992-05-01
申请人： Thomas J. Runaldue , Philip Ngai
发明人： Thomas J. Runaldue , Philip Ngai
IPC分类号： G01R31/28 , G01R31/3185 , G06F11/32 , G06F11/00
CPC分类号： G01R31/3185
摘要： Apparatus and method for programmably providing information on a dedicated output pin of an integrated circuit, which information is diagnostic about a plurality of nodes inside of said integrated circuit by connecting said plurality of nodes and a programmable set of binary gate signals to a combinatorial logic circuit and controlling the selection of said nodes being input to said logic circuit so that said combinatorial logic circuit provides a real time diagnostic signal to said dedicated output pin.
摘要翻译：用于可编程地在集成电路的专用输出引脚上提供信息的装置和方法，该信息通过将所述多个节点和可编程的二进制门信号组合连接到组合逻辑电路来诊断所述集成电路内的多个节点以及控制所述节点的选择被输入到所述逻辑电路，使得所述组合逻辑电路向所述专用输出引脚提供实时诊断信号。

38. 发明授权

US5469437A Network chip with auto sensing and reconfiguration 失效
标题翻译：具有自动感应和重新配置的网络芯片
公开(公告)号：US5469437A
公开(公告)日：1995-11-21
申请号：US897731
申请日：1992-06-12
申请人： Thomas J. Runaldue
发明人： Thomas J. Runaldue
IPC分类号： G06F13/00 , H04L12/413 , H04Q3/58
CPC分类号： H04L12/40182 , H04L12/413
摘要： Method and apparatus for enabling a local area network controller circuit to automatically select 10Base -T port data if the 10Base-T port data satisfies the IEEE 802.3 standard Link Test Pass requirement, and if the Link Test Pass indicates that the 10Base-T data is invalid, the controller switches automatically to connect a 10Base 2 or 5 coax port to the terminal.
摘要翻译：如果10Base-T端口数据满足IEEE 802.3标准链路测试通过要求，则使局域网控制器电路能够自动选择10Base -T端口数据的方法和装置，如果链路测试通过指示10Base-T数据是无效，控制器自动切换，将10Base 2或5同轴端口连接到终端。

39. 发明授权

US5160860A Input transition responsive CMOS self-boost circuit 失效
标题翻译：输入转换响应CMOS自升压电路
公开(公告)号：US5160860A
公开(公告)日：1992-11-03
申请号：US760414
申请日：1991-09-16
申请人： Thomas J. Runaldue
发明人： Thomas J. Runaldue
IPC分类号： H01L21/8238 , H01L27/092 , H03K17/0412 , H03K17/06 , H03K17/687 , H03K19/094
CPC分类号： H03K17/04123 , H03K17/063
摘要： A CMOS self-boost circuit inclused a pull-up N-channel transistor (MN1 ), a self-capacitance (SC), an N-channel gating transistor (MN2), a pull-up P-channel transistor (MP1), and a pulse circuit (18). The pulse circuit is formed of the delay network and a NAND logic gate (ND1). The pulse circuit is responsive to an input control signal making a low-to-high transition for generating a pulse signal. The gate of the pull-up P-channel transistor (MP1) is responsive to the pulse signal for pulling up initially the gate of the pull-up N-channel transistor (MN1) close to an upper power supply potential, thereby rendering greater conduction of the pull-up N-channel transistor (MN1) to provide a higher output voltage corresponding to a high logic state.

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