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1. 发明授权

US6084878A External rules checker interface 失效
标题翻译：外部规则检查器界面
公开(公告)号：US6084878A
公开(公告)日：2000-07-04
申请号：US993715
申请日：1997-12-18
申请人： Ian Crayford , Denise Kerstein , Peter Ka-Fai Chow , Chandan Egbert , Thomas J. Runaldue
发明人： Ian Crayford , Denise Kerstein , Peter Ka-Fai Chow , Chandan Egbert , Thomas J. Runaldue
IPC分类号： H04L12/46 , H04L12/56 , H04L12/28 , H04L12/54
CPC分类号： H04L12/4641 , H04L49/25 , H04L49/3027 , H04L49/351 , H04L49/354
摘要： An interface located on a network switch transmits header information to an external device that makes data forwarding decisions. The interface receives and transmits header information that includes the source and destination address of the data. The external device generates data forwarding information and transmits the information back to the switch via the interface device. The network switch uses the information obtained via the interface and forwards the data packets to the appropriate destination.
摘要翻译：位于网络交换机上的接口将报头信息发送到进行数据转发决策的外部设备。该接口接收并发送包括数据的源地址和目标地址的标题信息。外部设备生成数据转发信息，并通过接口设备将信息发送回交换机。网络交换机使用通过接口获得的信息，并将数据包转发到适当的目的地。

2. 发明授权

US6058112A Internal rules checker diagnostic mode 失效
标题翻译：内部规则检查器诊断模式
公开(公告)号：US6058112A
公开(公告)日：2000-05-02
申请号：US992492
申请日：1997-12-18
申请人： Denise Kerstein , Thomas J. Runaldue
发明人： Denise Kerstein , Thomas J. Runaldue
IPC分类号： H04L13/08 , G06F11/26 , G06F12/00 , G06F13/00 , G06F13/10 , G06F13/16 , G06F13/24 , G06F15/00 , G06F15/16 , G08B5/00 , G11C11/412 , H04B7/14 , H04J3/02 , H04J3/12 , H04J3/22 , H04J3/24 , H04L12/18 , H04L12/24 , H04L12/28 , H04L12/413 , H04L12/44 , H04L12/46 , H04L12/50 , H04L12/54 , H04L12/66 , H04L12/861 , H04L12/863 , H04L12/879 , H04L12/931 , H04L12/933 , H04L12/935 , H04L12/937 , H04L12/939 , H04L12/947 , H04Q3/545 , H04Q11/00
CPC分类号： H04L49/3009 , G06F13/1605 , G06F13/24 , G11C11/412 , H04L12/4641 , H04L12/5693 , H04L41/0213 , H04L47/6225 , H04L49/103 , H04L49/201 , H04L49/25 , H04L49/255 , H04L49/30 , H04L49/3027 , H04L49/351 , H04L49/354 , H04L49/50 , H04L49/552 , H04L49/555 , H04L49/90 , H04L49/901 , H04L49/9047 , H04L49/9063 , H04L49/9073 , H04L49/9078 , H04L49/9084 , H04Q3/54591 , H04L12/1863 , H04L12/4645 , H04L12/467 , H04L49/3054 , H04L49/40 , H04Q2213/1316 , H04Q2213/13162
摘要： A network switch data decision making engine is diagnosed while the switch is operating or after an error is detected. The switch receives data from connected stations and sends header information to the decision making engine. The header information is simultaneously transmitted to an external device. The decision making engine generates a data forwarding decision and outputs the decision to the external device. The operation of the decision making engine can then be checked by an external crevice, such as a logic analyzer.
摘要翻译：网络交换机数据决策引擎在交换机正在运行或检测到错误后被诊断。交换机从连接的站接收数据，并将头信息发送给决策引擎。标题信息同时发送到外部设备。决策引擎生成数据转发决策，并将决定输出到外部设备。决策引擎的操作可以由诸如逻辑分析仪之类的外部缝隙来检查。

3. 发明授权

US5953335A Method and apparatus for selectively discarding packets for blocked output queues in the network switch 失效
标题翻译：用于选择性地丢弃网络交换机中阻塞的输出队列的分组的方法和装置
公开(公告)号：US5953335A
公开(公告)日：1999-09-14
申请号：US992428
申请日：1997-12-18
申请人： Bahadir Erimli , Thomas J. Runaldue , Chandan Egbert , Denise Kerstein
发明人： Bahadir Erimli , Thomas J. Runaldue , Chandan Egbert , Denise Kerstein
IPC分类号： H04L12/18 , H04L12/24 , H04L12/56 , H04Q3/545 , H04L12/46 , H04L12/26
CPC分类号： H04L49/103 , H04L12/18 , H04L41/0213 , H04L49/201 , H04L49/255 , H04L49/3027 , H04L49/351 , H04Q3/54591 , H04L12/1868 , H04L49/20 , H04L49/30 , H04L49/3009 , H04L49/3054 , H04L49/354 , H04L49/45 , H04Q2213/1316 , H04Q2213/13162
摘要： An apparatus and method of controlling the transmission of copies of a frame of data from a multiport device, such as a multiport network switch, determines which ones of the ports are designated to transmit a copy of a multicopy frame received at the switch. The switch then determines which of these designated ports are not available to transmit a copy of the frame. The copies are transmitted from those designated ports that are available to transmit a copy of the multicopy frame, while the copies are discarded for those designated ports that are not available to transmit a copy of that multicopy frame.
摘要翻译：控制来自多端口设备（例如多端口网络交换机）的数据帧的副本的传输的装置和方法确定哪些端口被指定来传送在交换机处接收的多复制帧的副本。然后，交换机确定哪些指定的端口不可用于发送帧的副本。从可用于发送多拷贝帧的副本的指定端口发送副本，而对于不可用于传送该多拷贝帧的副本的那些指定端口，丢弃副本。

4. 发明授权

US06223305B1 Method and apparatus for resetting, enabling and freezing a communication device in a diagnostic process 失效
标题翻译：用于在诊断过程中重置，启用和冻结通信设备的方法和装置
公开(公告)号：US06223305B1
公开(公告)日：2001-04-24
申请号：US08993047
申请日：1997-12-18
申请人： Philip Simmons , Denise Kerstein , Thomas J. Runaldue , Chandan Egbert , Bahadir Erimli
发明人： Philip Simmons , Denise Kerstein , Thomas J. Runaldue , Chandan Egbert , Bahadir Erimli
IPC分类号： G06F1126
CPC分类号： H04L49/3009 , G06F13/1605 , G06F13/24 , G11C11/412 , H04L12/1863 , H04L12/4641 , H04L12/4645 , H04L12/467 , H04L41/0213 , H04L47/50 , H04L47/6225 , H04L49/103 , H04L49/201 , H04L49/25 , H04L49/255 , H04L49/30 , H04L49/3027 , H04L49/3054 , H04L49/351 , H04L49/354 , H04L49/40 , H04L49/50 , H04L49/552 , H04L49/555 , H04L49/90 , H04L49/901 , H04L49/9047 , H04L49/9063 , H04L49/9073 , H04L49/9078 , H04L49/9084 , H04Q3/54591 , H04Q2213/1316 , H04Q2213/13162
摘要： A resetting, enabling and freezing system is provided for controlling a communication device in a diagnostic process. A hardware reset of the device may be performed by a host via a reset pin of a PCI interface. A software reset of the device may be provided by setting a reset bit in a command register. To stop operations of the device substantially instantaneously, a freeze mode of diagnostics is provided. The freeze mode may be initiated using hardware or software freezing. To provide the hardware freezing, diagnostic logic is supplied with a freeze signal via a freeze pin of the PCI interface. The software freezing is performed by setting a freeze bit in the command register. To enable a diagnostician to reproduce an event causing an error, an enable/disable mode of diagnostics is carried out. In this mode, elements of the device are disabled one after another in a serial fashion, with a disable signal being passed serially from one element to another. After the elements are disabled, they may be set into a chosen state to recreate a required event.
摘要翻译：提供了一种复位，启用和冻结系统，用于在诊断过程中控制通信设备。设备的硬件复位可以由主机经由PCI接口的复位引脚执行。可以通过在命令寄存器中设置复位位来提供器件的软件复位。为了基本上瞬间停止设备的操作，提供了诊断的冻结模式。可以使用硬件或软件冻结来启动冻结模式。为了提供硬件冻结，诊断逻辑通过PCI接口的冻结引脚提供冻结信号。通过在命令寄存器中设置冻结位来执行软件冻结。为了使诊断程序能够重现导致错误的事件，执行启用/禁用模式的诊断。在这种模式下，器件的元件以串行方式一个接一个地禁用，其中禁用信号从一个元件串行地传递到另一个元件。元素被禁用后，它们可能被设置为选择状态以重新创建所需的事件。

5. 发明授权

US6111875A Apparatus and method for disabling external frame forwarding device for use with a network switch 失效
标题翻译：用于禁用与网络交换机一起使用的外部帧转发设备的装置和方法
公开(公告)号：US6111875A
公开(公告)日：2000-08-29
申请号：US993144
申请日：1997-12-18
申请人： Denise Kerstein , Chandan Egbert , Bahadir Erimli , Thomas J. Runaldue
发明人： Denise Kerstein , Chandan Egbert , Bahadir Erimli , Thomas J. Runaldue
IPC分类号： H04L13/08 , G06F11/26 , G06F12/00 , G06F13/00 , G06F13/10 , G06F13/16 , G06F13/24 , G06F15/00 , G06F15/16 , G08B5/00 , G11C11/412 , H04B7/14 , H04J3/02 , H04J3/12 , H04J3/22 , H04J3/24 , H04L12/18 , H04L12/24 , H04L12/28 , H04L12/413 , H04L12/44 , H04L12/46 , H04L12/50 , H04L12/54 , H04L12/66 , H04L12/861 , H04L12/863 , H04L12/879 , H04L12/931 , H04L12/933 , H04L12/935 , H04L12/937 , H04L12/939 , H04L12/947 , H04Q3/545 , H04Q11/00 , H04L12/56
CPC分类号： H04L49/3009 , G06F13/1605 , G06F13/24 , G11C11/412 , H04L12/4641 , H04L12/5693 , H04L41/0213 , H04L47/6225 , H04L49/103 , H04L49/201 , H04L49/25 , H04L49/255 , H04L49/30 , H04L49/3027 , H04L49/351 , H04L49/354 , H04L49/50 , H04L49/552 , H04L49/555 , H04L49/90 , H04L49/901 , H04L49/9047 , H04L49/9063 , H04L49/9073 , H04L49/9078 , H04L49/9084 , H04Q3/54591 , H04L12/1863 , H04L12/4645 , H04L12/467 , H04L49/3054 , H04L49/40 , H04Q2213/1316 , H04Q2213/13162
摘要： An interface device enables an external device connected to a network switch to be disabled. The interface device receives and transmits data to an external device which makes data forwarding decisions. When a disable signal is received by the network switch, the disable signal is transmitted to the external device over an existing data path. The external device returns an acknowledgement signal over an existing path to the switch. A timer is included as a failsafe mechanism in case the external device does not return an acknowledge signal. The timer waits a predetermined period of time and continues the shut down of the network switch as if the acknowledge signal was received.
摘要翻译：接口设备使得连接到网络交换机的外部设备能够被禁用。接口设备接收并发送数据到外部设备，进行数据转发决策。当网络交换机接收到禁用信号时，禁用信号通过现有数据路径发送到外部设备。外部设备通过现有路径返回到交换机的确认信号。在外部设备未返回确认信号的情况下，包括定时器作为故障保护机制。定时器等待预定的时间段，并继续关闭网络交换机，就像收到确认信号一样。

6. 发明授权

US06178483B1 Method and apparatus for prefetching data read by PCI host 失效
标题翻译：用于预取由PCI主机读取的数据的方法和装置
公开(公告)号：US06178483B1
公开(公告)日：2001-01-23
申请号：US08993045
申请日：1997-12-18
申请人： Thomas J. Runaldue , Denise Kerstein
发明人： Thomas J. Runaldue , Denise Kerstein
IPC分类号： G06F1200
CPC分类号： H04L49/3009 , G06F13/1605 , G06F13/24 , G11C11/412 , H04L12/1863 , H04L12/4641 , H04L12/4645 , H04L12/467 , H04L41/0213 , H04L47/50 , H04L47/6225 , H04L49/103 , H04L49/201 , H04L49/25 , H04L49/255 , H04L49/30 , H04L49/3027 , H04L49/3054 , H04L49/351 , H04L49/354 , H04L49/40 , H04L49/50 , H04L49/552 , H04L49/555 , H04L49/90 , H04L49/901 , H04L49/9047 , H04L49/9063 , H04L49/9073 , H04L49/9078 , H04L49/9084 , H04Q3/54591 , H04Q2213/1316 , H04Q2213/13162
摘要： Write posting buffers and read prefetch buffers are arranged in an integrated multiport switch between a PCI interface and an external memory interface. When a PCI host initiates a PCI transaction to write data from an external memory, the data provided by the PCI host is written into the write posting buffers. Then, the contents of the write posting buffers is transferred to the external memory. The read prefetch buffers are used to temporarily store data prefetched in anticipation of a PCI transaction initiated by the PCI host to read that data from the external memory. When the PCI host initiates the read transaction, the address of the requested data is compared with the address of the prefetched data to transfer the prefetched data to the host if a match is detected. In an auto-prefetch mode, data is automatically prefetched from the external memory when an extension bus port output queue contains a frame pointer for a frame queued for transmission over the PCI interface to the PCI host.
摘要翻译：写入缓冲区和读取预取缓冲区被布置在PCI接口和外部存储器接口之间的集成多端口交换机中。当PCI主机启动PCI事务以从外部存储器写入数据时，由PCI主机提供的数据被写入写入缓冲区。然后，写入缓冲区的内容被传送到外部存储器。读取预取缓冲器用于临时存储预先由PCI主机发起的PCI事务预读的数据，以从外部存储器读取该数据。当PCI主机启动读取事务时，将所请求数据的地址与预取数据的地址进行比较，以便在检测到匹配时将预取数据传输到主机。在自动预取模式下，当扩展总线端口输出队列包含排队等待通过PCI接口传送到PCI主机的帧的帧指针时，数据将自动从外部存储器预取。

7. 发明授权

US06141350A Auto-negotiation using negative link pulses 有权
标题翻译：使用负链路脉冲进行自动协商
公开(公告)号：US06141350A
公开(公告)日：2000-10-31
申请号：US291036
申请日：1999-04-14
申请人： Dinesh Mahale , Thomas J. Runaldue
发明人： Dinesh Mahale , Thomas J. Runaldue
IPC分类号： H04J3/06 , H04L5/14 , H04L12/24 , H04L12/413 , H04L25/03 , H04L29/06 , H04L29/08 , H04L12/40 , H04J3/02
CPC分类号： H04L25/03885 , H04J3/0688 , H04L12/40032 , H04L12/413 , H04L41/046 , H04L5/1438 , H04L69/323 , H04L49/3054
摘要： A novel auto-negotiation system capable of performing auto-negotiation using negative link pulses. The auto-negotiation system operates in a network transceiver for interconnecting multiple hub communication devices having different operating speeds and link partners provided on a transmission medium. The network transceiver comprises physical layer devices for supporting data exchange between the hub devices and the link partners, and an auto-negotiation device that transmits and receives link pulses of a prescribed polarity carrying auto-negotiation information to and from the link partners to select a mode of communication between the hub devices and the link partners. A reverse polarity detection and correction circuit is provided for supporting auto-negotiation operations when link pulses received from a link partner have a reverse polarity. In a preferred embodiment, the reverse polarity detection and correction circuit comprises a polarity detector for detecting polarity of the link pulses received from the link partner, and a link pulse detector for distinguishing link pulses from data received from the link partner. A polarity reversing circuit responsive to the polarity detector and the link pulse detector reverses polarity of the received link pulses.
摘要翻译：一种能够使用负链路脉冲执行自动协商的新型自动协商系统。自动协商系统在网络收发器中操作，用于互连具有不同操作速度的多个集线器通信设备和设置在传输介质上的链路伙伴。网络收发器包括用于支持集线器设备和链路伙伴之间的数据交换的物理层设备，以及自动协商设备，该设备向链路伙伴发送和接收带有自动协商信息的规定极性的链路脉冲，以选择一个集线器设备和链路伙伴之间的通信模式。提供了反向极性检测和校正电路，用于在从链路伙伴接收到的链路脉冲具有相反极性时支持自动协商操作。在优选实施例中，反极性检测和校正电路包括用于检测从链路伙伴接收的链路脉冲的极性的极性检测器和用于区分链路脉冲与从链路伙伴接收的数据的链路脉冲检测器。响应于极性检测器和链路脉冲检测器的极性反转电路反转所接收的链路脉冲的极性。

8. 发明授权

US6115389A Auto-negotiation for multiple ports using shared logic 失效
标题翻译：使用共享逻辑自动协商多个端口
公开(公告)号：US6115389A
公开(公告)日：2000-09-05
申请号：US291030
申请日：1999-04-14
申请人： Dinesh Mahale , Thomas J. Runaldue
发明人： Dinesh Mahale , Thomas J. Runaldue
IPC分类号： G01B7/02 , G01R31/08 , H04B3/46 , H04J3/06 , H04L5/14 , H04L12/24 , H04L12/413 , H04L12/46 , H04L25/03 , H04L29/06 , H04L29/08 , H04B7/212 , H04L12/43
CPC分类号： H04L25/03885 , G01B7/02 , H04B3/46 , H04J3/0688 , H04L12/40032 , H04L12/413 , H04L12/4625 , H04L41/046 , H04L5/1438 , H04L69/18 , H04L69/323 , G01R31/086 , H04L49/3054
摘要： A data communication device having multiple ports is provided with an auto-negotiation system for performing auto-negotiation with multiple link partners connected to the ports. The auto-negotiation system has a memory and an auto-negotiation unit including transmit, receive and arbitration state machines for performing transmit, receive and arbitration state diagrams compliant with the IEEE 802.3 Standard. The auto-negotiation unit operates in a time-division multiplexing mode using successive time slots for supporting auto-negotiation operations for different ports. The memory is used for storing state diagram variables for a port in a time interval between the time slots assigned to that port.
摘要翻译：具有多个端口的数据通信设备设置有用于与连接到端口的多个链路伙伴进行自动协商的自动协商系统。自动协商系统具有存储器和自动协商单元，包括用于执行符合IEEE 802.3标准的发送，接收和仲裁状态图的发送，接收和仲裁状态机。自动协商单元使用连续时隙以时分多路复用方式工作，以支持不同端口的自动协商操作。内存用于在分配给该端口的时隙之间的时间间隔内存储端口的状态图变量。

9. 发明授权

US5835719A Apparatus and method for remote wake-up in system having interlinked networks 失效
标题翻译：具有互连网络的系统中用于远程唤醒的装置和方法
公开(公告)号：US5835719A
公开(公告)日：1998-11-10
申请号：US972093
申请日：1997-11-17
申请人： Glen Gibson , Thomas J. Runaldue , Ching Yu
发明人： Glen Gibson , Thomas J. Runaldue , Ching Yu
IPC分类号： G06F1/32 , H04L12/12 , G06F13/38
CPC分类号： G06F1/3209 , H04L12/12 , Y02B60/32 , Y02B60/34
摘要： An apparatus and method for remote wake-up of an intended node within a data exchange system having interlinked networks (e.g., router-interlinked LAN's) is disclosed. A wake-up commanding format is disclosed wherein a sequence corresponding to the address of the intended node is embedded N consecutive times (e.g., at least 16 consecutive times) extensively through the respective data fields of one or more packets sent from a remote source node to the intended node. When this particular sequence is received by the intended node while the intended node is in a sleep mode, a wake-up operation is responsively initiated so that the sleeping node will awaken, at least for a time, to respond to future received packets.
摘要翻译：公开了一种用于在具有互连网络（例如，路由器互连LAN）的数据交换系统内远程唤醒预期节点的装置和方法。公开了一种唤醒命令格式，其中对应于预期节点的地址的序列通过从远程源节点发送的一个或多个分组的相应数据字段被广泛地连续N次（例如，至少16个连续时间）到目标节点。当预期节点处于睡眠模式时，当预定节点接收到该特定序列时，响应地启动唤醒操作，使得休眠节点至少在一段时间内唤醒以响应未来接收到的分组。

10. 发明授权

US06393021B1 Integrated multiport switch having shared data receive FIFO structure 失效
标题翻译：具有共享数据接收FIFO结构的集成多端口开关
公开(公告)号：US06393021B1
公开(公告)日：2002-05-21
申请号：US08992815
申请日：1997-12-18
申请人： Peter Ka-Fai Chow , Thomas J. Runaldue
发明人： Peter Ka-Fai Chow , Thomas J. Runaldue
IPC分类号： H04Q1100
CPC分类号： H04L49/3009 , G06F13/1605 , G06F13/24 , G11C11/412 , H04L12/1863 , H04L12/4641 , H04L12/4645 , H04L12/467 , H04L41/0213 , H04L47/50 , H04L47/6225 , H04L49/103 , H04L49/201 , H04L49/25 , H04L49/255 , H04L49/30 , H04L49/3027 , H04L49/3054 , H04L49/351 , H04L49/354 , H04L49/40 , H04L49/50 , H04L49/552 , H04L49/555 , H04L49/90 , H04L49/901 , H04L49/9047 , H04L49/9063 , H04L49/9073 , H04L49/9078 , H04L49/9084 , H04Q3/54591 , H04Q2213/1316 , H04Q2213/13162
摘要： An integrated multiport switch (IMS) having a receive FIFO structure with a single port RAM, for storing network communication data received from each port of the switch. The RAM is connected to a FIFO control unit, which is coupled to a MAC for each port by a MAC bus, by a FIFO memory input bus. Writing of data received from each port via the MAC bus to the RAM is controlled on a time shared basis. The FIFO control unit includes a receive RAM interface that is connected to the MAC bus for receiving communication data from the ports and to the FIFO memory input bus for transferring communication data to the RAM for temporary storage. As the FIFO memory input bus has a larger bit transfer capacity than the MAC bus, the receive RAM interface can accumulate incoming data during clock cycles in which data is being read from the single port RAM. When the accumulated data for a given port is to be written to the RAM in a subsequent write cycle, it is then combined with additional incoming data for the same port received at that time for transfer to the RAM.
摘要翻译：具有具有单端口RAM的接收FIFO结构的集成多端口交换机（IMS），用于存储从交换机的每个端口接收的网络通信数据。 RAM连接到FIFO控制单元，FIFO控制单元通过FIFO存储器输入总线通过MAC总线与每个端口的MAC耦合。通过MAC总线将从每个端口接收到的数据写入RAM是以时间共享为基础进行控制的。 FIFO控制单元包括接收RAM接口，该接口连接到MAC总线，用于接收来自端口的通信数据和FIFO存储器输入总线，用于将通信数据传送到RAM用于临时存储。由于FIFO存储器输入总线具有比MAC总线更大的位传输容量，所以接收RAM接口可以在从单端口RAM读取数据的时钟周期期间累加输入数据。当给定端口的累加数据在随后的写周期中被写入RAM时，然后将其与用于传送到RAM的同一端口的附加输入数据组合。

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