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31. 发明申请

US20110284365A1 LANTHANOID ALUMINATE FILM FABRICATION METHOD 有权
标题翻译：兰蔻酸铝薄膜制造方法
公开(公告)号：US20110284365A1
公开(公告)日：2011-11-24
申请号：US13192687
申请日：2011-07-28
申请人： Tsunehiro INO , Akira Takashima
发明人： Tsunehiro INO , Akira Takashima
IPC分类号： C23C14/34
CPC分类号： C23C14/3464 , C23C14/08
摘要： A method of fabricating by co-sputtering deposition a lanthanoid aluminate film with enhanced electrical insulativity owing to suppression of deviation in composition of the film is disclosed. Firstly within a vacuum chamber, hold two separate targets, one of which is made of lanthanoid aluminate (LnAlO3) and the other of which is made of aluminum oxide (Al2O3). Then, transport and load a substrate into the vacuum chamber. Next, introduce a chosen sputtering gas into this chamber. Thereafter, perform sputtering of both the targets at a time to thereby form a lanthanoid aluminate film on the substrate surface. This film is well adaptable for use as ultra-thin high dielectric constant (high-k) gate dielectrics in highly miniaturized metal oxide semiconductor (MOS) transistors.
摘要翻译：公开了一种通过共溅射沉积制造具有增强的电绝缘性的镧系铝酸盐膜的方法，这是因为抑制了膜的组成偏差。首先在真空室内保持两个独立的靶，其中一个靶由铝酸镧（LnAlO3）制成，另一个由氧化铝（Al2O3）制成。然后，将基板输送并加载到真空室中。接下来，将选择的溅射气体引入该室。此后，一次进行两个靶的溅射，从而在基板表面上形成镧系铝酸盐膜。该薄膜适用于高度小型化的金属氧化物半导体（MOS）晶体管中的超薄高介电常数（高k）栅极电介质。

32. 发明申请

US20110278723A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110278723A1
公开(公告)日：2011-11-17
申请号：US13195325
申请日：2011-08-01
申请人： Takao Nishimura , Yoshikazu Kumagaya , Akira Takashima , Kouichi Nakamura , Kazuyuki Aiba
发明人： Takao Nishimura , Yoshikazu Kumagaya , Akira Takashima , Kouichi Nakamura , Kazuyuki Aiba
IPC分类号： H01L23/498
CPC分类号： H01L23/3128 , H01L21/563 , H01L23/49811 , H01L23/49833 , H01L24/13 , H01L24/17 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L25/0657 , H01L2224/05001 , H01L2224/05022 , H01L2224/05124 , H01L2224/05147 , H01L2224/05568 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05666 , H01L2224/05684 , H01L2224/1134 , H01L2224/13027 , H01L2224/13099 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/14 , H01L2224/1411 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/17107 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73203 , H01L2224/73204 , H01L2224/73207 , H01L2224/73265 , H01L2224/81193 , H01L2224/81194 , H01L2224/81203 , H01L2224/81801 , H01L2225/06558 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/10329 , H01L2924/12041 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19042 , H01L2924/30107 , H01L2924/351 , H01L2924/3841 , H01L2924/00014 , H01L2924/00012 , H01L2924/00 , H01L2924/00015 , H01L2224/05541 , H01L2224/05005
摘要： A semiconductor device includes a semiconductor element having a main surface where an outside connection terminal pad is provided. The semiconductor element is connected to a conductive layer on a supporting board via a plurality of convex-shaped outside connection terminals provided on the outside connection terminal pad and a connection member; and the connection member commonly covers the convex-shaped outside connection terminals.
摘要翻译：半导体器件包括具有设置有外部连接端子焊盘的主表面的半导体元件。半导体元件经由设置在外部连接端子焊盘上的多个凸形外部连接端子和连接构件连接到支撑板上的导电层; 并且连接构件通常覆盖凸形外部连接端子。

33. 发明授权

US07718490B2 Nonvolatile semiconductor storage device and manufacturing method therefor 有权
标题翻译：非易失性半导体存储装置及其制造方法
公开(公告)号：US07718490B2
公开(公告)日：2010-05-18
申请号：US12318493
申请日：2008-12-30
申请人： Hiroshi Watanabe , Atsuhiro Kinoshita , Akira Takashima , Daisuke Hagishima
发明人： Hiroshi Watanabe , Atsuhiro Kinoshita , Akira Takashima , Daisuke Hagishima
IPC分类号： H01L21/336 , H01L29/788
CPC分类号： H01L29/7881 , H01L27/115 , H01L27/11521 , H01L29/42324
摘要： A nonvolatile semiconductor storage device includes a semiconductor substrate; a plurality of isolation regions formed in the semiconductor substrate; an element-forming region formed between adjacent isolation regions; a first gate insulating film provided on the element-forming region; a floating gate electrode which is provided on the first gate insulating film and in which a width of a lower hem facing the element-forming region is narrower than a width of the element-forming region in a section taken in a direction perpendicular to a direction in which the isolation regions extend; a second gate insulating film provided on the floating gate electrode; and a control gate electrode provided on the second gate insulating film.
摘要翻译：非易失性半导体存储器件包括半导体衬底; 形成在所述半导体衬底中的多个隔离区; 在相邻隔离区域之间形成的元件形成区域; 设置在元件形成区域上的第一栅极绝缘膜; 设置在第一栅极绝缘膜上并且面向元件形成区域的下边缘的宽度比沿着与方向垂直的方向截取的截面中的元件形成区域的宽度窄的浮栅电极其中隔离区域延伸; 设置在所述浮栅电极上的第二栅极绝缘膜; 以及设置在第二栅极绝缘膜上的控制栅电极。

34. 发明申请

US20100078704A1 SEMICONDUCTOR STORAGE ELEMENT AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体存储元件及其制造方法
公开(公告)号：US20100078704A1
公开(公告)日：2010-04-01
申请号：US12404648
申请日：2009-03-16
申请人： Tsunehiro Ino , Shosuke Fujii , Jun Fujiki , Akira Takashima , Masao Shingu , Daisuke Matsushita , Naoki Yasuda , Koichi Muraoka
发明人： Tsunehiro Ino , Shosuke Fujii , Jun Fujiki , Akira Takashima , Masao Shingu , Daisuke Matsushita , Naoki Yasuda , Koichi Muraoka
IPC分类号： H01L29/792 , H01L21/28
CPC分类号： H01L29/792 , H01L29/517 , H01L29/66833
摘要： A semiconductor storage element includes: a source region and a drain region provided in a semiconductor substrate; a tunnel insulating film provided on the semiconductor substrate between the source region and the drain region; a charge storage film provided on the tunnel insulating film; a block insulating film provided on the charge storage film; a gate electrode provided on the block insulating film; and a region containing a gas molecule, the region provided in a neighborhood of an interface between the charge storage film and the block insulating film.
摘要翻译：半导体存储元件包括：设置在半导体衬底中的源极区域和漏极区域; 设置在所述源极区域和所述漏极区域之间的所述半导体衬底上的隧道绝缘膜; 设置在所述隧道绝缘膜上的电荷存储膜; 设置在电荷存储膜上的块状绝缘膜; 设置在所述块绝缘膜上的栅电极; 以及包含气体分子的区域，所述区域设置在电荷存储膜和块绝缘膜之间的界面附近。

35. 发明申请

US20090186474A1 Nonvolatile semiconductor storage device and manufacturing method therefor 有权
公开(公告)号：US20090186474A1
公开(公告)日：2009-07-23
申请号：US12318493
申请日：2008-12-30
申请人： Hiroshi Watanabe , Atsuhiro Kinoshita , Akira Takashima , Daisuke Hagishima
发明人： Hiroshi Watanabe , Atsuhiro Kinoshita , Akira Takashima , Daisuke Hagishima
IPC分类号： H01L21/302
CPC分类号： H01L29/7881 , H01L27/115 , H01L27/11521 , H01L29/42324
摘要： A nonvolatile semiconductor storage device includes a semiconductor substrate; a plurality of isolation regions formed in the semiconductor substrate; an element-forming region formed between adjacent isolation regions; a first gate insulating film provided on the element-forming region; a floating gate electrode which is provided on the first gate insulating film and in which a width of a lower hem facing the element-forming region is narrower than a width of the element-forming region in a section taken in a direction perpendicular to a direction in which the isolation regions extend; a second gate insulating film provided on the floating gate electrode; and a control gate electrode provided on the second gate insulating film.

36. 发明授权

US07515028B1 Coil component 有权
标题翻译：线圈组件
公开(公告)号：US07515028B1
公开(公告)日：2009-04-07
申请号：US12213753
申请日：2008-06-24
申请人： Shinichi Sato , Satoshi Kurimoto , Makoto Morita , Akira Takashima , Sumio Takahashi , Yoshiaki Kitajima
发明人： Shinichi Sato , Satoshi Kurimoto , Makoto Morita , Akira Takashima , Sumio Takahashi , Yoshiaki Kitajima
IPC分类号： H01F5/00
CPC分类号： H01F17/045 , H01F27/027 , H01F27/292 , H01F41/10
摘要： A coil component having a low profile and being conducive to high-density mounting. The coil component includes a core 2 having a coil winding portion, and first and second flanges disposed on either end of the coil winding portion. The second flange is adapted to be mounted on a circuit board, and is configured of a substantially octagonal bottom surface having first and second peripheral surfaces and first through fourth omitted peripheral surfaces. The first terminal electrode is disposed across the first omitted peripheral surface and a part of the bottom surface, and the second terminal electrode is disposed across the second omitted peripheral surface and part of the bottom surface separated from the first terminal electrode. A winding is wound over the coil winding portion and has a first end electrically connected to the first terminal electrode at the first omitted peripheral surface, and a second end electrically connected to the second terminal electrode at the second omitted peripheral surface.
摘要翻译：具有低轮廓并有利于高密度安装的线圈部件。线圈部件包括具有线圈绕组部分的芯体2和设置在线圈绕组部分的任一端的第一和第二凸缘。第二凸缘适于安装在电路板上，并且由具有第一和第二外围表面以及第一至第四省略的外围表面的基本上八边形的底表面构成。第一端子电极跨越第一省略的外周表面和底表面的一部分，并且第二端子电极跨越第二省略的外围表面和与第一端子电极分离的底表面的一部分。绕组缠绕在线圈绕组部分上，并且在第一省略的外围表面上具有与第一端子电连接的第一端，以及在第二省略的外围表面与第二端子电连接的第二端。

37. 发明申请

US20080121979A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20080121979A1
公开(公告)日：2008-05-29
申请号：US11846251
申请日：2007-08-28
申请人： Yukie NISHIKAWA , Akira Takashima , Koichi Muraoka
发明人： Yukie NISHIKAWA , Akira Takashima , Koichi Muraoka
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L29/7881 , H01L27/115 , H01L27/11521 , H01L29/42336 , H01L29/513
摘要： A nonvolatile semiconductor memory device includes: a tunneling insulating film; a floating gate electrode; an inter-electrode insulating film, in which an interface facing the floating gate electrode and an interface facing a control gate electrode are defined as the first interface and the second interface, respectively; and a control gate electrode. The inter-electrode insulating film includes one or more first elements selected from rare earth elements, one or more second elements selected from Al, Ti, Zr, Hf, Ta, Mg, Ca, Sr and Ba, and oxygen. A composition ratio of the first element, which is defined as the number of atoms of the first element divided by that of the second element, is changed between the first interface and the second interface, and the composition ratio in the vicinity of the first interface is lower than that in the vicinity of the second interface.
摘要翻译：非易失性半导体存储器件包括：隧道绝缘膜; 浮栅电极; 分别将面对浮置栅极的界面和面对控制栅电极的界面分别定义为第一界面和第二界面的电极间绝缘膜; 和控制栅电极。电极间绝缘膜包括选自稀土元素，选自Al，Ti，Zr，Hf，Ta，Mg，Ca，Sr和Ba中的一种或多种第二元素和氧的一种或多种第一元素。被定义为第一元素的原子数除以第二元素的原子数的第一元素的组成比在第一界面和第二界面之间改变，并且第一界面附近的组成比低于第二界面附近的位置。

38. 发明申请

US20060186488A1 Semiconductor device and method of manufacturing semiconductor device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060186488A1
公开(公告)日：2006-08-24
申请号：US11407066
申请日：2006-04-20
申请人： Masahiro Koike , Masato Koyama , Tsunehiro Ino , Yuuichi Kamimuta , Akira Takashima , Masamichi Suzuki , Akira Nishiyama
发明人： Masahiro Koike , Masato Koyama , Tsunehiro Ino , Yuuichi Kamimuta , Akira Takashima , Masamichi Suzuki , Akira Nishiyama
IPC分类号： H01L29/94
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L29/517 , H01L29/518
摘要： Disclosed is a semiconductor device comprising a substrate, an insulating film formed above the substrate and containing a metal, Si, N and O, the insulating film containing metal-N bonds larger than the sum total of metal-metal bonds and metal-Si bonds, and an electrode formed above the insulating film.
摘要翻译：公开了一种半导体器件，其包括基板，形成在基板上方并且包含金属Si，N和O的绝缘膜，所述绝缘膜含有大于金属 - 金属键和金属-Si键的总和的金属-N键，以及形成在绝缘膜上方的电极。

39. 发明授权

US07071171B1 Unique dendritic cell-associated c-type lectins, dectin-1 and dectin-2 compositions and uses thereof 失效
标题翻译：独特的树突状细胞相关c型凝集素，dectin-1和dectin-2组合物及其用途
公开(公告)号：US07071171B1
公开(公告)日：2006-07-04
申请号：US09396492
申请日：1999-09-14
申请人： Kiyoshi Ariizumi , Akira Takashima
发明人： Kiyoshi Ariizumi , Akira Takashima
IPC分类号： A61K48/00 , C07H21/04
CPC分类号： C07K16/2851
摘要： Novel genes expressed selectively by long-term dendritic cell (DC) lines (XS series) from murine epidermis which retain important features of resident epidermal Langerhans cells (LC) are provided. These genes encode distinct type II membrane-integrated polypeptides, each consisting of a cytoplasmic domain, a transmembrane domain, an extracellular connecting domain, and a C-terminal extracellular domain that exhibits significant homology to the carbohydrate recognition domains (CRD)) of C-type lectins. Expression of both genes is highly restricted to cells of DC lineage (including epidermal LC). Thus, these genes encode new, DC-specific members of the C-type lectin family, now termed “DC-associated C-type lectin-1 and -2” (dectin-1 and dectin-2). Two isoforms of the dectin-1 molecule and five isoforms of the dectin-2 molecule have also been identified. The invention further provides His-tagged fusion proteins comprising 6x histidine and the extracellular domain of dectin-1 or dectin-2. Also provided are antibodies raised to synthetic peptides designed from the dectin-1 sequence or to the His-tagged fusion proteins described.
摘要翻译：提供了保留常驻表皮朗格汉斯细胞（LC）的重要特征的来自鼠表皮的长期树突细胞（DC）系（XS系列）选择性表达的新基因。这些基因编码不同的II型膜整合多肽，每个多肽由细胞质结构域，跨膜结构域，细胞外连接结构域和与碳水化合物识别结构域（CRD）显示显着同源性的C-末端胞外结构域）组成C- 型凝集素。两种基因的表达高度限于DC谱系细胞（包括表皮LC）。因此，这些基因编码C型凝集素家族的新的DC特异性成员，现在称为“DC-相关C型凝集素-1和-2”（果胶-1和果胶-2）。还鉴定了果胶-1分子的两种同工型和果胶-2分子的五种同种型。本发明还提供包含6x组氨酸和dectin-1或dectin-2的细胞外结构域的His-标记的融合蛋白。还提供了针对由所述dectin-1序列或所述His标记的融合蛋白设计的合成肽产生的抗体。

40. 发明授权

US07049692B2 Stacked semiconductor device 有权
标题翻译：堆叠半导体器件
公开(公告)号：US07049692B2
公开(公告)日：2006-05-23
申请号：US10763267
申请日：2004-01-26
申请人： Takao Nishimura , Kazuyuki Aiba , Akira Takashima
发明人： Takao Nishimura , Kazuyuki Aiba , Akira Takashima
IPC分类号： H01L23/02
CPC分类号： H05K1/141 , H01L23/3128 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/105 , H01L25/16 , H01L2224/05599 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/85399 , H01L2225/0651 , H01L2225/06517 , H01L2225/0652 , H01L2225/06541 , H01L2225/06555 , H01L2225/06558 , H01L2225/06568 , H01L2225/06572 , H01L2225/06586 , H01L2225/1023 , H01L2225/1058 , H01L2225/107 , H01L2924/00014 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H05K1/023 , H05K1/144 , H05K1/145 , H05K1/16 , H05K3/3436 , H05K2201/045 , H05K2201/049 , H05K2201/10515 , H05K2201/10734 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： A stacked semiconductor device is disclosed that has a three-dimensional structure using general-purpose semiconductor device units (semiconductor devices) that are stacked with an interposer substrate being provided between an upper device unit and a lower device unit. The upper device unit includes a semiconductor device, a first wiring substrate, and an external connection terminal. The lower device unit includes a semiconductor device, a second wiring substrate, and a connection electrode that is prepared on the upper surface of the second wiring substrate. The interposer substrate includes a circuit board, a first conductive material connecting to the connection electrode, a second conductive material formed in a form position of the external connection terminal that is electrically connected to the second conductive material, and a third conductive material for electrically connecting the first conductive material and the second conductive material.
摘要翻译：公开了一种堆叠半导体器件，其具有使用通用半导体器件单元（半导体器件）的三维结构，其中中间体衬底被堆叠设置在上部器件单元和下部器件单元之间。上部装置单元包括半导体装置，第一布线基板和外部连接端子。下部器件单元包括半导体器件，第二布线基板和准备在第二布线基板的上表面上的连接电极。插入器基板包括电路板，连接到连接电极的第一导电材料，形成在电连接到第二导电材料的外部连接端子的形状位置的第二导电材料和用于电连接的第三导电材料第一导电材料和第二导电材料。

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