专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明授权

US06806208B2 Semiconductor device structured to prevent oxide damage during HDP CVD 有权
标题翻译：构造为防止HDP CVD期间的氧化物损伤的半导体器件
公开(公告)号：US06806208B2
公开(公告)日：2004-10-19
申请号：US10384578
申请日：2003-03-11
申请人： Minoru Saito
发明人： Minoru Saito
IPC分类号： H01L2131
CPC分类号： H01L23/3192 , H01L21/02164 , H01L21/02274 , H01L21/02304 , H01L21/31608 , H01L21/31629 , H01L21/3185 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/19041 , H01L2924/00
摘要： A semiconductor device includes a patterned conductive layer on which an initial dielectric film is deposited by a non-etching deposition process. A second dielectric film is then deposited on the initial dielectric film by high-density plasma chemical vapor deposition (HDP CVD). The HDP CVD process etches the second dielectric film as it is being deposited, thereby smoothing the surface of the second dielectric film. The initial dielectric film insulates the patterned conductive layer from the plasma used in the HDP CVD process, so that plasma charge is not conducted to underlying oxide films, such as gate oxide films, and does not cause oxide damage.
摘要翻译：半导体器件包括图案化导电层，其上通过非蚀刻沉积工艺沉积初始电介质膜。然后通过高密度等离子体化学气相沉积（HDP CVD）将第二电介质膜沉积在初始电介质膜上。 HDP CVD工艺在其被沉积时蚀刻第二介电膜，从而平滑第二电介质膜的表面。初始电介质膜将图案化的导电层与HDP CVD工艺中使用的等离子体绝缘，使得等离子体电荷不被引导到下面的氧化膜，例如栅极氧化膜，并且不会引起氧化物损伤。

32. 发明授权

US06297537B1 Semiconductor device and method for production thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06297537B1
公开(公告)日：2001-10-02
申请号：US09253000
申请日：1999-02-19
申请人： Minoru Saito
发明人： Minoru Saito
IPC分类号： H01L2976
CPC分类号： H01L21/7682 , H01L21/76838 , H01L23/53257 , H01L27/112 , H01L27/11253 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device e.g. a gate array, a mask ROM or the like produced by supplementing one or more upper-layer interconnections to units selected out of those previously produced in a half-finished semiconductor device, wherein the upper-layer interconnections are connected exclusively with the selected ones of the foregoing units and are isolated from the unselected ones of the foregoing units, by a space or an insulator layer produced between the upper-layer interconnection and a layer in which conductive paths are produced for connecting the upper-layer interconnection and the foregoing units.
摘要翻译：半导体器件通过补充一个或多个上层互连到由半成品半导体器件中先前制造的单元中选出的单元而产生的门阵列，掩模ROM等，其中上层互连仅与上述单元通过在上层布线和产生用于连接上层互连和上述单元的导电路径的层之间产生的空间或绝缘体层与上述单元中未选择的单元隔离。

33. 发明授权

US6136683A Semiconductor device and method for production thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US6136683A
公开(公告)日：2000-10-24
申请号：US293944
申请日：1999-04-19
申请人： Minoru Saito
发明人： Minoru Saito
IPC分类号： H01L21/28 , H01L21/3213 , H01L21/768 , H01L21/8246 , H01L23/532 , H01L27/112 , H01L21/4763
CPC分类号： H01L21/7682 , H01L21/76838 , H01L27/112 , H01L27/11253 , H01L23/53257 , H01L2924/0002
摘要： A semiconductor device e.g. a gate array, a mask ROM or the like produced by supplementing one or more upper-layer interconnections to units selected out of those previously produced in a half-finished semiconductor device, wherein the upper-layer interconnections are connected exclusively with the selected ones of the foregoing units and are isolated from the unselected ones of the foregoing units, by a space or an insulator layer produced between the upper-layer interconnection and a layer in which conductive paths are produced for connecting the upper-layer interconnection and the foregoing units.
摘要翻译：半导体器件通过补充一个或多个上层互连到由半成品半导体器件中先前制造的单元中选出的单元而产生的门阵列，掩模ROM等，其中上层互连仅与上述单元通过在上层布线和产生用于连接上层互连和上述单元的导电路径的层之间产生的空间或绝缘体层与上述单元中未选择的单元隔离。

34. 发明授权

US5747111A Steel sheet coated with Zn-Mg binary coating layer excellent in corrosion resistance and manufacturing method thereof 失效
标题翻译：涂有耐腐蚀性优异的Zn-Mg二元涂层的钢板及其制造方法
公开(公告)号：US5747111A
公开(公告)日：1998-05-05
申请号：US787260
申请日：1997-01-24
申请人： Yasushi Fukui , Masanori Matsuno , Hiroshi Tanaka , Tadaaki Miono , Kazushi Sakamoto , Yasumi Ariyoshi , Minoru Saito
发明人： Yasushi Fukui , Masanori Matsuno , Hiroshi Tanaka , Tadaaki Miono , Kazushi Sakamoto , Yasumi Ariyoshi , Minoru Saito
IPC分类号： C23C14/02 , C23C14/16 , C23C14/56 , C23C14/58 , C23C28/02 , C21D9/50
CPC分类号： C23C14/5806 , C23C14/024 , C23C14/025 , C23C14/16 , C23C14/562 , C23C28/023 , Y10S428/938 , Y10T428/12458 , Y10T428/12799
摘要： A Zn-Mg binary coating layer formed on a steel sheet has the tri-layered structure that the first sublayer composed of a Zn-Mg alloy having Mg concentration of 0.5 wt. % or less, the second sublayer composed of a Zn-Mg alloy having Mg concentration of 7 wt. % or more and the third sublayer composed of a Zn-Mg alloy having Mg concentration of 0.5 wt. % or less are successively laminated. The coating layer may have the penta-layered structure wherein sublayers composed of a Zn-Mg alloy having Mg concentration of 2-7 wt. % are additionally interposed between the high-Mg and low-Mg sublayers. A Zn-Fe or Zn-Fe-Mg alloy layer may be formed at the boundary between the substrate steel and the coating layer. The adhesion ratio of the first sublayer to the top sublayer is preferably 1.2 or more, while the high-Mg sublayer is preferably conditioned to the mixed structure of a Zn.sub.2 Mg phase with a Mg-dissolved Zn phase. Due to the specified lamellar structure, the intrinsic properties of the high-Mg sublayer is sufficiently exhibited, and the secondary paint adhesiveness of the coating layer is excellent. Consequently, the coated steel sheet is useful as structural members or parts exposed to a severe corrosive atmosphere in various industrial fields.
摘要翻译：形成在钢板上的Zn-Mg二元涂层具有由Mg浓度为0.5重量％的Zn-Mg合金构成的第一子层的三层结构。％以下，由Mg浓度为7重量％的Zn-Mg合金构成的第二子层。％以上，第三子层由Mg浓度为0.5重量％的Zn-Mg合金构成。％以下依次层叠。涂层可以具有五层结构，其中由Mg浓度为2-7wt。％的Zn-Mg合金构成的子层。％另外插在高Mg和低Mg子层之间。可以在基板钢和涂层之间的边界处形成Zn-Fe或Zn-Fe-Mg合金层。第一子层与顶层子层的附着比优选为1.2以上，而高Mg子层优选调节为Zn2Mg相与Mg溶解的Zn相的混合结构。由于具有规定的层状结构，能够充分发挥高Mg亚层的固有特性，并且涂层的二次涂料粘附性优异。因此，涂覆钢板可用作在各种工业领域暴露于剧烈腐蚀性气氛的结构构件或部件。

35. 发明授权

US5705226A Formation of magnesium vapor with high evaporation speed 失效
标题翻译：高蒸发速度的镁蒸气的形成
公开(公告)号：US5705226A
公开(公告)日：1998-01-06
申请号：US622822
申请日：1996-03-27
申请人： Yasushi Fukui , Tadaaki Miono , Minoru Saito
发明人： Yasushi Fukui , Tadaaki Miono , Minoru Saito
IPC分类号： C23C14/14 , C23C14/16 , C23C14/24 , C23C16/06
CPC分类号： C23C14/243 , C23C14/16
摘要： A Mg source 3 is received in a vessel 1 having an opening 8, and the vessel 1 is heated at 670.degree. C. or higher to effuse Mg vapor through the opening 8. Since the vessel 1 is filled with Mg vapor, Mg is evaporated from molten state under stable condition without fluctuations in evaporation speed. The Mg vapor is effectively consumed for vapor deposition. A reflector plate may be provided at the outlet of the opening 8, or a duct for introducing Mg vapor from the vessel to the surface of a substrate sheet may be provided. In order to evaporate Mg from stabilized molten state, operational conditions are preferably determined so as to satisfy the relationships of W.sub.1 /W.sub.2
摘要翻译：将Mg源3接收在具有开口8的容器1中，并且将容器1加热至670℃以上以通过开口8喷射Mg蒸汽。由于容器1填充有Mg蒸气，所以Mg蒸发从稳定状态下的熔融状态，蒸发速度不变。 Mg蒸汽被有效地用于气相沉积。可以在开口8的出口处设置反射板，或者可以提供用于将Mg蒸汽从容器引入到基板的表面的管道。为了从稳定的熔融状态蒸发Mg，优选确定操作条件以满足W1 / W2 <0.6x（PMg / V3）和W1 / W2 <0.04xPMg的关系，其中W1表示开口8，W2表示Mg源3的蒸发面积（mm2），PMg表示Mg蒸气压（乇），V表示真空度。

36. 发明授权

US5288948A Structure of a semiconductor chip having a conductive layer 失效
标题翻译：具有导电层的半导体芯片的结构
公开(公告)号：US5288948A
公开(公告)日：1994-02-22
申请号：US778881
申请日：1991-12-26
申请人： Yasuhiro Fukuda , Tetsuhiko Sugahara , Norio Hirashita , Mitsuhiro Matsuo , Minoru Saito , Masayuki Kobayakawa , Fumitaka Yokoyama
发明人： Yasuhiro Fukuda , Tetsuhiko Sugahara , Norio Hirashita , Mitsuhiro Matsuo , Minoru Saito , Masayuki Kobayakawa , Fumitaka Yokoyama
IPC分类号： H01L23/528 , H05K1/00
CPC分类号： H01L23/5286 , H01L2924/0002
摘要： In order to prevent the occurrence of corrosion due to the sliding of a relatively wide aluminum conductive layer (12) such as a power source conductive layer or a ground conductive layer, formed on a semiconductor substrate (11), breakage of a lower conductive layer due to the sliding of an upper aluminum conductive layer (12) in case of a multilayer interconnection, and the creation of voids in the lower aluminum conductive layer due to the moisture beneath the relatively wide metal conductive layer in case of a multi layer interconnection etc., the conductive layer structure is constructed so that the conductive layer (12) relatively great in width is divided into several conductive layer portions and so that the width of each of the divided conductive layer portions is in a range of 10 .mu.m to 40 .mu.m.
摘要翻译： PCT No.PCT / JP90 / 00424 Sec。 371 1991年12月26日第 102（e）日期1991年12月26日PCT 1990年3月29日PCT PCT。出版物WO91 / 0061600 日期为1991年1月10日。为了防止由形成在半导体基板（11）上的诸如电源导体层或接地导电层的相对宽的铝导电层（12）滑动引起的腐蚀，在多层互连的情况下由于上部铝导电层（12）的滑动导致的下部导电层的破损，以及由于相对较宽的金属导电层下面的水分导致的下部铝导电层中的空隙的产生多层互连的情况等，导电层结构被构造为使得宽度相对较大的导电层（12）被分成几个导电层部分，并且使得每个分离的导电层部分的宽度为范围10（我）m到40（我）m。

37. 外观设计

USD323711S Magnetic resonance imaging scanner 失效
公开(公告)号：USD323711S
公开(公告)日：1992-02-04
申请号：US397301
申请日：1989-08-23
申请人： Isamu Takekoshi , Tsuyoshi Syudo , Minoru Saito
设计人： Isamu Takekoshi , Tsuyoshi Syudo , Minoru Saito

38. 发明授权

US4407179A Process and apparatus for cutting an elongate complex structure 失效
标题翻译：用于切割细长复合结构的工艺和设备
公开(公告)号：US4407179A
公开(公告)日：1983-10-04
申请号：US300862
申请日：1981-09-10
申请人： Katsuhiko Iwase , Minoru Saito
发明人： Katsuhiko Iwase , Minoru Saito
IPC分类号： B26D1/09 , B26D7/08 , B26D11/00 , B26D1/00 , B26D3/00
CPC分类号： B26D7/084 , B26D1/09 , B26D11/00 , B32B38/0004 , Y10T83/023 , Y10T83/0259 , Y10T83/0304 , Y10T83/4679 , Y10T83/4763 , Y10T83/825
摘要： Process and apparatus for cutting an elongate complex structure composed of materials having different properties, e.g. a liner and a core which are relatively soft and flexible and susceptible to rupture or crushing and a facing of hard material such as a metal plate. The facing may have an upwardly turned portion, flange portion and groove portion at each side thereof. A carriage and a base frame are movable in the direction of the travel of the complex structure and in the direction perpendicular thereto, respectively. Various types of cutters are mounted on the carriage. The complex structure is instantaneously cut in the direction of the width thereof while it is travelling at a high speed. The cut composite structure has smooth and fine cut edges, and is useful for e.g. a siding of a building.
摘要翻译：用于切割由具有不同性质的材料组成的细长复合结构的方法和设备，例如衬垫和芯体，其相对柔软且柔韧并且易于破裂或破碎，以及诸如金属板的硬质材料的面。面对物可以在其每一侧具有向上翻转的部分，凸缘部分和凹槽部分。托架和底座框架可以在复合结构的行进方向上并且在与其垂直的方向上分别移动。各种类型的切割器安装在滑架上。当其高速行进时，复合结构在其宽度方向上瞬时切割。切割的复合结构具有平滑和精细的切割边缘，并且可用于例如。建筑物的侧板。

39. 发明授权

US4288514A Method for controlling image formation in electrophotography by pre-exposure step 失效
标题翻译：用于通过预曝光步骤控制电子照相术中的图像形成的方法
公开(公告)号：US4288514A
公开(公告)日：1981-09-08
申请号：US831263
申请日：1977-09-07
申请人： Noboru Kutsuwada , Minoru Saito , Ryoichi Namiki , Katsuo Kusunoki
发明人： Noboru Kutsuwada , Minoru Saito , Ryoichi Namiki , Katsuo Kusunoki
IPC分类号： G03G15/05 , G03G15/22 , G03G21/00 , G03G21/08 , G03G13/22 , G03G13/24
CPC分类号： G03G21/08 , G03G15/226 , G03G21/00
摘要： A photosensitive member is exposed to light prior to primary charging so that the surface potential applied by primary charging may always be maintained at a constant level to which the photosensitive member is always charged when it is repetitively used for some time, which may be predetermined by test. Until the surface potential reaches this level, the intensity of light for pre-exposure is gradually decreased and after the surface potential has reached this level, no pre-exposure is applied. But when the surface potential rises after a predeterminable period during which the photosensitive member is not used, the pre-exposure is applied again. All the copies may have the same density.
摘要翻译：感光构件在初次充电之前暴露于光，使得通过初次充电施加的表面电位可以总是保持在恒定的水平，当重复使用一段时间时，感光构件总是被充电，这可以由测试。直到表面电位达到该水平，预曝光的光强度逐渐降低，表面电位达到该水平后，不施加预曝光。但是当表面电位在不使用感光构件的可预定时间之后上升时，再次施加预曝光。所有副本可能具有相同的密度。

40. 发明授权

US08518535B2 Multilayer insulated wire and transformer using the same 有权
标题翻译：多层绝缘电线和变压器使用相同
公开(公告)号：US08518535B2
公开(公告)日：2013-08-27
申请号：US12078122
申请日：2008-03-27
申请人： Hideo Fukuda , Makoto Onodera , Dai Fujiwara , Minoru Saito , Tsuneo Aoi , Isamu Kobayashi , Junichi Ishizuka , Noriyoshi Fushimi
发明人： Hideo Fukuda , Makoto Onodera , Dai Fujiwara , Minoru Saito , Tsuneo Aoi , Isamu Kobayashi , Junichi Ishizuka , Noriyoshi Fushimi
IPC分类号： B32B15/02 , H01B7/17
CPC分类号： H01B3/427 , H01B3/301 , H01B3/306 , H01F27/323 , Y10T428/2933 , Y10T428/294 , Y10T428/2947 , Y10T428/31504 , Y10T428/3154 , Y10T428/31721 , Y10T428/31725 , Y10T428/31786
摘要： A multilayer insulated wire, comprising: a conductor; and at least three extruded insulation layers covering the conductor, which extruded insulation layers comprise: (A) an outermost layer composed of an extruded covering layer of a resin whose elongation rate after heat treatment by immersion in a solder at 150° C. for two seconds is at least 290% and at least equal to elongation rate before the heat treatment; (B) an innermost layer comprising a resin whose elongation rate after heat treatment by immersion in a solder at 150° C. for two seconds is at least 290% and at least equal to elongation rate before the heat treatment; and (C) an insulation layer that is placed between the outermost layer and the innermost layer and that is composed of an extruded covering layer of a crystalline resin with a melting point of at least 280° C. or an amorphous resin with a glass transition temperature of at least 200° C.; and a transformer having the multilayer insulated wire.
摘要翻译：一种多层绝缘电线，包括：导体; 并且至少三个覆盖导体的挤压绝缘层，其挤出绝缘层包括：（A）由挤出的树脂覆盖层组成的最外层，其中通过浸入焊料中在150℃下进行热处理后的伸长率为2 秒至少为290％，至少等于热处理前的伸长率; （B）包含树脂的最内层，其中在150℃下浸渍焊料的热处理后的伸长率为2秒至少为290％且至少等于热处理前的伸长率; 和（C）绝缘层，其被放置在最外层和最内层之间，并且由熔点至少为280℃的结晶树脂的挤出覆盖层或具有玻璃化转变的无定形树脂温度至少为200℃。以及具有多层绝缘线的变压器。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式