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    • 31. 发明授权
    • Method of manufacturing semiconductor devices
    • 制造半导体器件的方法
    • US07927952B2
    • 2011-04-19
    • US12128326
    • 2008-05-28
    • Miwako AkiyamaYusuke KawaguchiYoshihiro Yamaguchi
    • Miwako AkiyamaYusuke KawaguchiYoshihiro Yamaguchi
    • H01L21/336
    • H01L29/0619H01L29/0615H01L29/1095H01L29/66734
    • A method of manufacturing semiconductor devices comprises forming an semiconductor layer of the first conduction type on a substrate of the first conduction type; forming an anti-oxidizing layer on the surface of the semiconductor layer of the first conduction type, the anti-oxidizing layer having an aperture only through a region for use in formation of a guard ring layer of the second conduction type; forming the guard ring layer of the second conduction type in the surface of the semiconductor layer of the first conduction type through implantation of ions into a surface where said anti-oxidizing layer is formed; forming an oxide layer at least in the aperture; forming a base layer of the second conduction type adjacent to the guard ring layer of the second conduction type in the surface of the semiconductor layer of the first conduction type; and forming a diffused layer of the first conduction type through implantation of ions into the base layer of the second conduction type.
    • 制造半导体器件的方法包括在第一导电类型的衬底上形成第一导电类型的半导体层; 在第一导电类型的半导体层的表面上形成抗氧化层,所述抗氧化层仅通过用于形成所述第二导电类型的保护环层的区域具有孔; 通过将离子注入形成所述抗氧化层的表面,在第一导电类型的半导体层的表面中形成第二导电类型的保护环层; 至少在所述孔中形成氧化物层; 在第一导电类型的半导体层的表面中形成与第二导电类型的保护环层相邻的第二导电类型的基极层; 以及通过将离子注入第二导电类型的基极层而形成第一导电类型的扩散层。
    • 32. 发明申请
    • METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES
    • 制造半导体器件的方法
    • US20080299725A1
    • 2008-12-04
    • US12128326
    • 2008-05-28
    • Miwako AKIYAMAYusuke KawaguchiYoshihiro Yamaguchi
    • Miwako AKIYAMAYusuke KawaguchiYoshihiro Yamaguchi
    • H01L21/336
    • H01L29/0619H01L29/0615H01L29/1095H01L29/66734
    • A method of manufacturing semiconductor devices comprises forming an semiconductor layer of the first conduction type on a substrate of the first conduction type; forming an anti-oxidizing layer on the surface of the semiconductor layer of the first conduction type, the anti-oxidizing layer having an aperture only through a region for use in formation of a guard ring layer of the second conduction type; forming the guard ring layer of the second conduction type in the surface of the semiconductor layer of the first conduction type through implantation of ions into a surface where said anti-oxidizing layer is formed; forming an oxide layer at least in the aperture; forming a base layer of the second conduction type adjacent to the guard ring layer of the second conduction type in the surface of the semiconductor layer of the first conduction type; and forming a diffused layer of the first conduction type through implantation of ions into the base layer of the second conduction type.
    • 制造半导体器件的方法包括在第一导电类型的衬底上形成第一导电类型的半导体层; 在第一导电类型的半导体层的表面上形成抗氧化层,所述抗氧化层仅通过用于形成所述第二导电类型的保护环层的区域具有孔; 通过将离子注入形成所述抗氧化层的表面,在第一导电类型的半导体层的表面中形成第二导电类型的保护环层; 至少在所述孔中形成氧化物层; 在第一导电类型的半导体层的表面中形成与第二导电类型的保护环层相邻的第二导电类型的基极层; 以及通过将离子注入第二导电类型的基极层而形成第一导电类型的扩散层。
    • 33. 发明授权
    • Method of manufacturing vertical power device
    • 垂直功率器件的制造方法
    • US5985708A
    • 1999-11-16
    • US816596
    • 1997-03-13
    • Akio NakagawaNaoharu SugiyamaTomoko MatsudaiNorio YasuharaAtsusi KurobeHideyuki FunakiYusuke KawaguchiYoshihiro Yamaguchi
    • Akio NakagawaNaoharu SugiyamaTomoko MatsudaiNorio YasuharaAtsusi KurobeHideyuki FunakiYusuke KawaguchiYoshihiro Yamaguchi
    • H01L27/12H01L29/73H01L29/739H01L29/786H01L21/8249
    • H01L29/78696H01L27/1203H01L29/7317H01L29/7394H01L29/78612H01L29/78624H01L29/78639H01L29/78645H01L29/78687
    • A semiconductor apparatus comprising a vertical type semiconductor device having a first conducting type semiconductor substrate, a drain layer formed on the surface of the semiconductor substrate, a drain electrode formed on the surface of the drain layer, a second conducting type base layer selectively formed on the surface of the semiconductor substrate opposite to the drain layer, a first conducting type source layer selectively formed on the surface of the second conducting type base layer, a source electrode formed on the first conducting type source layer and the second conducting type base layer, and a gate electrode formed in contact with the first conducting type source layer, the second conducting type base layer and the semiconductor substrate through a gate insulating film and a lateral semiconductor device having an insulating layer formed in a region of the surface of the semiconductor substrate different from the second conducting type base layer, and a polycrystalline semiconductor layer formed on the insulating layer and having a first conducting type region and a second conducting type region, wherein the first conducting type source layer of the vertical semiconductor device and the first conducting type region of the polycrystalline semiconductor layer are simultaneously formed.
    • 一种半导体装置,包括具有第一导电型半导体衬底的垂直型半导体器件,形成在半导体衬底的表面上的漏极层,形成在漏极层的表面上的漏电极,第二导电型基极层, 所述半导体衬底的与所述漏极层相对的表面,选择性地形成在所述第二导电型基极层的表面上的第一导电型源极层,形成在所述第一导电型源极层和所述第二导电型基极层上的源电极, 以及通过栅极绝缘膜与第一导电型源极层,第二导电型基极层和半导体基板接触形成的栅电极,以及在半导体基板的表面的区域中形成有绝缘层的侧面半导体装置 不同于第二导电型基底层,和多晶 半导体层形成在绝缘层上并具有第一导电类型区域和第二导电类型区域,其中垂直半导体器件的第一导电型源极层和多晶半导体层的第一导电类型区域同时形成。
    • 35. 发明授权
    • Semiconductor device and method for manufacturing same
    • 半导体装置及其制造方法
    • US07919811B2
    • 2011-04-05
    • US12122165
    • 2008-05-16
    • Miwako AkiyamaYusuke KawaguchiYoshihiro Yamaguchi
    • Miwako AkiyamaYusuke KawaguchiYoshihiro Yamaguchi
    • H01L29/76H01L29/94H01L31/062H01L31/113H01L31/119
    • H01L29/7813H01L21/26586H01L29/1095H01L29/41766H01L29/66727H01L29/66734
    • A semiconductor device includes a second-conductivity-type base region provided on a first-conductivity-type semiconductor layer, a first-conductivity-type source region provided on the second-conductivity-type base region, a gate insulating film covering an inner wall of a trench which passes through the second-conductivity-type base region and reaching the first-conductivity-type semiconductor layer, a gate electrode buried in the trench via the gate insulating film, and a second-conductivity-type region being adjacent to the second-conductivity-type base region below the first-conductivity-type source region, spaced from the gate insulating film, and having a higher impurity concentration than the second-conductivity-type base region. c≧d is satisfied, where d is a depth from an upper surface of the first-conductivity-type source region to a lower end of the gate electrode, and c is a depth from an upper surface of the first-conductivity-type source region to a lower surface of the second-conductivity-type base region.
    • 半导体器件包括设置在第一导电型半导体层上的第二导电型基极区域,设置在第二导电型基极区域上的第一导电型源极区域,覆盖内壁的栅极绝缘膜 通过所述第二导电型基极区域并到达所述第一导电型半导体层的沟槽,经由所述栅极绝缘膜埋设在所述沟槽中的栅电极,以及与所述第二导电型基极区相邻的第二导电型区域 与第一导电型源极区域相邻的第二导电型基极区域,与栅极绝缘膜间隔开,并且具有比第二导电型基极区域更高的杂质浓度。 c≥d,其中d是从第一导电型源极区的上表面到栅电极的下端的深度,c是从第一导电型源的上表面的深度 区域延伸到第二导电型基极区域的下表面。
    • 37. 发明申请
    • SEMICONDUCTOR DEVICE
    • 半导体器件
    • US20090146209A1
    • 2009-06-11
    • US12332260
    • 2008-12-10
    • Miwako AkiyamaYusuke KawaguchiYoshihiro Yamaguchi
    • Miwako AkiyamaYusuke KawaguchiYoshihiro Yamaguchi
    • H01L29/78H01L21/336
    • H01L29/7813H01L21/26586H01L29/0634H01L29/0869H01L29/0878H01L29/1095H01L29/41741H01L29/41766H01L29/66727H01L29/66734
    • A semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type provided on a main surface of the first semiconductor layer and having a lower impurity concentration than that of the first semiconductor layer; a third semiconductor layer of a second conductivity type provided on the second semiconductor layer; a fourth semiconductor layer of the first conductivity type selectively provided on the third semiconductor layer; a gate electrode provided in a trench passing through the third semiconductor layer and reaching the second semiconductor layer; a first main electrode contacting the fourth semiconductor layer and contacting the third semiconductor layer through a contact groove provided to pass through the fourth semiconductor layer between the contiguous gate electrodes; a second main electrode provided on an opposite surface to the main surface of the first semiconductor layer; and a fifth semiconductor layer of the second conductivity type provided in an interior portion of the second semiconductor layer corresponding to a part under the contact groove. An uppermost portion of the fifth semiconductor layer contacts the third semiconductor layer, a lowermost portion of the fifth semiconductor layer has a higher impurity concentration than that of the other portion in the fifth semiconductor layer and is located in the second semiconductor layer and not contacting the first semiconductor layer, and the fifth semiconductor layer is narrower from the uppermost portion to the lower most portion.
    • 半导体器件包括:第一导电类型的第一半导体层; 第一导电类型的第二半导体层设置在第一半导体层的主表面上并且具有比第一半导体层的杂质浓度低的第二半导体层; 设置在第二半导体层上的第二导电类型的第三半导体层; 选择性地设置在第三半导体层上的第一导电类型的第四半导体层; 设置在穿过所述第三半导体层并到达所述第二半导体层的沟槽中的栅电极; 与所述第四半导体层接触的第一主电极,并且通过设置成在所述连续的栅电极之间穿过所述第四半导体层的接触槽使所述第三半导体层接触; 设置在与所述第一半导体层的主表面相反的表面上的第二主电极; 以及第二导电类型的第五半导体层,设置在与所述接触槽下方的部分对应的所述第二半导体层的内部。 第五半导体层的最上部与第三半导体层接触,第五半导体层的最下部分的杂质浓度比第五半导体层中的其他部分杂质浓度高,位于第二半导体层中, 第一半导体层,第五半导体层从最上部到最下部较窄。
    • 40. 发明授权
    • Thermal cutting machine and thermal cutting method
    • 热切割机和热切割方法
    • US08729421B2
    • 2014-05-20
    • US11629283
    • 2005-06-02
    • Satoshi OhnishiYoshihiro Yamaguchi
    • Satoshi OhnishiYoshihiro Yamaguchi
    • B23K9/02
    • B23K37/0408B23K7/002B23K10/00B23K26/0884B23K26/16B23K26/38B23K26/702B23K37/0461B23K2101/18
    • A lattice pallet 13 having a large number of supporters for placing a plate 14 is installed to a table 12 so as to be freely fittable and removable. Bringing in of the plate 14 is performed by the method of raising the lattice pallet 13 with a crane with the plate 14 already having been loaded upon the lattice pallet 13 in a different location, transporting them over the table 12, and lowering them down onto the table 12. Directly after cutting has been completed, the lattice pallet 12 is raised and separated from the table 12 with the manufactured product and the left over material carried upon it and is taken away to a different location, and another lattice pallet 13 with another plate 14 mounted upon it is brought in with the crane upon the table 12, and the task of cutting this other plate 14 is commenced.
    • 具有用于放置板14的大量支撑器的格子托盘13被安装到桌子12上,以便可自由地装配和拆卸。 通过用起重机提升格子托盘13的方法来进行板14的进入,该起重机已将板14已经装载在不同位置的格子托盘13上,将它们运送到工作台12上,并将它们下降到 桌子12.切割完成之后,格子托盘12被升起并与工作台12分离,制成品并将剩下的材料运送到其上并被带走到不同的位置,另一个格子托盘13具有 安装在其上的另一个板14与起重机一起被放置在工作台12上,并且开始切割另一个板14的任务。