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31. 发明授权

US5615165A Non-volatile semiconductor memory device and memory system using the same 失效
标题翻译：非易失性半导体存储器件和使用其的存储器系统
公开(公告)号：US5615165A
公开(公告)日：1997-03-25
申请号：US576564
申请日：1995-12-21
申请人： Tomoharu Tanaka , Masaki Momodomi , Hideo Kato , Hiroto Nakai , Yoshiyuki Tanaka , Riichiro Shirota , Seiichi Aritome , Yasuo Itoh , Yoshihisa Iwata , Hiroshi Nakamura , Hideko Odaira , Yutaka Okamoto , Masamichi Asano , Kaoru Tokushige
发明人： Tomoharu Tanaka , Masaki Momodomi , Hideo Kato , Hiroto Nakai , Yoshiyuki Tanaka , Riichiro Shirota , Seiichi Aritome , Yasuo Itoh , Yoshihisa Iwata , Hiroshi Nakamura , Hideko Odaira , Yutaka Okamoto , Masamichi Asano , Kaoru Tokushige
IPC分类号： G06F11/10 , G11C16/10 , G11C16/12 , G11C16/24 , G11C16/34 , G11C29/00 , G11C29/34 , G11C29/52 , G11C13/00
CPC分类号： G11C29/785 , G06F11/1008 , G11C16/10 , G11C16/12 , G11C16/24 , G11C16/3436 , G11C16/344 , G11C16/3454 , G11C29/34 , G11C29/52 , G06F11/1068 , G06F2201/81 , G06F2212/2022
摘要： The time required for the program verify and erase verify operations can be shortened. The change of threshold values of memory cells can be suppressed even if the write and erase operations are executed repetitively. After the program and erase operations, whether the operations were properly executed can be judged simultaneously for all bit lines basing upon a change, after the pre-charge, of the potential at each bit line, without changing the column address. In the data rewrite operation, the rewrite operation is not effected for a memory cell with the data once properly written, by changing the data in the data register.
摘要翻译：可以缩短程序验证和擦除验证操作所需的时间。即使重复执行写入和擦除操作，也可以抑制存储单元的阈值变化。在编程和擦除操作之后，可以根据每个位线上的电位的预充电之后的所有位线同时判断操作，而不改变列地址。在数据重写操作中，通过改变数据寄存器中的数据，对具有一次适当写入的数据的存储单元不进行重写操作。

32. 发明授权

US5268867A Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US5268867A
公开(公告)日：1993-12-07
申请号：US957001
申请日：1992-10-06
申请人： Masaki Momodomi , Yasuo Itoh , Yoshihisa Iwata , Tomoharu Tanaka , Yoshiyuki Tanaka
发明人： Masaki Momodomi , Yasuo Itoh , Yoshihisa Iwata , Tomoharu Tanaka , Yoshiyuki Tanaka
IPC分类号： G11C11/409 , G11C5/14 , G11C7/10 , G11C16/06 , G11C16/20 , G11C16/26 , G11C7/00
CPC分类号： G11C7/1048 , G11C16/20 , G11C16/26 , G11C5/147
摘要： The present invention provides a semiconductor memory device capable of reducing its current consumption, controlling the generation of noise, and increasing in access using a precharge voltage applied to a precharge circuit. In the semiconductor memory device, a precharge circuit is connected to a pair of data input/output lines, and includes a MOS transistor connected between one of the data input/output lines and a node of a precharge voltage and a MOS transistor connected between the other data input/output line and a node of the precharge voltage. The gates of the MOS transistors are supplied with control signals so that the MOS transistors are turned on when the data input/output lines are precharged. A MOS transistor is connected to the data input/output lines for equalizing them. The precharge voltage is set to half of a value obtained by subtracting the threshold voltage of the MOS transistor from the power supply voltage.
摘要翻译：本发明提供一种半导体存储器件，其能够降低其电流消耗，控制噪声的产生，并且使用施加到预充电电路的预充电电压来增加存取。在半导体存储器件中，预充电电路连接到一对数据输入/输出线，并且包括连接在数据输入/输出线之一和预充电电压的节点之间的MOS晶体管和连接在其他数据输入/输出线和预充电电压的节点。 MOS晶体管的栅极被提供控制信号，使得当数据输入/输出线被预充电时MOS晶体管导通。 MOS晶体管连接到数据输入/输出线，以使它们均衡。预充电电压被设定为通过从电源电压减去MOS晶体管的阈值电压而获得的值的一半。

33. 发明授权

US5247480A Electrically erasable progammable read-only memory with nand cell blocks 失效
标题翻译：具有n个单元块的电可擦除可编程只读存储器
公开(公告)号：US5247480A
公开(公告)日：1993-09-21
申请号：US773723
申请日：1991-10-09
申请人： Yasuo Itoh , Masaki Momodomi , Yoshihisa Iwata , Tomoharu Tanaka , Fujio Masuoka
发明人： Yasuo Itoh , Masaki Momodomi , Yoshihisa Iwata , Tomoharu Tanaka , Fujio Masuoka
IPC分类号： G11C16/08 , G11C16/12 , G11C16/30
CPC分类号： G11C16/08 , G11C16/12 , G11C16/30
摘要： An electrically erasable programmable read-only memory has memory cell blocks, each of which has NAND type cell units associated with the bit lines respectively. Each cell unit has a series-circuit of floating gate type memory cell transistors and a selection transistor provided between the corresponding bit line and the series-circuit of memory cell transistors. A row decoder is provided in common to the memory cell blocks, for generating an "H" level voltage which is supplied to a selection gate control line connected to the selection transistor and to a selected word line or lines in a cell unit. A voltage boost circuit is provided for every memory cell block, for causing the "H" level voltage to increase up to a preselected potential level which is high enough to render the cell transistors conductive. The voltage boost circuit includes a first booster section for the selection gate control line, and a second section for the word lines. The second section operates in response to the output voltage of the first section.
摘要翻译：电可擦除可编程只读存储器具有存储单元块，每个存储单元块分别具有与位线相关联的NAND型单元单元。每个单元单元具有浮置型存储单元晶体管的串联电路和设置在相应位线和存储单元晶体管的串联电路之间的选择晶体管。向存储单元块共同地提供行解码器，用于产生提供给连接到选择晶体管的选择栅极控制线和单元单元中所选择的字线或线的“H”电平电压。为每个存储单元块提供升压电路，用于使“H”电平电压增加到足以使单元晶体管导通的预选电位电平。升压电路包括用于选择栅极控制线的第一升压部分和用于字线的第二部分。第二部分响应于第一部分的输出电压而工作。

34. 发明授权

US5103895A Method and apparatus of continuously casting a metal sheet 失效
标题翻译：连续铸造金属板的方法和装置
公开(公告)号：US5103895A
公开(公告)日：1992-04-14
申请号：US554190
申请日：1990-07-17
申请人： Takashi Furuya , Hidemaro Takeuchi , Akio Kasama , Yasuo Itoh , Motoya Fujii , Hideki Oka , Shogo Matsumura , Kunimasa Sasaki , Keiichi Yamamoto
发明人： Takashi Furuya , Hidemaro Takeuchi , Akio Kasama , Yasuo Itoh , Motoya Fujii , Hideki Oka , Shogo Matsumura , Kunimasa Sasaki , Keiichi Yamamoto
IPC分类号： B22D11/06
CPC分类号： B22D11/0651 , B22D11/064 , B22D11/0697
摘要： Molten metal is supplied to a pouring basin formed between cooling members, such as movable cooling drums. A closed space is formed at a meniscus area whereat any one of the cooling members starts to come into contact with the molten metal, and a soluble gas or a mixture of soluble and insoluble gases is supplied to and filled in the closed space, thereby covering the meniscus area with the gas or the mixture. This arrangement enables a continuous casting of a thin metal sheet without surface cracks and having excellent surface characteristics.
摘要翻译：将熔融金属供应到形成在诸如可移动冷却鼓之类的冷却构件之间的倾倒盆中。在弯液面区域处形成封闭空间，其中任何一个冷却构件开始与熔融金属接触，并且将可溶性气体或可溶性和不溶性气体的混合物供给并填充在封闭空间中，从而覆盖弯液面与气体或混合物。这种布置使得能够连续铸造薄金属片而没有表面裂纹并且具有优异的表面特性。

35. 发明授权

US4638458A Semiconductor memory address lines with varied interval contact holes 失效
标题翻译：具有不同间隔接触孔的半导体存储器地址线
公开(公告)号：US4638458A
公开(公告)日：1987-01-20
申请号：US715360
申请日：1985-03-25
申请人： Yasuo Itoh
发明人： Yasuo Itoh
IPC分类号： G11C11/401 , G11C11/40 , H01L21/3205 , H01L21/8242 , H01L23/52 , H01L23/528 , H01L27/10 , H01L27/108 , G11C5/10
CPC分类号： H01L23/5283 , H01L27/10805 , H01L2924/0002
摘要： According to a memory of the invention which can read/write data, word lines are connected to memory cells arranged on a semiconductor substrate. Each word line has a double layered structure comprising first and second conductive lines. An insulative layer is sandwiched between the conductive lines. Since the insulative layer has a plurality of contact holes formed along the extended direction of the first and second lines and spaced by an irregular pitch, the stacked lines are discontinuously and electrically connected to each other through these contact holes.
摘要翻译：根据可读/写数据的本发明的存储器，字线连接到布置在半导体衬底上的存储单元。每个字线具有包括第一和第二导线的双层结构。绝缘层夹在导线之间。由于绝缘层具有沿着第一和第二线的延伸方向形成并且间隔不规则间距的多个接触孔，所以堆叠的线通过这些接触孔不连续地电连接。

36. 发明授权

US4591670A Echo canceller and echo suppressor for frequency divisional attenuation of acoustic echoes 失效
标题翻译：回声消除器和回声抑制器，用于声学回波的分频衰减
公开(公告)号：US4591670A
公开(公告)日：1986-05-27
申请号：US532628
申请日：1983-09-15
申请人： Yasuo Itoh
发明人： Yasuo Itoh
IPC分类号： H04B3/20 , H04B3/23 , H04M1/60 , H04M9/00
CPC分类号： H04B3/20
摘要： An echo cancelling circuit is composed of digital circuits. An echo canceller is supplied with lower send-in and receive-in components derived from a send-in and a receive-in digital signal, respectively, in a lower frequency band below a predetermined frequency. The echo canceller produces a lower digital signal component which is free from a lower echo signal component. The echo canceller furthermore produces a control signal indicative of presence and absence of a lower voice signal component in the lower send-in component. Controlled by the control signal and supplied with a higher send-in component of a frequency band higher than the predetermined frequency, an adjustable attenuator produces a higher digital signal component in which a higher echo signal component is suppressed with no attenuation and either a constant or an adjustable positive attenuation given to the higher send-in component when the control signal indicates presence and absence of the lower voice signal component, respectively. The lower and the higher digital signal components are combined into a send-out signal exempted from the echo signal, which may or may not comprise a reverberation signal introduced into the send-in digital signal by audible sound reproduced from a voice signal carried by the receive-in digital signal.
摘要翻译：回波消除电路由数字电路组成。在低于预定频率的较低频带中，回波消除器分别被提供有从发送和接收数字信号导出的较低的发送和接收分量。回波消除器产生较低的数字信号分量，其没有较低的回波信号分量。回波消除器进一步产生指示下部发送单元中存在和不存在较低语音信号分量的控制信号。由控制信号控制并提供高于预定频率的频带的更高的发送分量，可调衰减器产生较高的数字信号分量，其中较高的回波信号分量被抑制而无衰减，或者是常数或当控制信号分别指示存在和不存在较低语音信号分量时，给予较高发送分量的可调节的正衰减。较低和较高的数字信号分量被组合成从回波信号中免除的发送信号，其可以或可以不包括通过从由所接收的语音信号携带的语音信号再现的可听声音引入到接收数字信号中的混响信号接收数字信号。

37. 发明授权

US4079330A System for demodulating angle-modulated signals 失效
标题翻译：用于解调角度调制信号的系统
公开(公告)号：US4079330A
公开(公告)日：1978-03-14
申请号：US746336
申请日：1976-12-01
申请人： Yukinobu Ishigaki , Kohei Sasamura , Yasuo Itoh , Teruo Muraoka
发明人： Yukinobu Ishigaki , Kohei Sasamura , Yasuo Itoh , Teruo Muraoka
IPC分类号： G11B3/00 , H03D3/00 , H03D3/02 , H03D3/06 , H03D3/24 , H03D3/26 , H04H20/89 , H04S3/00 , H03D3/22
CPC分类号： H04H20/88 , H03D3/005 , H03D3/02 , H03D3/06 , H03D3/24 , H03D3/26 , H04H20/89
摘要： The inventive system demodulates angle-modulated signals. A tracking band-pass filter responds to an input angle-modulated wave signal. The tracking filter has a pass band with a center frequency controlled by a control signal. A first amplitude limiter limits the amplitude of the input angle-modulated wave signal. A differentiation circuit establishes a 90.degree. phase difference between a signal passing through the tracking band-pass filter and a signal passing through the amplitude limiter. A phase comparator responds to an input with the two signals with a 90.degree. phase difference therebetween and produces an output error signal in accordance with this phase difference. This output error signal is supplied as the control signal to the tracking band-pass filter. This output error signal is also passed through a low pass filter to produce the demodulated signal.
摘要翻译：本发明的系统解调角度调制信号。跟踪带通滤波器响应输入角度调制波信号。跟踪滤波器具有通过控制信号控制的中心频率的通带。第一幅度限制器限制输入角度调制波信号的幅度。差分电路在通过跟踪带通滤波器的信号和通过幅度限制器的信号之间建立90°的相位差。相位比较器响应输入，其中两个信号之间的相位差为90°，并根据该相位差产生输出误差信号。该输出误差信号作为控制信号提供给跟踪带通滤波器。该输出误差信号也通过低通滤波器以产生解调信号。

38. 发明授权

US4030533A Continuous casting system 失效
标题翻译：连铸系统
公开(公告)号：US4030533A
公开(公告)日：1977-06-21
申请号：US686362
申请日：1976-05-14
申请人： Yasuo Itoh , Yoshitake Suzuki , Hirohiko Shibutami , Koichi Hirano , Muneo Tagami
发明人： Yasuo Itoh , Yoshitake Suzuki , Hirohiko Shibutami , Koichi Hirano , Muneo Tagami
IPC分类号： B22D11/12 , B22D11/16 , B22D11/10
CPC分类号： B22D11/16 , B22D11/12 , B22D11/122
摘要： A continuous casting system provides with a foreign matter receiving gutter between two adjacent rolls to receive foreign matters dropping during the drawing operation of castings, and a foreign matter removing nozzle to wash away the foreign matter dropped on the gutter. An electromagnetic agitator of the continuous casting system is provided with a proximity switch at least at its inlet side to sense a magnetic substance approaching the agitator thereby to control the operation of the agitator, thus eliminating troubles caused by the vibration of the magnetic substance.
摘要翻译：连续铸造系统在两个相邻的辊之间提供接收沟槽的异物，以在铸件的拉制操作期间接收异物掉落，以及异物去除喷嘴，以清除掉在沟槽上的异物。连续铸造系统的电磁搅拌器至少在其入口侧设置有接近开关，以感测接近搅拌器的磁性物质，从而控制搅拌器的操作，从而消除由磁性物质的振动引起的麻烦。

39. 发明授权

US3983500A Angle modulated wave demodulation system 失效
公开(公告)号：US3983500A
公开(公告)日：1976-09-28
申请号：US502531
申请日：1974-09-03
申请人： Nobuaki Takahashi , Kazunori Nishikawa , Yoshiki Iwasaki , Masaaki Satoh , Katsuhiro Ohba , Shinji Nakamura , Tatsuo Sawada , Nobuhide Ohsaki , Yasuo Itoh , Nobuaki Suda , Yasuhisa Okabe , Hideaki Ozaki
发明人： Nobuaki Takahashi , Kazunori Nishikawa , Yoshiki Iwasaki , Masaaki Satoh , Katsuhiro Ohba , Shinji Nakamura , Tatsuo Sawada , Nobuhide Ohsaki , Yasuo Itoh , Nobuaki Suda , Yasuhisa Okabe , Hideaki Ozaki
IPC分类号： G11B20/00 , G11B23/00 , H03D3/24 , H04S3/00 , G11B3/04 , G11B3/74 , H03D3/00
CPC分类号： H03D3/244 , G11B20/00992 , G11B23/0007 , H04S3/006
摘要： An angle modulated wave demodulation system demodulates an input angle modulated wave by means of a phase locked loop system which comprises a phase comparator, which is operated responsive to an input angle modulated wave. A voltage controlled oscillator is supplied with a part of the output of the phase comparator which controls its oscillation frequency. The oscillator supplies its oscillation frequency to the phase comparator. The phase locked loop system has a lock frequency range which decreases its width when the level of the input angle modulated wave is below a predetermined level. The portion of this lock range in which the width of the lock range decreases is positively utilized. The voltage controlled oscillator oscillates at a frequency equal to the center frequency of the carrier of the input angle modulated wave, when the phase locked loop becomes unlocked.

40. 发明授权

US3940698A Muting circuit 失效
标题翻译：静音电路
公开(公告)号：US3940698A
公开(公告)日：1976-02-24
申请号：US361218
申请日：1973-05-17
申请人： Yasuo Itoh
发明人： Yasuo Itoh
IPC分类号： H03D3/04 , H03D5/00 , H03G3/34 , H04B1/10 , H04S3/00
CPC分类号： H03D5/00 , H03D3/04 , H03G3/34 , H04S3/006
摘要： A muting circuit comprises, substantially, a gate circuit for passing or not passing input signals and a circuit for forming a control signal for controlling the gating operation of the gate circuit. The control signal forming circuit has a circuit for detecting the level of a carrier wave in the input signal. A first time constant circuit has a very small time constant .tau..sub.1. A second time constant circuit exhibits a delay time constant of .tau..sub.2 (where .tau..sub.2 >>.tau..sub.1) when a carrier wave component exists in the input and a delay time constant which becomes substantially zero when a carrier wave component does not exist. A third time constant circuit of a time constant .tau..sub.3 (where .tau..sub.3 >.tau..sub.2) is with a 180.degree. phase relationship relative to the second time constant circuit.
摘要翻译：静音电路基本上包括用于通过或不通过输入信号的门电路和用于形成用于控制门电路的选通操作的控制信号的电路。控制信号形成电路具有用于检测输入信号中载波电平的电路。第一时间常数电路具有非常小的时间常数τ1。当输入中存在载波分量时，第二时间常数电路表现出τ2的延迟时间常数（其中τ2 >>τ1）和延迟时间常数当不存在载波分量时，其变为基本为零。时间常数τ3（其中tau 3> tau 2）的第三次恒定电路相对于第二时间常数电路具有180°的相位关系。

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