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    • 32. 发明授权
    • Vehicle pop-up hood apparatus
    • 车辆弹出式发动机罩
    • US08398125B2
    • 2013-03-19
    • US12004060
    • 2007-12-20
    • Hiroyuki TakahashiShuji MasudaYukio NakagawaHajime Kitte
    • Hiroyuki TakahashiShuji MasudaYukio NakagawaHajime Kitte
    • E05C9/00
    • B60R21/34B60R21/38Y10T16/521Y10T292/0849
    • A vehicle pop-up hood apparatus is provided that includes: an arm member, whose proximal end portion is connected to a body of a vehicle so as to be pivotable about an axis extending in the vehicle width direction; a first connection section by which a hood of the vehicle is connected to a tip portion of the arm member, and that allows the hood to pivot relative to the arm member about an axis extending in the vehicle width direction; a second connection section that connects the hood to the arm member to prevent the hood from pivoting relative to the arm member about the first connection section; and an actuator that generates a lifting force that lifts the hood relative to the body and acts in a direction such that the connection between the hood and the arm member by means of the second connection section is broken.
    • 一种车辆罩式发动机装置,其特征在于,包括:臂部件,其基端部与车体连接,能够沿车宽方向延伸的轴线转动; 第一连接部,通过该第一连接部,车辆的罩与臂构件的前端部连接,并且能够使罩相对于臂构件围绕车宽方向延伸的轴线枢转; 第二连接部,其将所述罩与所述臂部件连接,以防止所述罩相对于所述臂部件绕所述第一连接部转动; 以及致动器,其产生提升力,所述提升力相对于所述主体提升所述罩,并且沿着使得所述罩和所述臂构件之间通过所述第二连接部的连接断裂的方向作用。
    • 35. 发明申请
    • SEMICONDUCTOR INTEGRATED DEVICE
    • 半导体集成器件
    • US20120327732A1
    • 2012-12-27
    • US13600412
    • 2012-08-31
    • Hiroyuki TakahashiTetsuo Fukushi
    • Hiroyuki TakahashiTetsuo Fukushi
    • G11C7/12
    • G11C11/4085G11C7/062G11C7/12G11C11/4091G11C11/4094G11C11/4097
    • Provided is a semiconductor integrated device including a semiconductor memory circuit and a peripheral circuit of the semiconductor memory circuit. The peripheral circuit includes a first transistor having a first voltage as a breakdown voltage of a gate oxide film. The semiconductor memory circuit includes a pair of bit lines, one of the pair of bit lines being connected to a gate transistor of a memory cell, and a precharge circuit that includes a transistor having a breakdown voltage substantially equal to that of the first transistor, and precharges the pair of bit lines to a predetermined voltage in response to an activation signal. The activation signal of the precharge circuit is a second voltage higher than the first voltage.
    • 提供一种包括半导体存储电路和半导体存储电路的外围电路的半导体集成器件。 外围电路包括具有作为栅氧化膜的击穿电压的第一电压的第一晶体管。 半导体存储器电路包括一对位线,一对位线中的一个连接到存储单元的栅极晶体管,以及预充电电路,其包括具有基本上等于第一晶体管的击穿电压的晶体管, 并且响应于激活信号将一对位线预充电到预定电压。 预充电电路的激活信号是比第一电压高的第二电压。
    • 36. 发明授权
    • Semiconductor integrated circuit
    • 半导体集成电路
    • US08331172B2
    • 2012-12-11
    • US12987690
    • 2011-01-10
    • Hiroyuki Takahashi
    • Hiroyuki Takahashi
    • G11C7/00G11C7/10G11C5/06G11C8/00
    • G11C7/1006G11C7/1012G11C7/1048
    • Disclosed is a semiconductor integrated circuit in which the number of bus lines is reduced and current consumption during operation can be lessened. The semiconductor integrated circuit includes a circuit unit (e.g., a memory cell array plate) which is divided into a plurality of banks (bank 1, bank 2) and processes multiple bits of data; a plurality of input/output circuits which perform input and output of multiple bits of data; and a plurality of bus lines which provide electrical coupling between the respective data input/output circuits and the circuit unit. Among the bus lines, two or more bus lines laid to extend laterally along the horizontal sides of the banks and coupled to different banks include a common bus line adapted as a shared bus line into which the middle parts of the bus lines are merged.
    • 公开了一种半导体集成电路,其中总线数量减少,并且可以减少操作期间的电流消耗。 半导体集成电路包括被划分为多个存储体(存储体1,存储体2))并处理多位数据的电路单元(例如,存储单元阵列板) 执行多位数据的输入和输出的多个输入/输出电路; 以及在各个数据输入/输出电路和电路单元之间提供电耦合的多条总线。 在总线线路中,布置成沿着堤岸的水平侧横向延伸并且耦合到不同堤岸的两条或更多条母线包括适合作为公共线路的中间部分合并在其中的共用总线的公共总线。
    • 39. 发明授权
    • Radiation detector
    • 辐射检测器
    • US08269183B2
    • 2012-09-18
    • US12738678
    • 2008-09-29
    • Tetsuo FurumiyaJunichi OhiHiroyuki TakahashiKenji Shimazoe
    • Tetsuo FurumiyaJunichi OhiHiroyuki TakahashiKenji Shimazoe
    • H01L25/00H01L27/00
    • G01T1/1647
    • A radiation detector of this invention includes a pulse width modulation circuit for binarizing an analog electrical pulse outputted from a detector cell with a predetermined threshold, and modulating it into a digital electrical pulse, and a data superposer for outputting an incident position pulse train by superposing incident position pulses and concerning the position of the detector cell on which the radiation has fallen, and the digital electrical pulse detected by the radiation. Thus, position information which has conventionally been added after output of digital electrical pulse can be added into the digital electrical pulse. Therefore, compared with the conventional technique of adding position information after digital electrical pulse and transmitting the position information, the position of the radiation incident on the detector cell can be detected in a short time.
    • 本发明的放射线检测器包括用于将从检测器单元输出的模拟电脉冲二值化为预定阈值并将其调制为数字电脉冲的脉宽调制电路,以及用于通过叠加输出入射位置脉冲串的数据上载器 入射位置脉冲和关于辐射已经下降的检测器单元的位置以及由辐射检测的数字电脉冲。 因此,可以将数字电脉冲输出之后常规添加的位置信息加到数字电脉冲中。 因此,与在数字电脉冲之后添加位置信息并发送位置信息的常规技术相比,可以在短时间内检测入射到检测器单元上的辐射的位置。