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31. 发明申请

US20130001518A1 FABRICATION OF GRAPHENE NANOELECTRONIC DEVICES ON SOI STRUCTURES 有权
标题翻译：石墨纳米电子器件在SOI结构上的制造
公开(公告)号：US20130001518A1
公开(公告)日：2013-01-03
申请号：US13611923
申请日：2012-09-12
申请人： Yu-Ming Lin , Jeng-Bang Yau
发明人： Yu-Ming Lin , Jeng-Bang Yau
IPC分类号： H01L29/78 , H01L29/165 , H01L29/08
CPC分类号： H01L29/1606 , H01L29/66742 , H01L29/7781 , H01L29/78687
摘要： A semiconductor-on-insulator structure and a method of forming the silicon-on-insulator structure including an integrated graphene layer are disclosed. In an embodiment, the method comprises processing a silicon material to form a buried oxide layer within the silicon material, a silicon substrate below the buried oxide, and a silicon-on-insulator layer on the buried oxide. A graphene layer is transferred onto the silicon-on-insulator layer. Source and drain regions are formed in the silicon-on-insulator layer, and a gate is formed above the graphene. In one embodiment, the processing includes growing a respective oxide layer on each of first and second silicon sections, and joining these silicon sections together via the oxide layers to form the silicon material. The processing, in an embodiment, further includes removing a portion of the first silicon section, leaving a residual silicon layer on the bonded oxide, and the graphene layer is positioned on this residual silicon layer.
摘要翻译：公开了一种绝缘体上半导体结构和一种形成包括一体化石墨烯层的绝缘体上硅结构的方法。在一个实施例中，该方法包括处理硅材料以在硅材料内形成掩埋氧化物层，在掩埋氧化物之下形成硅衬底，以及在掩埋氧化物上形成绝缘体上硅层。将石墨烯层转移到绝缘体上硅层上。源极和漏极区域形成在绝缘体上硅层中，并且在石墨烯上方形成栅极。在一个实施例中，该处理包括在第一和第二硅部分中的每一个上生长相应的氧化物层，并且经由氧化物层将这些硅部分连接在一起以形成硅材料。在一个实施例中，所述处理还包括去除所述第一硅部分的一部分，在所述键合的氧化物上留下残留的硅层，并且所述石墨烯层位于所述剩余硅层上。

32. 发明申请

US20120181505A1 Radiation Hardened Transistors Based on Graphene and Carbon Nanotubes 有权
标题翻译：基于石墨烯和碳纳米管的辐射硬化晶体管
公开(公告)号：US20120181505A1
公开(公告)日：2012-07-19
申请号：US13006081
申请日：2011-01-13
申请人： Yu-Ming Lin , Jeng-Bang Yau
发明人： Yu-Ming Lin , Jeng-Bang Yau
IPC分类号： H01L29/76 , H01L21/20
CPC分类号： H01L29/16 , H01L21/02378 , H01L21/02381 , H01L21/0242 , H01L21/02488 , H01L21/02527 , H01L21/02656 , H01L29/1606 , H01L29/66742 , H01L29/78603 , H01L29/78684
摘要： Graphene- and/or carbon nanotube-based radiation-hard transistor devices and techniques for the fabrication thereof are provided. In one aspect, a method of fabricating a radiation-hard transistor is provided. The method includes the following steps. A radiation-hard substrate is provided. A carbon-based material is formed on the substrate wherein a portion of the carbon-based material serves as a channel region of the transistor and other portions of the carbon-based material serve as source and drain regions of the transistor. Contacts are formed to the portions of the carbon-based material that serve as the source and drain regions of the transistor. A gate dielectric is deposited over the portion of the carbon-based material that serves as the channel region of the transistor. A top-gate contact is formed on the gate dielectric.
摘要翻译：提供了基于石墨烯和/或碳纳米管的辐射 - 硬晶体管器件及其制造技术。一方面，提供一种制造辐射 - 硬质晶体管的方法。该方法包括以下步骤。提供辐射硬质基板。在基板上形成碳基材料，其中一部分碳基材料用作晶体管的沟道区，碳基材料的其它部分用作晶体管的源极和漏极区。触点形成为用作晶体管的源极和漏极区域的碳基材料的部分。在用作晶体管的沟道区的碳基材料的部分上沉积栅极电介质。在栅极电介质上形成顶栅接触。

33. 发明申请

US20110108802A1 Metal-Free Integrated Circuits Comprising Graphene and Carbon Nanotubes 有权
标题翻译：包含石墨烯和碳纳米管的无金属集成电路
公开(公告)号：US20110108802A1
公开(公告)日：2011-05-12
申请号：US12614724
申请日：2009-11-09
申请人： Yu-Ming Lin , Jeng-Bang Yau
发明人： Yu-Ming Lin , Jeng-Bang Yau
IPC分类号： H01L29/66 , H01L21/336
CPC分类号： H01L29/1606 , B82Y10/00 , H01L27/124 , H01L29/0665 , H01L29/45 , H01L29/4908 , H01L29/66742 , H01L29/7781 , H01L29/78618 , H01L29/78684
摘要： An integrated circuit includes a graphene layer, the graphene layer comprising a region of undoped graphene, the undoped graphene comprising a channel of a transistor, and a region of doped graphene, the doped graphene comprising a contact of the transistor; and a gate of the transistor, the gate comprising a carbon nanotube film. A method of fabricating an integrated circuit comprising graphene and carbon nanotubes, includes forming a graphene layer; doping a portion of the graphene layer, resulting in doped graphene and undoped graphene; forming a carbon nanotube film; and etching the carbon nanotube film to form a gate of a transistor, wherein the transistor further comprises a channel comprising the undoped graphene and a contact comprising the doped graphene. A transistor includes a gate, the gate comprising a carbon nanotube film; a channel, the channel comprising undoped graphene; and a contact, the contact comprising doped graphene.
摘要翻译：集成电路包括石墨烯层，所述石墨烯层包括未掺杂的石墨烯的区域，所述未掺杂的石墨烯包括晶体管的沟道和掺杂的石墨烯的区域，所述掺杂的石墨烯包括所述晶体管的接触; 和晶体管的栅极，所述栅极包括碳纳米管膜。一种制造包括石墨烯和碳纳米管的集成电路的方法，包括形成石墨烯层; 掺杂一部分石墨烯层，导致掺杂的石墨烯和未掺杂的石墨烯; 形成碳纳米管膜; 以及蚀刻所述碳纳米管膜以形成晶体管的栅极，其中所述晶体管还包括包含所述未掺杂的石墨烯的沟道和包含所述掺杂石墨烯的接触。晶体管包括栅极，栅极包括碳纳米管膜; 通道，通道包括未掺杂的石墨烯; 和触点，所述触点包括掺杂的石墨烯。

34. 发明授权

US08673703B2 Fabrication of graphene nanoelectronic devices on SOI structures 有权
标题翻译：在SOI结构上制造石墨烯纳米电子器件
公开(公告)号：US08673703B2
公开(公告)日：2014-03-18
申请号：US12620320
申请日：2009-11-17
申请人： Yu-Ming Lin , Jeng-Bang Yau
发明人： Yu-Ming Lin , Jeng-Bang Yau
IPC分类号： H01L21/84
CPC分类号： H01L29/1606 , H01L29/66742 , H01L29/7781 , H01L29/78687
摘要： A semiconductor-on-insulator structure and a method of forming the silicon-on-insulator structure including an integrated graphene layer are disclosed. In an embodiment, the method comprises processing a silicon material to form a buried oxide layer within the silicon material, a silicon substrate below the buried oxide, and a silicon-on-insulator layer on the buried oxide. A graphene layer is transferred onto the silicon-on-insulator layer. Source and drain regions are formed in the silicon-on-insulator layer, and a gate is formed above the graphene. In one embodiment, the processing includes growing a respective oxide layer on each of first and second silicon sections, and joining these silicon sections together via the oxide layers to form the silicon material. The processing, in an embodiment, further includes removing a portion of the first silicon section, leaving a residual silicon layer on the bonded oxide, and the graphene layer is positioned on this residual silicon layer.
摘要翻译：公开了一种绝缘体上半导体结构和一种形成包括一体化石墨烯层的绝缘体上硅结构的方法。在一个实施例中，该方法包括处理硅材料以在硅材料内形成掩埋氧化物层，在掩埋氧化物之下形成硅衬底，以及在掩埋氧化物上形成绝缘体上硅层。将石墨烯层转移到绝缘体上硅层上。源极和漏极区域形成在绝缘体上硅层中，并且在石墨烯上方形成栅极。在一个实施例中，该处理包括在第一和第二硅部分中的每一个上生长相应的氧化物层，并且经由氧化物层将这些硅部分连接在一起以形成硅材料。在一个实施例中，所述处理还包括去除所述第一硅部分的一部分，在所述键合的氧化物上留下残留的硅层，并且所述石墨烯层位于所述剩余硅层上。

35. 发明申请

US20120115295A1 GRAPHENE BASED SWITCHING DEVICE HAVING A TUNABLE BANDGAP 有权
标题翻译：基于GRAPHENE的切换装置具有可控带宽
公开(公告)号：US20120115295A1
公开(公告)日：2012-05-10
申请号：US13351402
申请日：2012-01-17
申请人： Yu-Ming Lin , Jeng-Bang Yau
发明人： Yu-Ming Lin , Jeng-Bang Yau
IPC分类号： H01L21/336
CPC分类号： H01L29/1606 , H01L29/4908 , H01L29/7781 , H01L29/7843 , H01L29/78645 , H01L29/78648 , H01L29/78684
摘要： A method of implementing bandgap tuning of a graphene-based switching device includes subjecting a bi-layer graphene to an electric field while simultaneously subjecting the bi-layer graphene to an applied strain that reduces an interlayer spacing between the bi-layer graphene, thereby creating a bandgap in the bi-layer graphene.
摘要翻译：实现基于石墨烯的切换装置的带隙调谐的方法包括使双层石墨烯经受电场，同时使双层石墨烯经受减小双层石墨烯之间的层间距的施加应变，从而产生双层石墨烯中的带隙。

36. 发明申请

US20120112166A1 GRAPHENE BASED SWITCHING DEVICE HAVING A TUNABLE BANDGAP 有权
公开(公告)号：US20120112166A1
公开(公告)日：2012-05-10
申请号：US13351398
申请日：2012-01-17
申请人： Yu-Ming Lin , Jeng-Bang Yau
发明人： Yu-Ming Lin , Jeng-Bang Yau
IPC分类号： H01L29/12
CPC分类号： H01L29/1606 , H01L29/4908 , H01L29/7781 , H01L29/7843 , H01L29/78645 , H01L29/78648 , H01L29/78684
摘要： A method of implementing bandgap tuning of a graphene-based switching device includes subjecting a bi-layer graphene to an electric field while simultaneously subjecting the bi-layer graphene to an applied strain that reduces an interlayer spacing between the bi-layer graphene, thereby creating a bandgap in the bi-layer graphene.

37. 发明授权

US08105928B2 Graphene based switching device having a tunable bandgap 有权
标题翻译：基于石墨烯的开关装置具有可调谐带隙
公开(公告)号：US08105928B2
公开(公告)日：2012-01-31
申请号：US12612018
申请日：2009-11-04
申请人： Yu-Ming Lin , Jeng-Bang Yau
发明人： Yu-Ming Lin , Jeng-Bang Yau
IPC分类号： H01L21/24 , H01L29/06 , G05F3/02
CPC分类号： H01L29/1606 , H01L29/4908 , H01L29/7781 , H01L29/7843 , H01L29/78645 , H01L29/78648 , H01L29/78684
摘要： A method of implementing bandgap tuning of a graphene-based switching device includes subjecting a bi-layer graphene to an electric field while simultaneously subjecting the bi-layer graphene to an applied strain that reduces an interlayer spacing between the bi-layer graphene, thereby creating a bandgap in the bi-layer graphene.
摘要翻译：实现基于石墨烯的切换装置的带隙调谐的方法包括使双层石墨烯经受电场，同时使双层石墨烯经受减小双层石墨烯之间的层间间隔的施加应变，从而产生双层石墨烯中的带隙。

38. 发明申请

US20110101309A1 GRAPHENE BASED SWITCHING DEVICE HAVING A TUNABLE BANDGAP 有权
标题翻译：基于GRAPHENE的切换装置具有可控带宽
公开(公告)号：US20110101309A1
公开(公告)日：2011-05-05
申请号：US12612018
申请日：2009-11-04
申请人： Yu-Ming Lin , Jeng-Bang Yau
发明人： Yu-Ming Lin , Jeng-Bang Yau
IPC分类号： H01L29/16 , H01L21/04
CPC分类号： H01L29/1606 , H01L29/4908 , H01L29/7781 , H01L29/7843 , H01L29/78645 , H01L29/78648 , H01L29/78684
摘要： A method of implementing bandgap tuning of a graphene-based switching device includes subjecting a bi-layer graphene to an electric field while simultaneously subjecting the bi-layer graphene to an applied strain that reduces an interlayer spacing between the bi-layer graphene, thereby creating a bandgap in the bi-layer graphene.
摘要翻译：实现基于石墨烯的切换装置的带隙调谐的方法包括使双层石墨烯经受电场，同时使双层石墨烯经受减小双层石墨烯之间的层间间隔的施加应变，从而产生双层石墨烯中的带隙。

39. 发明申请

US20070096228A1 Magnetoelectronic devices based on colossal magnetoresistive thin films 有权
标题翻译：基于巨磁阻薄膜的磁电子器件
公开(公告)号：US20070096228A1
公开(公告)日：2007-05-03
申请号：US10582813
申请日：2004-12-15
申请人： Charles Ahn , Lior Klein , Yosef Basson , Xia Hong , Jeng-Bang Yau
发明人： Charles Ahn , Lior Klein , Yosef Basson , Xia Hong , Jeng-Bang Yau
IPC分类号： H01L43/00
CPC分类号： G01R33/093 , B82Y25/00 , G01R33/07 , G01R33/09 , G11C11/18 , H01F1/407 , H01F10/1933 , H01L43/06
摘要： The present invention is directed to the use of perovskite manganite thin films and other magnetic films that exhibit both planar Hall effect and biaxial magnetic anisotropy to form the active area in magnetic sensor devices and in magnetic bit cells used in magnetoresistive random access memory (MRAM) devices. The manganite thin films of the invention are ferromagnetic manganites of the formula R1-xAxMnO3, wherein R is a rare-earth metal, A is an alkaline earth metal, and x is generally between about 0.15 and about 0.5.
摘要翻译：本发明涉及使用表现出平面霍尔效应和双轴磁各向异性两者的钙钛矿亚锰酸盐薄膜和其它磁性膜来形成磁传感器装置和磁阻随机存取存储器（MRAM）中使用的磁位元件中的有效面积的方法，设备。本发明的亚锰酸盐薄膜是具有式R 1-x A x MnO 3 3的铁磁性锰矿，其中R是稀土金属，A是碱土金属，x通常在约0.15和约0.5之间。

40. 发明授权

US09405017B2 Ultra-sensitive radiation dosimeters 有权
标题翻译：超敏感辐射剂量计
公开(公告)号：US09405017B2
公开(公告)日：2016-08-02
申请号：US13611162
申请日：2012-09-12
申请人： Yu-Ming Lin , Jeng-Bang Yau
发明人： Yu-Ming Lin , Jeng-Bang Yau
IPC分类号： G01T1/24 , G01T1/02 , H01L31/119 , H01L29/16 , H01L31/18 , H01L51/00 , H01L51/42
CPC分类号： G01T1/026 , H01L29/1608 , H01L31/119 , H01L31/1804 , H01L51/0048 , H01L51/42
摘要： A method of forming a transistor comprises forming a conducting substrate layer, forming a dielectric layer over the conducting substrate layer, forming a channel over at least a portion of the dielectric layer and forming first and second source/drain regions contacting respective first and second portions of the channel. The channel comprises a thin-film carbon material. The conducting substrate layer, the dielectric layer, the channel and the first and second source/drain regions are formed such that exposure to radiation causes a change in a threshold voltage of the transistor.
摘要翻译：一种形成晶体管的方法包括形成导电衬底层，在导电衬底层上形成电介质层，在电介质层的至少一部分上形成沟道，并形成与相应的第一和第二部分接触的第一和第二源/漏区的频道。该通道包括薄膜碳材料。形成导电基底层，电介质层，沟道以及第一和第二源极/漏极区，使得暴露于辐射导致晶体管的阈值电压的变化。

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