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31. 发明授权

US07017062B2 Method and apparatus for recovering from an overheated microprocessor 失效
公开(公告)号：US07017062B2
公开(公告)日：2006-03-21
申请号：US09751601
申请日：2000-12-29
申请人： David I. Poisner
发明人： David I. Poisner
IPC分类号： G06F1/30 , G06F1/26 , G06F11/00
CPC分类号： G06F1/206
摘要： One embodiment of a system for recovering from an overheated processor includes a processor that asserts a thermal trip signal when the internal temperature of the processor exceeds a maximum acceptable limit. A power management device asserts a power off signal to a voltage regulator module in response to the assertion of the thermal trip signal by the processor. The voltage regulator module removes power from the processor in response to the assertion of the power off signal by the power management device.

32. 发明授权

US06842776B1 Method for automatic device monitoring by a central computer 失效
标题翻译：中央计算机自动设备监控方法
公开(公告)号：US06842776B1
公开(公告)日：2005-01-11
申请号：US08985514
申请日：1997-12-05
申请人： David I. Poisner
发明人： David I. Poisner
IPC分类号： G05B23/02 , G06F11/34 , H04L29/06 , H04L29/08 , G06F15/16 , G05B15/02 , G06F11/00 , G21C17/00
CPC分类号： H04L67/12 , G05B23/0213 , G05B23/0283 , G06F11/3466 , H04L29/06 , H04L69/329
摘要： A method for monitoring a plurality of devices in a common environment. The method comprises the steps of receiving usage information from one of the devices and storing the usage information on a memory device of a computer. The method further comprises the steps of using the computer to automatically access a remote database containing information regarding the device and transmitting the stored usage information to the remote database. The information is received from the remote database and an action to be taken by the device is generated using the information from the remote database and the stored usage information.
摘要翻译：一种用于在公共环境中监视多个设备的方法。该方法包括从一个设备接收使用信息并将使用信息存储在计算机的存储设备上的步骤。所述方法还包括以下步骤：使用所述计算机自动访问包含关于所述设备的信息的远程数据库并将所存储的使用信息发送到所述远程数据库。从远程数据库接收信息，并且使用来自远程数据库的信息和存储的使用信息来生成要由设备采取的操作。

33. 发明授权

US06636912B2 Method and apparatus for mode selection in a computer system 有权
标题翻译：计算机系统中模式选择的方法和装置
公开(公告)号：US06636912B2
公开(公告)日：2003-10-21
申请号：US09414974
申请日：1999-10-07
申请人： Jasmin Ajanovic , David J. Harriman , David I. Poisner
发明人： Jasmin Ajanovic , David J. Harriman , David I. Poisner
IPC分类号： G06F1310
CPC分类号： H04L12/12 , Y02D50/40
摘要： According to one embodiment, a computer comprises a central processing unit (CPU), a first hub agent, a first hub interface coupled to the first hub agent, and a second hub agent coupled to the first hub interface. The first and second hub agents operate at a first data clocking rate determined by exchanging data clocking rate capabilities.
摘要翻译：根据一个实施例，计算机包括中央处理单元（CPU），第一集线器代理，耦合到第一集线器代理的第一集线器接口以及耦合到第一集线器接口的第二集线器代理。第一和第二中枢代理以通过交换数据时钟速率能力确定的第一数据时钟速率操作。

34. 发明授权

US06480965B1 Power management method for a computer system having a hub interface architecture 有权
标题翻译：具有集线器接口架构的计算机系统的电源管理方法
公开(公告)号：US06480965B1
公开(公告)日：2002-11-12
申请号：US09414999
申请日：1999-10-07
申请人： David J. Harriman , David I. Poisner , Jeff Rabe
发明人： David J. Harriman , David I. Poisner , Jeff Rabe
IPC分类号： G06F132
CPC分类号： G06F1/3253 , G06F1/3203 , Y02D10/151
摘要： According to one embodiment, a computer system includes a Central Processing Unit (CPU), a hub agent and a hub interface coupled to the first hub agent. The computer system transitions from a first power state to a second power state upon the CPU determining that no requests are pending to access the first hub interface.
摘要翻译：根据一个实施例，计算机系统包括中央处理单元（CPU），集线器代理和耦合到第一集线器代理的集线器接口。当CPU确定没有请求正在等待访问第一集线器接口时，计算机系统从第一电力状态转换到第二电力状态。

35. 发明授权

US06178528B1 Method and apparatus for reporting malfunctioning computer system 失效
标题翻译：报告故障计算机系统的方法和装置
公开(公告)号：US06178528B1
公开(公告)日：2001-01-23
申请号：US08933629
申请日：1997-09-18
申请人： David I. Poisner
发明人： David I. Poisner
IPC分类号： G06F1100
CPC分类号： G06F11/0772 , G06F11/0748 , H04L41/06
摘要： When a computer system malfunction is detected, a malfunction report signal is issued to a communications device that is coupled to a communications network. After the malfunction report signal is issued, the communications device fetches a malfunction report message from a non-volatile memory device. The communications device then transmits the malfunction report message over the communications network.
摘要翻译：当检测到计算机系统故障时，向耦合到通信网络的通信设备发出故障报告信号。在发出故障报告信号之后，通信设备从非易失性存储设备中获取故障报告消息。通信设备然后通过通信网络发送故障报告消息。

36. 发明授权

US6119189A Bus master transactions on a low pin count bus 失效
标题翻译：总线主交易在低引脚数总线上
公开(公告)号：US6119189A
公开(公告)日：2000-09-12
申请号：US936319
申请日：1997-09-24
申请人： Andrew H. Gafken , Joseph A. Bennett , David I. Poisner
发明人： Andrew H. Gafken , Joseph A. Bennett , David I. Poisner
IPC分类号： G06F13/38 , G06F13/00 , G06F13/28
CPC分类号： G06F13/387
摘要： A system including a host, a peripheral controller device, and a bus master device each coupled to a bus having a plurality of general purpose signal lines for carrying time-multiplexed address, data, and control information. The bus master device communicates with the host and the peripheral controller device via the bus.
摘要翻译：一种包括主机，外围控制器设备和总线主设备的系统，每个系统耦合到具有用于承载时分复用地址，数据和控制信息的多个通用信号线的总线。总线主机通过总线与主机和外围控制器设备进行通信。

37. 发明授权

US5983354A Method and apparatus for indication when a bus master is communicating with memory 失效
标题翻译：当总线主机与存储器通信时指示的方法和装置
公开(公告)号：US5983354A
公开(公告)日：1999-11-09
申请号：US984319
申请日：1997-12-03
申请人： David I. Poisner , Nima Homayoun , Sung Soo Cho
发明人： David I. Poisner , Nima Homayoun , Sung Soo Cho
IPC分类号： G06F13/16 , G06F1/32 , G06F12/00
CPC分类号： G06F13/1605 , Y02B60/1228
摘要： A method and apparatus for indicating when a device in a computer system is communicating with memory. Information is communicated between the device and memory in a manner that bypasses a bus. A side-band signal that indicates that this communication is transpiring is sent to a second device connected to the second bus. In response to this side-band signal, a bit in a register of the second device is set to a value that is then communicated by way of the second bus.
摘要翻译：一种用于指示计算机系统中的设备何时与存储器通信的方法和装置。以绕过总线的方式在设备和存储器之间传送信息。指示该通信正在发送的边带信号被发送到连接到第二总线的第二设备。响应于该边带信号，将第二设备的寄存器中的位设置为随后通过第二总线传送的值。

38. 发明授权

US5890004A Method and apparatus for signaling power management events between two devices 失效
标题翻译：用于在两个设备之间发送电源管理事件的方法和装置
公开(公告)号：US5890004A
公开(公告)日：1999-03-30
申请号：US777550
申请日：1996-12-30
申请人： David I. Poisner
发明人： David I. Poisner
IPC分类号： G06F1/32
CPC分类号： G06F1/3203
摘要： A method and apparatus for signaling power management events between integrated circuit devices in a computer system. The method includes the step of receiving in a first device one of a plurality of signals indicating a power management event that affects power management of a second device. The method also includes the step of encoding the signal received and transmitting the encoded signal to a power management device. The encoded signal is decoded in the power management device and a particular power management signal is transmitted to the second device from the power management device. In one embodiment, the step of encoding includes configuring a plurality of serial bits for transmission to the power management device, wherein the particular configuration of the serial bits indicates particular power management information.
摘要翻译：一种用于在计算机系统中的集成电路装置之间用于指示电力管理事件的方法和装置。该方法包括在第一设备中接收指示影响第二设备的电源管理的电源管理事件的多个信号之一的步骤。该方法还包括对接收到的信号进行编码并将编码信号发送到电力管理装置的步骤。编码信号在电力管理装置中被解码，并且特定的电力管理信号从电力管理装置发送到第二装置。在一个实施例中，编码步骤包括配置多个串行比特以传输到功率管理设备，其中串行比特的特定配置表示特定的功率管理信息。

39. 发明授权

US5729760A System for providing first type access to register if processor in first mode and second type access to register if processor not in first mode 失效
标题翻译：用于提供第一类访问的系统，如果处理器处于第一模式并且第二类型访问则注册处理器不处于第一模式
公开(公告)号：US5729760A
公开(公告)日：1998-03-17
申请号：US667789
申请日：1996-06-21
申请人： David I. Poisner
发明人： David I. Poisner
IPC分类号： G06F13/10 , G06F9/38 , G06F15/00 , G06F15/02
CPC分类号： G06F9/3869
摘要： A method of providing access to an input/output (I/O)-mapped register of a computer system is described. The computer system includes a processor operable in a system management mode (SMM), in which the processor accesses a dedicated system management memory space, a real mode, a protected mode and a virtual 8086 mode. The method includes the steps of firstly receiving an access request at the I/O-mapped register. Logic circuitry associated with the I/O-mapped register then determines whether the processor is operating in SMM by examining the status of a system management interrupt acknowledge (SMIACT#) output of the processor. If the logic circuitry determines that the processor is operating in SMM, a first, unrestricted type of access by the processor to the I/O-mapped register is provided. Alternatively, if the logic circuitry determines that the processor is not operating in SMM, a second, restricted type of access by the processor to the I/O-mapped register is provided. If the first, unrestricted type of access is provided to the processor, it performs an operation, under the direction of code stored in the dedicated system management memory address space, on the contents of the I/O-mapped register.
摘要翻译：描述了提供对计算机系统的输入/输出（I / O）映射寄存器的访问的方法。计算机系统包括可以以系统管理模式（SMM）操作的处理器，其中处理器访问专用系统管理存储器空间，实模式，保护模式和虚拟8086模式。该方法包括首先在I / O映射寄存器处接收访问请求的步骤。与I / O映射寄存器相关联的逻辑电路然后通过检查处理器的系统管理中断确认（SMIACT＃）输出的状态来确定处理器是否在SMM中运行。如果逻辑电路确定处理器在SMM中操作，则提供处理器对I / O映射寄存器的第一种无限制类型的访问。或者，如果逻辑电路确定处理器不在SMM中操作，则提供处理器对I / O映射寄存器的第二种限制类型的访问。如果向处理器提供第一种不受限制的访问类型，则在存储在专用系统管理存储器地址空间中的代码的方向上执行对I / O映射寄存器的内容的操作。

40. 发明申请

US20170091346A1 TECHNOLOGIES FOR PHYSICAL PROGRAMMING 审中-公开
公开(公告)号：US20170091346A1
公开(公告)日：2017-03-30
申请号：US14866897
申请日：2015-09-26
申请人： Glen J. Anderson , Kevin W. Bross , Shawn S. Mceuen , Mark R. Francis , Yevgeniy Y. Yarmosh , Blanka Vlasak , Gregory A. Peek , Therese E. Dugan , Cory A. Harris , Ravishankar Iyer , Omesh Tickoo , David I. Poisner
发明人： Glen J. Anderson , Kevin W. Bross , Shawn S. Mceuen , Mark R. Francis , Yevgeniy Y. Yarmosh , Blanka Vlasak , Gregory A. Peek , Therese E. Dugan , Cory A. Harris , Ravishankar Iyer , Omesh Tickoo , David I. Poisner
IPC分类号： G06F17/50
摘要： Technologies for physical programming include a model compute system to determine one or more physical blocks assembled in a constructed model. The model compute system determines rules associated with the one or more physical blocks in which at least one rule defines a behavior of the constructed model and determines a program stack for execution by the model compute system based on the rules associated with the one or more physical blocks.

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