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    • 35. 发明授权
    • Methods and apparatus for performing code correction for hybrid analog-to-digital converters in imaging devices
    • 用于对成像装置中的混合模数转换器执行代码校正的方法和装置
    • US08581761B1
    • 2013-11-12
    • US13650434
    • 2012-10-12
    • Ashirwad BahukhandiTaehee ChoJu-Hyung Kim
    • Ashirwad BahukhandiTaehee ChoJu-Hyung Kim
    • H03M1/06
    • H03M1/0863H03M1/145H03M1/466H03M1/56
    • Electronic devices may include image sensors having image sensor pixels. The pixels may be coupled to analog to digital converter (ADC) circuitry. The ADC may include a hybrid successive approximation register (SAR) ADC and ramp-compare ADC. The ramp-compare ADC may be controlled by count bits. The hybrid ADC may be subject to non-idealities at the transition between data conversion using the SAR ADC and the ramp-compare ADC. A voltage offset may be injected to the ramp-compare ADC to compensate for voltage glitches. The ramp-compare ADC may have an output range that is insufficiently matched to a least significant bit of the SAR ADC. An error correction bit may be added to the count bits to increase the output range of the ramp-compare ADC to match the SAR least significant bit. The ramp-compare ADC may include gain control circuitry to further match the output range to the SAR least significant bit.
    • 电子设备可以包括具有图像传感器像素的图像传感器。 像素可以耦合到模数转换器(ADC)电路。 ADC可以包括混合逐次逼近寄存器(SAR)ADC和斜坡比较ADC。 斜坡比较ADC可以通过计数位来控制。 在使用SAR ADC和斜坡比较ADC的数据转换之间的转换时,混合ADC可能会受到非理想性的影响。 电压偏移可以注入斜坡比较ADC以补偿电压毛刺。 斜坡比较ADC可能具有与SAR ADC的最低有效位不足匹配的输出范围。 可以向计数位添加纠错位,以增加斜坡比较ADC的输出范围以匹配SAR最低有效位。 斜坡比较ADC可以包括增益控制电路,以进一步将输出范围与SAR最低有效位匹配。
    • 36. 发明申请
    • NONVOLATILE MEMORY DEVICE AND FABRICATING METHOD THEREOF
    • 非易失性存储器件及其制造方法
    • US20130228849A1
    • 2013-09-05
    • US13775833
    • 2013-02-25
    • Ju-Hyung KimChang-Seok KangWoon-Kyung Lee
    • Ju-Hyung KimChang-Seok KangWoon-Kyung Lee
    • H01L29/792H01L29/66
    • H01L29/792H01L27/11582H01L29/4234H01L29/513H01L29/66833H01L29/7926
    • A nonvolatile memory device comprises a channel pattern, a first interlayer dielectric film and a second interlayer dielectric film spaced apart from each other and stacked over each other, a gate pattern disposed between the first interlayer dielectric film and the second interlayer dielectric film, a trap layer disposed between the gate pattern and the channel pattern and a charge spreading inhibition layer disposed between the channel pattern and the first interlayer dielectric film and between the channel pattern and the second interlayer dielectric film. The charge spreading inhibition layer may include charges inside or on its surface. The charge spreading inhibition layer includes at least one of a metal oxide film or a metal nitride film or a metal oxynitride film having a greater dielectric constant than a silicon oxide film.
    • 非易失性存储器件包括彼此间隔开并且彼此堆叠的沟道图案,第一层间电介质膜和第二层间电介质膜,布置在第一层间电介质膜和第二层间电介质膜之间的栅极图案,阱 设置在栅极图案和沟道图案之间的层,以及设置在沟道图案和第一层间电介质膜之间以及沟道图案和第二层间电介质膜之间的电荷扩展抑制层。 电荷扩散抑制层可以包括其表面内部或其表面上的电荷。 电荷扩散抑制层包括金属氧化物膜或金属氮化物膜或具有比氧化硅膜更大的介电常数的金属氧氮化物膜中的至少一种。
    • 38. 发明申请
    • Voltage-controlled oscillators with controlled operating range and related bias circuits and methods
    • 具有受控工作范围和相关偏置电路和方法的压控振荡器
    • US20060033591A1
    • 2006-02-16
    • US11198691
    • 2005-08-05
    • Woo-Seok KimJu-Hyung Kim
    • Woo-Seok KimJu-Hyung Kim
    • H03L7/099
    • H03L7/0995H03K3/0322H03K5/2472H03L1/022H03L7/099
    • A voltage-controlled oscillator includes a bias circuit and a delay circuit. The bias circuit may generate a bias voltage signal pair having levels that are based on the voltage level of an input voltage signal and that are constrained by the values of a maximum current signal and a minimum current signal that are generated in the bias circuit. The delay circuit generates an output signal having a frequency that varies in response to the bias voltage signal pair. Because an operating frequency range of a voltage-controlled oscillator VCO is limited by a bias circuit, the VCO can operate with reduced gain and can limit the maximum operating frequency to a predetermined level. The VCO may also include a PTAT current generator in the bias circuit which can allow the VCO to compensate for variations of the VCO output frequency based on temperature.
    • 压控振荡器包括偏置电路和延迟电路。 偏置电路可以产生具有基于输入电压信号的电压电平并且受偏置电路中产生的最大电流信号和最小电流信号的值约束的电平的偏置电压信号对。 延迟电路产生具有响应于偏置电压信号对而变化的频率的输出信号。 由于压控振荡器VCO的工作频率范围由偏置电路限制,所以VCO可以以减小的增益进行工作,并且可以将最大工作频率限制在预定的水平。 VCO还可以包括偏置电路中的PTAT电流发生器,其可以允许VCO基于温度补偿VCO输出频率的变化。
    • 40. 发明授权
    • Jelly-roll type battery unit and winding method thereof and lithium secondary battery comprising the same
    • 胶卷式电池单元及其卷绕方法以及包含该方法的锂二次电池
    • US09299970B2
    • 2016-03-29
    • US10748197
    • 2003-12-31
    • Chang-Seob KimJu-Hyung KimMin-Ho SongJung-Won Kang
    • Chang-Seob KimJu-Hyung KimMin-Ho SongJung-Won Kang
    • H01M4/70H01M2/26H01M10/052H01M10/0587
    • H01M2/263H01M4/70H01M10/052H01M10/0587Y02E60/122Y10T29/49108Y10T29/49114
    • A jelly-roll type battery unit, a winding method thereof and a lithium secondary battery comprising the battery unit include a first electrode plate having a first electrode current collector with a first electrode tab and a first electrode active material layer coated on at least one surface of the first electrode current collector, a second electrode plate having a second electrode current collector with a second electrode tab and a second electrode active material layer coated on at least one surface of the second electrode current collector, and a separator that is interposed between the first electrode plate and the second electrode plate, wherein the electrode tab is incorporated into the electrode current collector in an area of either the first or the second electrode plate where the corresponding electrode active material layer is not coated. Since an electrode tab is formed by cutting a portion of an electrode current collector and folding upward, deformation of a jelly-roll type battery unit is prevented.
    • 果冻卷型电池单元,其卷绕方法和包括该电池单元的锂二次电池包括具有第一电极集电器的第一电极板,第一电极集电器具有第一电极接线片和涂覆在至少一个表面上的第一电极活性材料层 的第二电极集电体,具有第二电极集电体的第二电极集电体,其具有第二电极接线片和涂覆在第二电极集电体的至少一个表面上的第二电极活性材料层,以及隔板, 第一电极板和第二电极板,其中,电极接线片在没有涂覆相应的电极活性物质层的第一或第二电极板的区域中结合到电极集电器中。 由于通过切割电极集电体的一部分并向上折叠来形成电极片,因此防止了胶卷型电池单元的变形。