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    • 31. 发明授权
    • Optical sensing apparatus for detecting linear displacement of an object
and method of operation thereof with detector matrix and centroid
detection
    • 用于检测物体的线性位移的光学感测装置及其检测器矩阵和质心检测的操作方法
    • US5212392A
    • 1993-05-18
    • US806507
    • 1991-12-13
    • Ertugrul BerkcanChung-Yih HoJerome J. TiemannFathy F. Yassa
    • Ertugrul BerkcanChung-Yih HoJerome J. TiemannFathy F. Yassa
    • G01D5/30
    • G01D5/30
    • Apparatus for sensing linear displacement of an object between first and second locations along an axis is used to sense conditions that can be made to vary displacement of an object in accordance with the condition, such as temperature, pressure and rotary motion. A light beam projected along an incident light path to the object is reflected along a reflective light path by a reflector affixed to the object. A photo-sensor array in the reflective light path intercepts the reflected light beam and produces samples of the intensity of the reflected image at multiple positions along a line across the array. An imager coupled to the array converts the light samples to representative electrical samples. The resultant light intensity information is provided to an electronic processor which determines a first centroid of the reflected image when the object is at a first location and a second centroid when the object is at a second location, and employs the difference between the first and second centroids to determine the displacement of the object.
    • 用于感测沿着轴线的第一和第二位置之间物体的线性位移的装置用于感测可以根据诸如温度,压力和旋转运动等条件改变物体的位移的条件。 沿着入射光路投射到物体的光束被反射光路通过固定在物体上的反射体反射。 反射光路中的光电传感器阵列截取反射光束,并沿着阵列的一条线的多个位置产生反射图像强度的样本。 耦合到阵列的成像器将光样本转换成代表性的电样品。 所得到的光强度信息被提供给电子处理器,该电子处理器当物体处于第一位置时确定反射图像的第一质心,并且当物体处于第二位置时确定第二质心,并且采用第一和第二 质心来确定物体的位移。
    • 32. 发明授权
    • Charge transfer multiplier and filter
    • 电荷转移倍增器和滤波器
    • US4584657A
    • 1986-04-22
    • US548067
    • 1983-11-02
    • Jerome J. TiemannThomas L. Vogelsong
    • Jerome J. TiemannThomas L. Vogelsong
    • G06J1/00H03H15/02
    • G06J1/00H03H15/02
    • The signal processing apparatus includes a plurality of multiplying or charge splitting stages connected in series. A plurality of pairs of control words are provided, one word of each pair being the complement of the other word of the pair. Each pair of words is associated with a respective multiplying stage and represents the multiplying coefficient of a respective multiplying stage. Means are provided for forming a plurality of quantities of charge, each representing a respective sample of an analog signal. Each of the quantities of charge is introduced in sequence into each of the multiplying stages in which it is processed and then passed on to the next multiplying stage. The process operation in each of the multiplying stages includes dividing the quantity of charge in a series of splitting operations under the control of the pair of words associated with the stage into two parts. All of the first parts of each of the quantities of charge in each of the stages is summed. All of the second part of each of the quantities of charge in each of the stages is summed. A signal is derived representing the difference of the two sums of charge. The two parts of each quantity of charge are combined and passed to the next multiplying stage.
    • 信号处理装置包括串联连接的多个乘法或电荷分束级。 提供多对控制字,每对中的一个字是该对中的另一个字的补码。 每对字与相应的乘法相关联,并且表示相应乘法级的乘法系数。 提供了用于形成多个电荷的装置,每个电荷表示模拟信号的相应样本。 每个电荷量依次被引入到其处理的每个乘法级中,然后传递到下一个乘法级。 每个乘法级中的处理操作包括在与该级相关联的一对字的控制下的一系列分割操作中的电荷量分成两部分。 每个阶段的每个费用量的所有第一部分相加。 将每个阶段的每个费用的第二部分的所有部分相加。 得到的信号是表示两个电荷之和的差值。 将每个电荷量的两个部分组合并传递到下一个乘法阶段。
    • 33. 发明授权
    • System for encoding and decoding video signals
    • 视频信号编码和解码系统
    • US4533936A
    • 1985-08-06
    • US479584
    • 1983-03-28
    • Jerome J. TiemannWilliam E. Engeler
    • Jerome J. TiemannWilliam E. Engeler
    • H04N7/08H04N7/16H04N11/02H04N19/00H04N9/32
    • H04N11/02H04N7/0806
    • A first video signal is provided comprising a plurality of lines of a luminance signal, a first color signal and a second color signal, each of the lines having a duration of a first predetermined time. Each of the nonoverlapping pairs of successive lines of the luminance signal are summed and differenced to provide a luminance sum signal and a luminance difference signal. Each of the nonoverlapping pairs of successive lines of the first color signal and also of the second color signal are summed to provide a first color sum signal and a second color sum signal. The luminance difference signal, the first color sum signal and the second color sum signal are bandwidth limited in relation to the luminance sum signal. Corresponding lines of these signals are time compressed to the same bandwidth and then time multiplexed to form a corresponding line of a first compound signal, each line of which has a duration of the aforementioned predetermined time, and alternate lines of which have zero amplitude. A second video signal is similarly processed to provide a second compound signal. The first and second compound signals are interleaved to form a third compound signal such that the time of the non-zero amplitude of the second compound signal occupies the time when the first compound signal has zero amplitude. A carrier is modulated in amplitude by the third compound signal for transmission to a receiving station. The bandwidth of the modulated carrier is comparable to the bandwidth of a carrier that is amplitude modulated by one of the video signals. The carrier is demodulated at the receiving station to recover the third compound signal. The first or second compound signal is recovered from the third compound signal. Inverse operations are utilized to recover the first or second video signals.
    • 提供第一视频信号,其包括亮度信号,第一颜色信号和第二颜色信号的多行,每条线具有第一预定时间的持续时间。 亮度信号的每个不重叠的连续对的对被相加和差分以提供亮度和信号和亮度差信号。 第一颜色信号和第二颜色信号的连续行的非重叠对中的每一个被相加以提供第一颜色和信号和第二颜色和信号。 亮度差信号,第一颜色和信号和第二颜色和信号相对于亮度和信号被带宽限制。 这些信号的相应行被时间压缩到相同的带宽,然后进行时间复用,以形成第一复合信号的相应行,其中每条线具有上述预定时间的持续时间,并且其交替线具有零幅值。 类似地处理第二视频信号以提供第二复合信号。 第一和第二复合信号被交织以形成第三复合信号,使得第二复合信号的非零幅度的时间占据第一复合信号具有零幅度的时间。 通过第三复合信号以幅度调制载波以传输到接收站。 调制载波的带宽与由视频信号之一幅度调制的载波的带宽相当。 载波在接收站解调,以恢复第三复合信号。 从第三复合信号中恢复第一或第二复合信号。 利用反向操作来恢复第一或第二视频信号。
    • 34. 发明授权
    • Recursive charge transfer filter with a transmission zero at zero
frequency
    • US4321481A
    • 1982-03-23
    • US153712
    • 1980-05-27
    • Jerome J. Tiemann
    • Jerome J. Tiemann
    • G11C19/28H01L27/105H03H15/02H01L29/78
    • G11C19/282H01L27/1057H03H15/02
    • A filter utilizing charge transfer devices for providing recursive transfer functions with a transmission zero at d.c. or zero frequency is described. The filter includes a circular charge transfer shift register having an even number N of stages, greater than two, and first, second, third and fourth linear charge transfer shift registers. All five shift registers are clocked at the same frequency. A first input sequence of packets of charge representing positive weight components of a signal, and a second sequence of packets of charge representing negative weight components of the signal are provided. Means are provided for dividing each of the packets of charge of the first input sequence into a first part and a second part and for applying each of the first parts of the packets of the first input sequence to the input stage of the first shift register and for applying each of the second parts of the packets of the first input sequence to the input stage of the second shift register. The charge packet in the first charge storage cell in the K.sup.th stage of the first shift register is combined with the charge packet in the first charge storage cell of the N.sup.th stage of the circular shift register. The combined packet of charge is divided into two portions, a first portion being stored in the first charge storage cell of the K.sup.th stage of the first shift register from which it is clocked out and sensed and a second portion being stored in the first charge storage cell of the N.sup.th stage of the circular shift register. The charge packet in the first charge storage cell of the L.sup.th stage of the second shift register is combined with the charge packet in the M.sup.th stage of the circular shift register, where M is an integer less than N/2 and L=K+M.Means are provided for dividing each of the packets of charge of the second input sequence into a first part and a second part and for applying each of the first parts of the packets of the second input sequence to the input stage of the third shift register and for applying each of the second parts of the packets of the second input sequence to the input stage of the fourth shift register. The charge packet in the first charge storage cell in the K.sup.th stage of the third shift register is combined with the charge packet in the first charge storage cell of the (N/2).sup.th stage of the circular shift register. The combined packet of charge is divided into two portions, a first portion being stored in the first charge storage cell of the K.sup.th stage of the third shift register from which it is clocked out and sensed and a second portion being stored in the first charge storage cell of the (N/2).sup.th stage of the circular shift register. The charge packet in the first charge storage cell of the L.sup.th stage of the fourth shift register is combined with the charge packet in the (N/2+M).sup.th stage of the circular shift register.A first output sequence of packets of charge representing the positive components of an output signal is obtained at the output of the first shift register. A second output sequence of packets of charge representing the negative components of the output signal is obtained at the output of the second shift register. The output signal is obtained by differentially summing corresponding charge packets in the first and second output sequences.
    • 35. 发明授权
    • Charge domain filter with a plurality of transmission zeros
    • 带有多个传输零点的电荷域滤波器
    • US4284909A
    • 1981-08-18
    • US153702
    • 1980-05-27
    • Jerome J. Tiemann
    • Jerome J. Tiemann
    • H01L27/105H03H15/02G11C19/28H01L29/78
    • H01L27/1057H03H15/02
    • A filter is described utilizing charge transfer devices for implementing transmission zeros. A first shift register is provided having a plurality of M stages, where M is an integer, each stage including a respective first charge storage region. A second shift register is provided having a plurality of N stages where N is an integer greater than M, each stage including a respective first charge storage region. A first sequence of packets of charge is provided, each packet representing a respective sample of an input signal. Each of the packets of charge of the sequence is divided into a first part and a second part equal to the first part. Each of the first parts of the packets of the first sequence is applied to the first shift register and transferred from stage to stage thereof at one frequency. Each of the second parts of the packets of the first sequence is applied to the second shift register and transferred from stage to stage thereof at the aforementioned one frequency. The product of the difference of the integers N and M and a predetermined frequency of the input signal for which zero transmission is desired is set equal to an odd integer multiple of one-half of the aforementioned one frequency.
    • 使用用于实现传输零的电荷转移装置来描述滤波器。 提供具有多个M级的第一移位寄存器,其中M是整数,每级包括相应的第一电荷存储区域。 提供具有多个N级的第二移位寄存器,其中N是大于M的整数,每级包括相应的第一电荷存储区域。 提供了一组电荷的第一序列,每个分组表示输入信号的相应样本。 序列的每个电荷包被分成与第一部分相等的第一部分和第二部分。 第一序列的分组的第一部分中的每一个被施加到第一移位寄存器,并且以一个频率从阶段传送到其它阶段。 第一序列的分组的第二部分中的每一个被施加到第二移位寄存器,并以上述一个频率从一个阶段传送到另一个。 将整数N和M的差异与期望零发送的输入信号的预定频率的乘积设置为等于上述一个频率的二分之一的奇整数倍。
    • 37. 发明授权
    • Charge transfer signal processing apparatus transversal filter
    • 电荷转移信号处理装置横向滤波器
    • US4259598A
    • 1981-03-31
    • US105756
    • 1979-12-20
    • Jerome J. TiemannWilliam E. Engeler
    • Jerome J. TiemannWilliam E. Engeler
    • G11C19/28G11C27/04H01L29/768H03H15/02H01L29/78
    • H01L29/76875G11C19/285G11C27/04H01L29/76808H03H15/02
    • A sampled data transversal filter utilizing charge transfer devices is described. The filter includes a charge transfer shift register including a plurality of stages to which a sequence of packets of charge representing samples of a signal is serially applied and clocked from stage to stage. Charge division and collection means are provided at the various stages of the shift register to divide and collect the fractions of charge appearing in the various stages thereof. These fractions represent the weighting coefficients of the various stages of the shift register. The charge collection means of the various stages are connected together to provide an output representing the sum of the charges collected at the various stages. The output sequence of packets of charge obtained represent the convolution of the input sequence of packets with the weighting coefficients of the various stages of the shift register.
    • 描述了利用电荷转移装置的采样数据横向滤波器。 滤波器包括电荷转移移位寄存器,该电荷转移移位寄存器包括多个阶段,表示一个信号样本的电荷分组序列被顺序地施加到该阶段并且从一个阶段到另一阶段计时。 在移位寄存器的各个阶段提供充电分配和收集装置,以分割和收集其各阶段出现的电荷分数。 这些分数表示移位寄存器的各个级的加权系数。 各级的电荷收集装置连接在一起以提供表示在各个阶段收集的电荷之和的输出。 获得的电荷包的输出序列表示输入的分组序列与移位寄存器的各个级的加权系数的卷积。
    • 38. 发明授权
    • Charge storage memory with isolation nodal for each bit line
    • 充电存储器,每个位线具有隔离节点
    • US4185318A
    • 1980-01-22
    • US915784
    • 1978-06-15
    • William E. EngelerJerome J. TiemannRichard D. Baertsch
    • William E. EngelerJerome J. TiemannRichard D. Baertsch
    • G11C11/35G11C11/34G11C7/00
    • G11C11/35
    • A conductor-insulator-semiconductor (CIS) structure for a random access surface charge memory system is disclosed. The memory system comprises an array of memory cells including charge storage regions, charge transfer regions and charge receive-source regions formed along the surface-adjacent portions of a semiconductor substrate. A charge-storage line insulatingly overlies the storage regions of a row of memory cells and a bit line, comprising an extended region of opposite-conductivity-type, interconnects the receive-source regions of the same memory cells. Addressing in the Y-direction (word selection) is provided by charge transfer lines insulatingly overlying the charge transfer regions of a column of memory cells. Selected memory cells are addressed for read and write purposes by first activating the word select line which makes available one cell in each row of the memory. The desired row is then selected by means external to the array of memory cells. All cells of the selected word line are refreshed, but only one cell is addressed for read and write purposes. Means for reading, writing and refreshing data in the memory system are also disclosed.
    • 公开了一种用于随机存取面电荷存储器系统的导体 - 绝缘体半导体(CIS)结构。 存储器系统包括存储单元的阵列,包括沿着半导体衬底的表面相邻部分形成的电荷存储区域,电荷转移区域和电荷接收源区域。 电荷存储线绝缘地覆盖在存储单元行的存储区域和包括相反导电类型的扩展区域的位线,互连相同存储单元的接收源区域。 Y方向的寻址(字选择)由绝缘地覆盖存储单元列的电荷转移区域的电荷传输线提供。 所选择的存储单元通过首先激活字选择线来寻址以用于读和写目的,这使得在存储器的每一行中可用一个单元。 然后通过外部存储器单元阵列的方式选择所需的行。 所选字线的所有单元格被刷新,但仅读取和写入一个单元格。 还公开了用于在存储器系统中读取,写入和刷新数据的装置。
    • 39. 发明授权
    • Charge-coupled multiplying digital-to-analog converter
    • 电荷耦合倍增数模转换器
    • US4161783A
    • 1979-07-17
    • US892580
    • 1978-04-03
    • Edwin H. Wrench, Jr.Jerome J. Tiemann
    • Edwin H. Wrench, Jr.Jerome J. Tiemann
    • G06J1/00H03M1/00H03K13/02
    • G06J1/00H03M1/802
    • A charge-coupled device (CCD) multiplying digital-to-analog converter mullies a bipolar analog signal, representing as a charge, by a digital word, and produces a four-quadrant analog product, also represented as a charge. An analog signal S is added to or subtracted from a bias, resulting in signals S+B and -S+B, which are converted into corresponding positive charges, Q.sub.S +Q.sub.B and -Q.sub.S +Q.sub.B, which are transferred into potential wells at X.sub.i and Y.sub.i, respectively. A digital word may be represented as b.sub.1 b.sub.2 b.sub.3 . . .b.sub.N, where N is the word length. The CCD converter comprises N parallel devices, each of which performs the function of multiplying the signal S by either 0 or 1/2.sup.i. A gate between X.sub.i and Y.sub.i is controlled by the binary bit b.sub.i. Equilibration occurs or does not occur depending on whether b.sub.i equals 0= or 1. The charges left in X.sub.i and Y.sub.i are then transferred to two other potential wells, which have channel stops diffused into them. The charges in the outer portions in each well are dumped to ground, while the remaining charges in each of the N devices are summed in a common potential well, to form a product as a sum of terms.
    • 乘法数模转换器的电荷耦合器件(CCD)将表示为电荷的双极模拟信号乘以数字字,并产生也表示为电荷的四象限模拟产品。 模拟信号S被加到或从偏置中减去,产生信号S + B和-S + B,它们被转换成相应的正电荷QS + QB和-QS + QB,它们被传送到Xi的势阱 和毅。 数字字可以表示为b1b2b3。 。 .bN,其中N是字长。 CCD转换器包括N个并行装置,每个并行装置执行将信号S乘以0或1 / 2i的功能。 Xi和Yi之间的门由二进制位bi控制。 取决于bi等于0 =或1,发生或不发生平衡。然后将Xi和Yi中剩余的电荷转移到其他扩散到其中的通道停止的另外两个潜在的井。 每个井的外部部分的电荷被倾倒到地面,而N个装置中的每一个中的剩余电荷被合并在共同的潜在井中,以形成一个项的和。