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31. 发明授权

US08227308B2 Method of fabricating semiconductor integrated circuit device 有权
标题翻译：制造半导体集成电路器件的方法
公开(公告)号：US08227308B2
公开(公告)日：2012-07-24
申请号：US12647806
申请日：2009-12-28
申请人： Ha-Jin Lim , Dong-Suk Shin , Pan-Kwi Park , Jun-Jung Kim , Tae-Gyun Kim
发明人： Ha-Jin Lim , Dong-Suk Shin , Pan-Kwi Park , Jun-Jung Kim , Tae-Gyun Kim
IPC分类号： H01L21/8238
CPC分类号： H01L21/28518 , H01L29/665 , H01L29/78 , H01L29/7843
摘要： A method of fabricating a semiconductor integrated circuit (IC) device can include forming a first silicide layer on at least a portion of a transistor on a substrate, forming nitrogen in the first silicide layer to form a second silicide layer, forming a first stress layer having a tensile stress on the substrate having the transistor formed thereon, and irradiating the first stress layer with ultraviolet (UV) light to form a second stress layer having greater tensile stress than the first stress layer.
摘要翻译：制造半导体集成电路（IC）器件的方法可以包括在衬底上的晶体管的至少一部分上形成第一硅化物层，在第一硅化物层中形成氮以形成第二硅化物层，形成第一应力层在其上形成有晶体管的衬底上具有拉伸应力，并且用紫外线（UV）光照射第一应力层以形成具有比第一应力层更大的拉伸应力的第二应力层。

32. 发明申请

US20110306184A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20110306184A1
公开(公告)日：2011-12-15
申请号：US13093097
申请日：2011-04-25
申请人： Jin-Ho Do , Ha-Jin Lim , Weon-Hong Kim , Hoi-Sung Chung , Moon-Kyun Song , Dae-Kwon Joo
发明人： Jin-Ho Do , Ha-Jin Lim , Weon-Hong Kim , Hoi-Sung Chung , Moon-Kyun Song , Dae-Kwon Joo
IPC分类号： H01L21/20
CPC分类号： H01L21/02236 , H01L21/02164 , H01L21/022 , H01L21/02238 , H01L21/02271 , H01L21/02532 , H01L21/28194 , H01L21/28211 , H01L29/51 , H01L29/513
摘要： A method of fabricating a semiconductor device includes: forming an epitaxial layer on a semiconductor substrate; forming a capping layer having a first thickness on the epitaxial layer; and oxidizing the capping layer in an oxygen atmosphere to form a first gate dielectric layer having a second thickness.
摘要翻译：制造半导体器件的方法包括：在半导体衬底上形成外延层; 在所述外延层上形成具有第一厚度的覆盖层; 以及在氧气氛中氧化所述覆盖层以形成具有第二厚度的第一栅极介电层。

33. 发明授权

US07648874B2 Method of forming a dielectric structure having a high dielectric constant and method of manufacturing a semiconductor device having the dielectric structure 有权
标题翻译：具有高介电常数的介电结构的形成方法和具有电介质结构的半导体器件的制造方法
公开(公告)号：US07648874B2
公开(公告)日：2010-01-19
申请号：US11339416
申请日：2006-01-25
申请人： Jong-Cheol Lee , Sung-Tae Kim , Young-Sun Kim , Cha-Young Yoo , Gab-Jin Nam , Young-Geun Park , Jae-Hyoung Choi , Jae-Hyun Yeo , Ha-Jin Lim , Yun-Seok Kim
发明人： Jong-Cheol Lee , Sung-Tae Kim , Young-Sun Kim , Cha-Young Yoo , Gab-Jin Nam , Young-Geun Park , Jae-Hyoung Choi , Jae-Hyun Yeo , Ha-Jin Lim , Yun-Seok Kim
IPC分类号： H01L21/00
CPC分类号： H01L21/022 , C23C14/5826 , C23C14/586 , C23C16/56 , H01L21/02142 , H01L21/02252 , H01L21/28273 , H01L21/3141 , H01L21/3143 , H01L21/31645 , H01L27/10852 , H01L27/10873 , H01L27/115 , H01L27/11521 , H01L28/40 , H01L29/513 , H01L29/517 , H01L29/78
摘要： In a method of manufacturing a dielectric structure, after a first dielectric layer is formed on a substrate by using a metal oxide doped with silicon, the substrate is placed on a susceptor of a chamber. By treating the first dielectric layer with a plasma in controlling a voltage difference between the susceptor and a ground, a second dielectric layer is formed on the first dielectric layer. The second dielectric layer including a metal oxynitride doped with silicon having enough content of nitrogen is formed on the first dielectric layer. Therefore, dielectric properties of the dielectric structure comprising the first and the second dielectric layers can be improved and a leakage current can be greatly decreased. By adapting the dielectric structure to a gate insulation layer and/or to a dielectric layer of a capacitor or of a non-volatile semiconductor memory device, capacitances and electrical properties can be improved.
摘要翻译：在制造电介质结构的方法中，在通过使用掺杂有硅的金属氧化物在基板上形成第一介电层之后，将基板放置在室的基座上。通过在控制基座和接地之间的电压差的同时用等离子体处理第一电介质层，在第一电介质层上形成第二电介质层。在第一电介质层上形成包括掺杂有足够的氮含量的硅的金属氮氧化物的第二电介质层。因此，可以提高包括第一和第二电介质层的电介质结构的介电性能，并且可以大大降低泄漏电流。通过使电介质结构适应于栅极绝缘层和/或电容器或非易失性半导体存储器件的电介质层，可以提高电容和电性能。

34. 发明授权

US08951853B1 Method of forming semiconductor device using Si-H rich silicon nitride layer 有权
标题翻译：使用富Si硅氮化物层形成半导体器件的方法
公开(公告)号：US08951853B1
公开(公告)日：2015-02-10
申请号：US12659474
申请日：2010-03-10
申请人： Pan-Kwi Park , Dong-Suk Shin , Yong-Kuk Jeong , Dong-Hyun Roh , Ha-Jin Lim
发明人： Pan-Kwi Park , Dong-Suk Shin , Yong-Kuk Jeong , Dong-Hyun Roh , Ha-Jin Lim
IPC分类号： H01L21/8238
CPC分类号： H01L21/823807 , H01L29/6656 , H01L29/6659 , H01L29/7843 , H01L29/7847
摘要： A method of forming a semiconductor device includes forming a gate electrode and source/drain regions in a semiconductor substrate, forming a first capping nitride layer covering the gate electrode and the source/drain regions, the first capping nitride layer including a Si—H rich SiN layer, annealing the semiconductor substrate having the first capping nitride layer, and removing the first capping nitride layer.
摘要翻译：形成半导体器件的方法包括在半导体衬底中形成栅电极和源/漏区，形成覆盖栅电极和源/漏区的第一覆盖氮化物层，第一覆盖氮化物层包括富Si-H SiN层，退火具有第一覆盖氮化物层的半导体衬底，以及去除第一覆盖氮化物层。

35. 发明授权

US08502286B2 Etch stop layers and methods of forming the same 有权
标题翻译：蚀刻停止层及其形成方法
公开(公告)号：US08502286B2
公开(公告)日：2013-08-06
申请号：US12841245
申请日：2010-07-22
申请人： Ha-Jin Lim , Dong-Suk Shin , Pan-Kwi Park
发明人： Ha-Jin Lim , Dong-Suk Shin , Pan-Kwi Park
IPC分类号： H01L29/76
CPC分类号： H01L29/76 , H01L21/823807 , H01L27/092 , H01L29/7843
摘要： A semiconductor device includes a MOSFET, and a plurality of stress layers disposed on the MOSFET, wherein the stress layers include a first stress layer disposed on the MOSFET and a second stress layer disposed on the first stress layer, the first stress layer has a first stress and the second stress layer has a second stress, and the first stress is different from the second stress.
摘要翻译：半导体器件包括MOSFET和设置在MOSFET上的多个应力层，其中应力层包括设置在MOSFET上的第一应力层和设置在第一应力层上的第二应力层，第一应力层具有第一应力层应力和第二应力层具有第二应力，并且第一应力不同于第二应力。

36. 发明授权

US08476155B1 Formation of a high-K crystalline dielectric composition 有权
标题翻译：形成高K结晶介电组合物
公开(公告)号：US08476155B1
公开(公告)日：2013-07-02
申请号：US12835790
申请日：2010-07-14
申请人： Ha-Jin Lim , Weon-Hong Kim
发明人： Ha-Jin Lim , Weon-Hong Kim
IPC分类号： H01L21/20
CPC分类号： H01L21/02181 , H01L21/02148 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/28273 , H01L21/3105 , H01L28/40 , H01L29/513 , H01L29/517 , H01L29/518
摘要： Provided are a method of forming a dielectric and a method of fabricating a semiconductor device. The method includes forming a preliminary dielectric including Hf, O and an “A” element on an underlying layer. The preliminary dielectric is formed in an amorphous structure or a mixed structure of an amorphous structure and an “M” crystalline structure. The “A” element about 1 at % to about 5 at % of the total content of the “A” element and Hf in the preliminary dielectric. Through a nitridation process, nitrogen is added to the preliminary dielectric. The nitrogen-containing dielectric is changed into a dielectric having a “T” crystalline structure through a phase transition process, wherein the “T” crystalline structure is different from the “M” crystalline structure. An upper layer is formed on the “T” crystalline dielectric.
摘要翻译：提供形成电介质的方法和制造半导体器件的方法。该方法包括在下层上形成包含Hf，O和“A”元素的预备电介质。预置电介质形成为非晶结构或非晶结构和“M”晶体结构的混合结构。 “A”元素在“A”元素的总含量和预置电介质中的Hf的约1at％至约5at％的“A”元素。通过氮化处理，将氮气加入到初步电介质中。通过相变过程将含氮电介质变成具有“T”晶体结构的电介质，其中“T”晶体结构不同于“M”晶体结构。在“T”晶体电介质上形成上层。

37. 发明申请

US20060166476A1 Method of forming a dielectric structure having a high dielectric constant and method of manufacturing a semiconductor device having the dielectric structure 有权
标题翻译：具有高介电常数的介电结构的形成方法和具有电介质结构的半导体器件的制造方法
公开(公告)号：US20060166476A1
公开(公告)日：2006-07-27
申请号：US11339416
申请日：2006-01-25
申请人： Jong-Cheol Lee , Sung-Tae Kim , Young-Sun Kim , Cha-Young Yoo , Gab-Jin Nam , Young-Geun Park , Jae-Hyoung Choi , Jae-Hyun Yeo , Ha-Jin Lim , Yun-Seok Kim
发明人： Jong-Cheol Lee , Sung-Tae Kim , Young-Sun Kim , Cha-Young Yoo , Gab-Jin Nam , Young-Geun Park , Jae-Hyoung Choi , Jae-Hyun Yeo , Ha-Jin Lim , Yun-Seok Kim
IPC分类号： H01L21/471
CPC分类号： H01L21/022 , C23C14/5826 , C23C14/586 , C23C16/56 , H01L21/02142 , H01L21/02252 , H01L21/28273 , H01L21/3141 , H01L21/3143 , H01L21/31645 , H01L27/10852 , H01L27/10873 , H01L27/115 , H01L27/11521 , H01L28/40 , H01L29/513 , H01L29/517 , H01L29/78
摘要： In a method of manufacturing a dielectric structure, after a first dielectric layer is formed on a substrate by using a metal oxide doped with silicon, the substrate is placed on a susceptor of a chamber. By treating the first dielectric layer with a plasma in controlling a voltage difference between the susceptor and a ground, a second dielectric layer is formed on the first dielectric layer. The second dielectric layer including a metal oxynitride doped with silicon having enough content of nitrogen is formed on the first dielectric layer. Therefore, dielectric properties of the dielectric structure comprising the first and the second dielectric layers can be improved and a leakage current can be greatly decreased. By adapting the dielectric structure to a gate insulation layer and/or to a dielectric layer of a capacitor or of a non-volatile semiconductor memory device, capacitances and electrical properties can be improved.
摘要翻译：在制造电介质结构的方法中，在通过使用掺杂有硅的金属氧化物在基板上形成第一介电层之后，将基板放置在室的基座上。通过在控制基座和接地之间的电压差的同时用等离子体处理第一电介质层，在第一电介质层上形成第二电介质层。在第一电介质层上形成包括掺杂有足够的氮含量的硅的金属氮氧化物的第二电介质层。因此，可以提高包括第一和第二电介质层的电介质结构的介电性能，并且可以大大降低泄漏电流。通过使电介质结构适应于栅极绝缘层和/或电容器或非易失性半导体存储器件的电介质层，可以提高电容和电性能。

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