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31. 发明专利

JPS61111994A Cvd device 失效
标题翻译： CVD装置
公开(公告)号：JPS61111994A
公开(公告)日：1986-05-30
申请号：JP24384385
申请日：1985-11-01
申请人： Hitachi Ltd
发明人： TAKAHASHI RYOKICHI , KOGIRIMA MASAHIKO , TOCHIKUBO HIROO , KANAI AKIRA
IPC分类号： C30B25/14 , H01L21/205
CPC分类号： C30B25/14
摘要： PURPOSE:To prevent reverse diffusion of an impurity gas of an exhaust system, and not to make lessen exhaust conductance, by setting a constriction ring having a smaller constriction diameter than the diameter of an exhaust pipe in the vicinity of the outlet of a reaction tube. CONSTITUTION:The quartz reaction tube 2 is set in the electrical resistance type furnace 1. After the furnace is evacuated, the jig 4 is transferred to a given temperature distribution zone at the central part of the furnace 1 by the magnet boat loader 6 while circulating H2 through the gas piping 7. A low-temperature precipitate is much attached to the exhaust pipe 9, a contaminating gas such as HCl, etc. is permeated into the interior of the reaction tube 2 by reverse diffusion, and the substrate 5 is most liable to corrode when it is set in a high-temperature part. Consequently, the surface of the substrate 5 is made rough and loses mirror surface properties before an epitaxial reaction occurs. Crystallixability is also damaged by reverse diffusion of various impurity gases. In order to prevent these reverse diffusion phenomena, a constriction ring having a smaller constriction diameter than the diameter of the exhaust pipe 9 or the outlet branch pipe 12 of the reaction tube 2.
摘要翻译：目的：为了防止排气系统的杂质气体的反向扩散，并且不减少排气传导，通过设置具有比反应管出口附近的排气管的直径更小的收缩直径的收缩环。构成：将石英反应管2设置在电阻型炉1中。在炉子抽真空之后，将夹具4通过磁铁装载器6转移到炉1的中心部分的给定温度分布区，同时循环 H2通过气体管道7.低温沉淀物大量附着在排气管9上，诸如HCl等的污染气体通过反向扩散渗透到反应管2的内部，并且基板5最多当被置于高温部分时容易腐蚀。因此，在发生外延反应之前，使基板5的表面粗糙并失去镜面特性。结晶性也受各种杂质气体反向扩散的破坏。为了防止这些反向扩散现象，具有比反应管2的排气管9或出口支管12的直径更小的收缩直径的收缩环。

32. 发明专利

JPS6058614A VAPOR GROWTH APPARATUS 失效
公开(公告)号：JPS6058614A
公开(公告)日：1985-04-04
申请号：JP16662983
申请日：1983-09-12
申请人： HITACHI LTD
发明人： TOCHIKUBO HIROO , KANAI AKIRA
IPC分类号： H01L21/205 , H01L21/31
摘要： PURPOSE:To uniformly form film thickness distribution and also increase processing capability by partly providing inclined injection ports in a gas supply tube which is provided passing through the center of pedestal for placing an object to be processed and has a plurality of gas injection ports around the surface thereof. CONSTITUTION:A reaction container 4 is formed in such a manner that a bell- jar 3 is removably and tightly provided to a pedestal 1 made of quartz through an O-ring 2. A hollow gas supply tube 6 being provided with a cap 5 at the upper end thereof is disposed at the center of pedestal 1. The supply tube 6 is provided with a pluralty of nozzles 7 in the plural stages at the circumference thereof and injects from the nozzles 7 the processing gas 8 pressurizingly supplied. The nozzles 7 are disposed concentrically in each stage with an interval of 90 deg.. Each nozzle of those diposed in the upper and lower stages is provided so that it injects the gas 8 horizontally and the nozzles 7 of lower two stages are disposed with inclination of alpha, beta (beta>alpha) so that the gas 8 is injected obliquely to the downward. Thereby, uniform thickness distribution can be formed on the wafer 12 placed on the susceptor 11 and the processing capability can also be improved.

33. 发明专利

JPS58158919A MASK POSITIONING METHOD 失效
公开(公告)号：JPS58158919A
公开(公告)日：1983-09-21
申请号：JP4080182
申请日：1982-03-17
申请人： HITACHI LTD
发明人： KANAI AKIRA , TOCHIKUBO HIROO
IPC分类号： G03F9/00 , H01L21/027 , H01L21/30 , H01L21/68
摘要： PURPOSE:To improve the accuracy of mask positioning to a buried diffusion layer significantly, by a method wherein reflection image of the diffusion layer obtained by projecting infrared ray to the surface of an epitaxial layer is made reference for the mask positioning. CONSTITUTION:An epitaxial layer 4 is formed on a semiconductor substrate 1. In order to detect the position of a buried diffusion layer 2 between the substrate 1 and the epitaxial layer 4, a reflection image 7 of the diffusion layer 2 obtained by projecting infrared ray to the layer 4 is made reference for mask positioning. According to the positioning method, the layer 2 is recognized directly even if there is slackness or misalignment thereby the mask positioning accuracy to the layer 2 can be significantly improved. Therefore isolation failure caused by slackness or misalignment is eliminated and further miniaturization of bipolar IC is possible.

34. 发明专利

JPS56168072A STEAM DRYING METHOD AND APPARATUS 失效
公开(公告)号：JPS56168072A
公开(公告)日：1981-12-24
申请号：JP7139780
申请日：1980-05-30
申请人： HITACHI LTD
发明人： KANAI AKIRA , TOCHIKUBO HIROO
IPC分类号： F26B21/14 , F26B3/00 , H01L21/304

35. 发明专利

JPS56145198A FORMING METHOD OF SINGLE CRYSTAL SILICON MEMBRANE AND DEVICE THEREFOR 失效
公开(公告)号：JPS56145198A
公开(公告)日：1981-11-11
申请号：JP4357780
申请日：1980-04-04
申请人： HITACHI LTD
发明人： TOCHIKUBO HIROO , KANAI AKIRA
IPC分类号： C30B1/02 , C30B29/06 , H01L21/20
摘要： PURPOSE:Polycrystals are made to grow on a base plate and simultaneously laser beams or electron beams are irradiated on the polycrystals to convert them into a single crystal, thus forming a large-size single crystal silicon film with a film thickness on the base plate kept in the reactor. CONSTITUTION:A base plate, or wafer W, is placed on the hot plate 7 in the reactor 1 and made to rotate. A nitrogen gas is introduced from pipe 2 to effect purge using pipe 4. After thorought purge, the wafer W is heated with the heating means 8 and an SiH4 gas is introduced through pipe 3 into the reactor. At the same time, e.g., the wafer is irradiated with laser beams projected from the laser emitter 9 on the surface. The laser uniformly irradiated the surface of wafer W by the synchronous motions of the vibrating mirro 10 and the heating plate 7. Accordingly, polycrystals grows on the surface of the wafer W by the CVD method, meanwhile the laser beams anneals the polycrystal silicon to convert it into a single crystal, whereby a single crystal silicon membrane is formed on the surface of the wafer W.

36. 发明专利

JPS55121995A PREPARATION OF SINGLE CRYSTAL 失效
公开(公告)号：JPS55121995A
公开(公告)日：1980-09-19
申请号：JP3002479
申请日：1979-03-16
申请人： HITACHI LTD
发明人： KANAI AKIRA , AOSHIMA TAKAAKI , KASE YUUSHI
IPC分类号： C30B15/26 , C30B15/20 , H01L21/02 , H01L21/208
摘要： PURPOSE:To enhance reproducibility, reliability and production yield by starting the pulling up of a single crystal at the point of detecting regular turbulance of high temperature heated section generated around seed crystal dipped in molten liquid. CONSTITUTION:When a crystal starts growing at the lower end of seed crystal 14, latent heat generated at solidification produces high temperature heated section 15 surrounding the seed crystal 14. After checking this high temperature section 15, its outer peripheral is monitored by infrared sensor 13. Soon, crystal habit line appears. The number of crystal habit lines differs depending on the direction of crystal axis formed. So, check that the crystal habit lines appear regularly each turn of the seed crystal 14. The information of this regular appearance is transmitted to recorder 18 and the central processor unit (CPU)17. The CPU17 receives the information and makes judgement using stored information to start pulling up single crystal.

37. 发明专利

JPS5443463A FORMATION METHOD OF EPITAXIAL LAYER 失效
公开(公告)号：JPS5443463A
公开(公告)日：1979-04-06
申请号：JP10884577
申请日：1977-09-12
申请人： HITACHI LTD
发明人： YASUDA SADAO , KANAI AKIRA
IPC分类号： C30B25/02 , H01L21/205
摘要： PURPOSE:To form an epitaxial layer containing the density and distribution of the impurity which are controlled in a high accuracy with no affection of the self-addition phenomenon. CONSTITUTION:The Si substrate put into the reaction tube is heated up about 10 minutes to 1,100 deg.C in the H2 air current. Thus, the H2 current amount is reduce, and the impurity diffused outside the substrate or the harmful impurity within the reaction tube is exhausted via the vacuum pump. Thus, no vapor-phase stay area of the impurity is caused near the substrate, and the self-addition phenomenon is avoided. Then the reaction gas is flown to form an epitaxial layer, and the reaction gas is purged off to cool the reaction tube down. With this method, no limit is given to the selection of the reaction terms when the epitaxial growth is carried out under various modes, thus ensuring formation of an excellent epitaxial layer.

38. 发明专利

JPS5352356A DEPOSITION PREVENTION METHOD IN HOT WALL TYPE REACTION FURNACE 失效
公开(公告)号：JPS5352356A
公开(公告)日：1978-05-12
申请号：JP12722276
申请日：1976-10-25
申请人： HITACHI LTD
发明人： KANAI AKIRA , TOCHIKUBO HIROO
IPC分类号： C30B25/02 , H01L21/205 , H01L21/302
摘要： PURPOSE:Deposition of the materials being deposited on hot walls is prevented by flowing the laminar flow of an etch gas along the hot walls or doping a suitable amount of the etch gas in a reaction gas.

39. 发明专利

JPH08316468A SEMICONDUCTOR WAFER, SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH08316468A
公开(公告)日：1996-11-29
申请号：JP12205195
申请日：1995-05-22
申请人： HITACHI LTD
发明人： MEGURO SATOSHI , YASUOKA HIDEKI , KOBAYASHI MASAYOSHI , KANAI AKIRA , SAIDA HIROJI
IPC分类号： H01L21/205 , H01L29/08 , H01L29/78
摘要： PURPOSE: To minimize the resistance in operation of a vertical MOS transistor and to improve the setting accuracy of threshold voltage. CONSTITUTION: In a semiconductor device in which a vertical power MOS transistor Q is provided on a semiconductor substrate 1 which is composed of an epitaxial layer 1E containing impurities of a density lower than that of a semiconductor substrate layer 1S which is formed on the semiconductor substrate layer 1S, the epitaxial layer 1E is separated to two epitaxial layers 1E 1 and 1E 2 containing the impurities of same conductivity type, and the impurity concentration of the upper layer epitaxial layer 1E 2 is made lower than that of the lower epitaxial layer 1E 1.

40. 发明专利

JPH08203912A SEMICONDUCTOR WAFER, SEMICONDUCTOR DEVICE USING THE SAME, MANUFACTURING METHOD THEREOF 失效
公开(公告)号：JPH08203912A
公开(公告)日：1996-08-09
申请号：JP1358895
申请日：1995-01-31
申请人： HITACHI LTD
发明人： SAIDA HIROJI , KANAI AKIRA , KOBAYASHI MASAYOSHI , MEGURO SATOSHI , YANOKURA EIJI , IIJIMA TETSUO
IPC分类号： H01L21/322 , H01L21/02 , H01L21/20 , H01L29/78
摘要： PURPOSE: To avoid the deterioration in the junction characteristics at the pn junction part of a semiconductor device by avoiding the dislocation of thermal stress imposed on the inside of a bulk crystal and the dislocation caused on the surface of an epitaxial layer. CONSTITUTION: Within a semiconductor wafer composed of an n+type semiconductor substrate 1 wherein arsenic is introduced to a single crystal silicon or another semiconductor wafer composed of n+type semiconductor substrate 1 and n-type epitaxial layer 2, the inter-lattice oxygen concentration of the n+type semiconductor substrate 1 is set not to exceed 9×10 [atoms/cm ]. Besides, within a semiconductor device composed of the n+type substrate 1 and the n-type epitaxial layer 2, the interlattice oxygen concentration of the n+type semiconductor substrate 1 is set not to exceed 9×10 [atoms/cm ].

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