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31. 发明授权

US06657425B2 Power measurement circuit including harmonic filter 有权
标题翻译：功率测量电路包括谐波滤波器
公开(公告)号：US06657425B2
公开(公告)日：2003-12-02
申请号：US09891668
申请日：2001-06-26
申请人： Tirdad Sowlati , Sifen Luo
发明人： Tirdad Sowlati , Sifen Luo
IPC分类号： G01R2502
CPC分类号： G01R21/12 , G01R21/10
摘要： A shorting element, preferably a resonant inductor-capacitor circuit, is inserted in parallel with a sense transistor, which itself is in parallel with a power transistor. The use of the shorting element in combination with the sense transistor, provides a technique to have a monotonic power detection. The shorting element eliminates extraneous currents caused by inherent collector-base and collector-substrate diodes of sense transistor, and also eliminates the extraneous collector voltage swing of the sense transistor caused by mutual coupling between inductors connected to the power and sense transistors.
摘要翻译：短路元件，优选谐振电感器 - 电容器电路与感测晶体管并联插入，读出晶体管本身与功率晶体管并联。使用短路元件与感测晶体管组合提供了一种具有单调功率检测的技术。短路元件消除了由感测晶体管的固有集电极 - 基极和集电极 - 基极二极管引起的外部电流，并且还消除了由连接到功率和感测晶体管的电感器之间的相互耦合引起的感测晶体管的外部集电极电压摆幅。

32. 发明授权

US06496074B1 Cascode bootstrapped analog power amplifier circuit 失效
标题翻译： Cascode自举模拟功率放大器电路
公开(公告)号：US06496074B1
公开(公告)日：2002-12-17
申请号：US09671890
申请日：2000-09-28
申请人： Tirdad Sowlati
发明人： Tirdad Sowlati
IPC分类号： H03F122
CPC分类号： H03F1/523 , H03F1/223
摘要： A cascode bootstrapped analog power amplifier circuit includes a first MOSFET and a second MOSFET connected in series and coupled between a dc voltage source terminal and a common terminal. An rf input signal terminal is coupled to a gate electrode of the first MOSFET and a dc control voltage terminal is coupled to a gate electrode of the second MOSFET, with a unidirectionally-conducting element such as a diode-connected MOSFET being coupled between a drain electrode and the gate electrode of the second MOSFET. The output of the amplifier circuit is taken from the drain electrode of the second MOSFET. This circuit configuration, permits he first and second MOSFETs to withstand a larger output voltage swing, thus permitting the use of a higher supply voltage and resulting in a substantially increased maximum output power capability for a given load value.
摘要翻译：级联自举模拟功率放大器电路包括串联连接并耦合在直流电压源端子和公共端子之间的第一MOSFET和第二MOSFET。 RF输入信号端子耦合到第一MOSFET的栅电极，并且直流控制电压端子耦合到第二MOSFET的栅电极，其中单向导电元件例如二极管连接的MOSFET耦合在漏极电极和第二MOSFET的栅电极。放大器电路的输出取自第二MOSFET的漏电极。该电路配置允许他的第一和第二MOSFET承受更大的输出电压摆幅，从而允许使用更高的电源电压，并且对于给定的负载值而导致基本上增加的最大输出功率能力。

33. 发明授权

US06456163B1 High-frequency amplifier circuit having a directly-connected bias circuit 失效
标题翻译：高频放大器电路具有直接连接的偏置电路
公开(公告)号：US06456163B1
公开(公告)日：2002-09-24
申请号：US09801623
申请日：2001-03-08
申请人： Sifen Luo , Tirdad Sowlati
发明人： Sifen Luo , Tirdad Sowlati
IPC分类号： H03F304
CPC分类号： H03F1/302
摘要： A high-frequency amplifier circuit includes an amplifying transistor and a bias circuit directly connected to said amplifying transistor. The bias circuit includes a bias transistor having a control terminal and an inductor coupled to the control terminal, and the bias transistor also has an output terminal directly connected to the amplifying transistor. A resistor is connected in series with the inductor, and the series-connected components are connected in the circuit between the control terminal and a power supply terminal. By providing an inductor in the amplifier in this manner, loading effects on the amplifying transistor at high frequencies is substantially reduced.
摘要翻译：高频放大器电路包括放大晶体管和与所述放大晶体管直接连接的偏置电路。偏置电路包括具有控制端子和耦合到控制端子的电感器的偏置晶体管，偏置晶体管还具有直接连接到放大晶体管的输出端子。电感器与电感器串联连接，串联连接的元件连接在控制端子和电源端子之间的电路中。通过以这种方式在放大器中提供电感器，大幅减少了在高频下对放大晶体管的负载效应。

34. 发明授权

US06417734B1 High-frequency amplifier circuit with negative impedance cancellation 有权
标题翻译：具有负阻抗消除功能的高频放大电路
公开(公告)号：US06417734B1
公开(公告)日：2002-07-09
申请号：US09603875
申请日：2000-06-26
申请人： Sifen Luo , Tirdad Sowlati
发明人： Sifen Luo , Tirdad Sowlati
IPC分类号： H03F304
CPC分类号： H03F3/19 , H03F1/301 , H03F3/193 , H03F3/3432 , H03F3/345
摘要： A high-frequency amplifier circuit includes an amplifying transistor and a driver transistor, with the amplifying transistor being connected in either a common emitter or a common source configuration and the driver transistor being connected in a corresponding common collector or a common drain configuration, depending upon whether bipolar or field effect transistors are used. A current-mirror bias circuit is coupled between an input terminal and an output terminal of the driver transistor, with a resistor being provided for coupling the current mirror to the input terminal of the driver transistor. The resistor, which typically has a value of between about 20 and 100 ohms, provides a negative impedance cancellation effect while minimizing power consumption at low bias levels.
摘要翻译：高频放大器电路包括放大晶体管和驱动晶体管，放大晶体管以公共发射极或公共源配置连接，驱动晶体管连接在相应的公共集电极或公共漏极配置中，具体取决于是否使用双极或场效晶体管。电流镜偏置电路耦合在驱动晶体管的输入端和输出端之间，提供电阻用于将电流镜耦合到驱动晶体管的输入端。通常具有约20和100欧姆之间的值的电阻器提供负阻抗消除效应，同时使低偏置电平下的功率消耗最小化。

35. 发明授权

US08634510B2 Full digital bang bang frequency detector with no data pattern dependency 失效
标题翻译：全数字爆炸频率检测器，无数据模式依赖
公开(公告)号：US08634510B2
公开(公告)日：2014-01-21
申请号：US13005271
申请日：2011-01-12
申请人： Xiaohua Kong , Vannam Dang , Tirdad Sowlati
发明人： Xiaohua Kong , Vannam Dang , Tirdad Sowlati
IPC分类号： H04L7/02
CPC分类号： H04L7/033 , H03L7/07 , H03L7/0807 , H03L7/0814 , H03L7/087 , H03L7/091 , H03L7/0995
摘要： A bang-bang frequency detector with no data pattern dependency is provided. In examples, the detector recovers a clock from received data, such as data having a non-return to zero (NRZ) format. A first bang-bang phase detector (BBPD) provides first phase information about a phase difference between a sample clock and the clock embedded in the received data. A second BBPD provides second phase information about a second phase difference between the clock embedded in the received data and a delayed version of the sample clock. A frequency difference between the sample clock and the clock embedded in the received data is determined based on the first and second phase differences. The frequency difference can be used to adjust the frequency of the sample clock. A lock detector can be coupled to a BBPD output to determine if the sample clock is locked to the clock embedded in the received data.
摘要翻译：提供了一种没有数据模式依赖性的爆轰频率检测器。在示例中，检测器从接收的数据恢复时钟，例如具有不归零（NRZ）格式的数据。第一个爆炸相位检测器（BBPD）提供关于采样时钟和嵌入在接收数据中的时钟之间的相位差的第一阶段信息。第二BBPD提供关于嵌入在接收数据中的时钟与采样时钟的延迟版本之间的第二相位差的第二阶段信息。基于第一和第二相位差来确定采样时钟和嵌入在接收数据中的时钟之间的频率差。频率差可用于调整采样时钟的频率。锁定检测器可以耦合到BBPD输出，以确定采样时钟是否锁定在嵌入在接收数据中的时钟。

36. 发明授权

US07512393B2 Downconverting mixer 有权
标题翻译：下变频混频器
公开(公告)号：US07512393B2
公开(公告)日：2009-03-31
申请号：US11250995
申请日：2005-10-14
申请人： Raja Pullela , Peihua Ye , Tirdad Sowlati
发明人： Raja Pullela , Peihua Ye , Tirdad Sowlati
IPC分类号： H04B1/26 , G06F3/033
CPC分类号： H03D7/18 , H03D7/1433 , H03D7/1441 , H03D7/1458 , H03D7/165 , H03D2200/0047
摘要： A downconverter is provided. The downconverter includes a I mixer and a Q mixer. Each mixer includes a transconductance stage and a mixer core stage. The outputs of the transconductance stages of the mixers are shorted together, and a resistors are arranged in series with an input of the mixer core stages.
摘要翻译：提供下变频器。下变频器包括I混频器和Q混频器。每个混合器包括跨导级和混频器核级。混频器的跨导级的输出短路在一起，并且电阻器与混频器核心级的输入串联布置。

37. 发明授权

US07366484B2 Systems and methods for adjusting the bias level of a mixer in a transmitter 有权
标题翻译：用于调整发射机中混频器偏置电平的系统和方法
公开(公告)号：US07366484B2
公开(公告)日：2008-04-29
申请号：US10861870
申请日：2004-06-04
申请人： Tirdad Sowlati
发明人： Tirdad Sowlati
IPC分类号： H04B1/04
CPC分类号： H03D7/1425 , H03D7/145 , H03D7/1458 , H03D7/1491 , H03D7/165 , H03D2200/0033 , H03D2200/0043
摘要： A mixer having dynamic biasing, comprises a mixer configured to receive a local oscillator (LO) reference signal and a radio frequency (RF) data signal, and a bias control circuit configured to reduce bias current from the mixer under a low power condition.
摘要翻译：具有动态偏置的混频器包括配置成接收本地振荡器（LO）参考信号和射频（RF）数据信号的混频器，以及配置为在低功率条件下减少来自混频器的偏置电流的偏置控制电路。

38. 发明授权

US07355463B2 Loop filter integration in phase-locked loops 有权
标题翻译：环路滤波器集成在锁相环路中
公开(公告)号：US07355463B2
公开(公告)日：2008-04-08
申请号：US11439060
申请日：2006-05-23
申请人： Tirdad Sowlati , Edward Youssoufian
发明人： Tirdad Sowlati , Edward Youssoufian
IPC分类号： H03L7/06 , H00K5/00
CPC分类号： H03L7/0893 , H03L7/093 , H03L7/18 , H03L2207/12
摘要： A phase-locked loop and method are disclosed. One method embodiment includes providing a dual-path filter of a phase-locked loop, the dual-path filter consisting of passive components, and summing control signals in the dual-path filter using the passive components.
摘要翻译：公开了锁相环和方法。一种方法实施例包括提供锁相环路的双路径滤波器，由无源元件组成的双路径滤波器，以及使用无源元件的双路径滤波器中的求和控制信号。

39. 发明申请

US20060003717A1 Quadrature subharmonic mixer 有权
标题翻译：正交次谐调音台
公开(公告)号：US20060003717A1
公开(公告)日：2006-01-05
申请号：US10884757
申请日：2004-07-02
申请人： Tirdad Sowlati
发明人： Tirdad Sowlati
IPC分类号： H04B1/26
CPC分类号： H04B1/30 , H03D7/1433 , H03D7/1458 , H03D7/1475 , H03D7/165 , H03D2200/0023 , H03D2200/0047
摘要： A quadrature subharmonic mixer comprises a polyphase filter configured to generate quadrature components of a local oscillator (LO) reference signal, a summing and scaling element configured to create additional components of the LO reference signal, and a plurality of mixer elements configured to multiply the quadrature components of the LO reference signal and the additional components of the LO reference signal with a radio frequency (RF) signal to obtain a downconverted version of the RF signal.
摘要翻译：正交次谐波混频器包括多相滤波器，其被配置为生成本地振荡器（LO）参考信号的正交分量，被配置为产生LO参考信号的附加分量的求和和比例元素，以及多个混频器元件，被配置为将正交 LO参考信号的分量和具有射频（RF）信号的LO参考信号的附加分量，以获得RF信号的下变频版本。

40. 发明授权

US06593797B1 High-frequency integrated transistor module 失效
标题翻译：高频集成晶体管模块
公开(公告)号：US06593797B1
公开(公告)日：2003-07-15
申请号：US10174317
申请日：2002-06-18
申请人： Tirdad Sowlati
发明人： Tirdad Sowlati
IPC分类号： H03K1760
CPC分类号： H03F3/19 , H01L2924/0002 , H03F3/211 , H03F2203/21178 , H01L2924/00
摘要： A high-frequency integrated transistor module includes a bipolar transistor having at least one emitter finger, which is internally connected in series with a resistor to provide a DC current path for the circuit, and is internally connected in series with a capacitor to provide an RF current path for the module separate from the DC current path. The capacitor may be coupled to an RF ground connection, and the value of the capacitor may be selected to resonate with the value of the RF ground connection inductance in order to provide gain enhancement at a selected operating frequency range. In order to provide gain enhancement over a broader frequency bandwidth, two or more emitter fingers can be connected in series with respective capacitors of different values in order to provide at least two RF current paths having different resonant frequencies.
摘要翻译：高频集成晶体管模块包括具有至少一个发射极指的双极晶体管，其内部与电阻器串联连接以提供用于电路的DC电流通路，并且与电容器串联连接以提供RF 模块的电流路径与直流电流路径分开。电容器可以耦合到RF接地连接，并且可以选择电容器的值以与RF接地连接电感的值谐振，以便在选定的工作频率范围内提供增益。为了在更宽的频率带宽上提供增益增益，可以将两个或多个发射极指与串联不同值的相应电容器串联，以便提供具有不同谐振频率的至少两个RF电流路径。

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