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31. 发明申请

US20060146979A1 Shift register without noise and liquid crystal display device having the same 有权
标题翻译：无噪声的移位寄存器和具有相同的液晶显示装置
公开(公告)号：US20060146979A1
公开(公告)日：2006-07-06
申请号：US11171562
申请日：2005-06-30
申请人： Yong-Ho Jang , Binn Kim , Soo-Young Yoon
发明人： Yong-Ho Jang , Binn Kim , Soo-Young Yoon
IPC分类号： G11C19/00
CPC分类号： G09G3/3677 , G09G2300/0408 , G11C19/00 , G11C19/28
摘要： A shift register structure comprising a shift register for sequentially outputting voltages as a clock signal and a start voltage are inputted thereto, and a cleaner means connected to the shift register for removing noise within the start voltage. The cleaner means is a transistor for inputting a clock signal to a gate and for inputting a signal outputted from the shift register to a source.
摘要翻译：输入移位寄存器结构，其包括用于顺序地输出电压作为时钟信号的移位寄存器和起始电压，以及连接到移位寄存器的清除器装置，用于消除起始电压内的噪声。清洁装置是用于将时钟信号输入到门并将从移位寄存器输出的信号输入到源的晶体管。

32. 发明申请

US20060145991A1 Liquid crystal display device 有权
标题翻译：液晶显示装置
公开(公告)号：US20060145991A1
公开(公告)日：2006-07-06
申请号：US11173168
申请日：2005-06-30
申请人： Yong-Ho Jang , Binn Kim , Su-Hwan Moon , Nam-Wook Cho , Soo-Young Yoon
发明人： Yong-Ho Jang , Binn Kim , Su-Hwan Moon , Nam-Wook Cho , Soo-Young Yoon
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G2300/0417 , G09G2310/0205 , G09G2310/0251 , G09G2310/08
摘要： A liquid crystal display (LCD) device comprises a liquid crystal panel having a plurality of pixel regions defined by a plurality of gate lines and data lines, each pixel region associated with a thin film transistor, a gate driving unit having an amorphous semiconductor and integrally formed with the liquid crystal panel capable of sending a scan signal to the gate lines having a pulse width longer than a turned on time of the thin film transistor located within the pixel region, and a data driving unit connected to the data lines capable of sending an image signal to the data lines.
摘要翻译：液晶显示器（LCD）装置包括具有由多个栅极线和数据线限定的多个像素区域的液晶面板，与薄膜晶体管相关联的每个像素区域，具有非晶半导体的栅极驱动单元和一体的形成有能够向位于像素区域内的薄膜晶体管的导通时间长的脉冲宽度的栅极线发送扫描信号的液晶面板，以及连接到能够发送的数据线的数据驱动单元到数据线的图像信号。

33. 发明授权

US08581825B2 Driving circuit including shift register and flat panel display device using the same 有权
标题翻译：驱动电路包括移位寄存器和使用其的平板显示器件
公开(公告)号：US08581825B2
公开(公告)日：2013-11-12
申请号：US13223875
申请日：2011-09-01
申请人： Yong-Ho Jang , Soo-Young Yoon , Nam-Wook Cho
发明人： Yong-Ho Jang , Soo-Young Yoon , Nam-Wook Cho
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G2310/0267 , G09G2310/0286 , G09G2310/06 , G11C19/184
摘要： A driving circuit for a flat panel display device includes a generation unit for generating n-phase form generation clocks; and a plurality of shift register stages for sequentially generating a plurality gate signals to a plurality of gate lines using the n-phase form generation clocks, one of the shift register stage including first and second output terminals for outputting first and second switching signals, respectively, using an output signal of one of the preceding shift register stages and an output signal of one of the subsequent shift register stages; a first transistor connected to the first output terminal for receiving one of the n-phase form generation clocks; and a second transistor connected to the second output terminal and the first transistor, wherein each gate line is connected to a node between the first and second transistors.
摘要翻译：用于平板显示装置的驱动电路包括用于产生n相形式产生时钟的生成单元; 以及多个移位寄存器级，用于使用n相形式产生时钟向多条栅极线顺序产生多个栅极信号，移位寄存器级中的一个分别包括用于分别输出第一和第二开关信号的第一和第二输出端使用前述移位寄存器级之一的输出信号和随后的移位寄存器级之一的输出信号; 连接到第一输出端的第一晶体管，用于接收n相形成时钟之一; 以及连接到第二输出端和第一晶体管的第二晶体管，其中每个栅极线连接到第一和第二晶体管之间的节点。

34. 发明授权

US08309379B2 Flexible substrate and method for fabricating flexible display device having the same 有权
标题翻译：柔性基板及其制造方法
公开(公告)号：US08309379B2
公开(公告)日：2012-11-13
申请号：US12838920
申请日：2010-07-19
申请人： Dong-sik Park , Juhn-Suk Yoo , Soo-Young Yoon
发明人： Dong-sik Park , Juhn-Suk Yoo , Soo-Young Yoon
IPC分类号： H01L21/00
CPC分类号： H01L27/1266
摘要： A method for fabricating a flexible display device including the steps of preparing a glass substrate, forming a flexible substrate on the glass substrate, the flexible substrate being formed by forming a semiconductor layer on the glass substrate, forming a first flexible layer on the semiconductor layer, forming an adhesive layer on the first flexible layer, and forming a second flexible layer on the adhesive layer, forming a thin film array on the flexible substrate, forming a display device on the thin film array, and separating the glass substrate from the semiconductor layer of the flexible substrate.
摘要翻译：一种制造柔性显示装置的方法，包括以下步骤：制备玻璃基板，在玻璃基板上形成柔性基板，柔性基板通过在玻璃基板上形成半导体层而形成，在半导体层上形成第一柔性层在所述第一柔性层上形成粘合剂层，在所述粘合剂层上形成第二柔性层，在所述柔性基板上形成薄膜阵列，在所述薄膜阵列上形成显示装置，以及将所述玻璃基板与所述半导体柔性基板层。

35. 发明授权

US08031158B2 Driving circuit including shift register and flat panel display device using the same 有权
标题翻译：驱动电路包括移位寄存器和使用其的平板显示器件
公开(公告)号：US08031158B2
公开(公告)日：2011-10-04
申请号：US11167192
申请日：2005-06-28
申请人： Yong-Ho Jang , Soo-Young Yoon , Nam-Wook Cho
发明人： Yong-Ho Jang , Soo-Young Yoon , Nam-Wook Cho
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G2310/0267 , G09G2310/0286 , G09G2310/06 , G11C19/184
摘要： A driving circuit for a flat panel display device includes a generation unit for generating n-phase form generation clocks; and a plurality of shift register stages for sequentially generating a plurality gate signals to a plurality of gate lines using the n-phase form generation clocks, one of the shift register stage including first and second output terminals for outputting first and second switching signals, respectively, using an output signal of one of the preceding shift register stages and an output signal of one of the subsequent shift register stages; a first transistor connected to the first output terminal for receiving one of the n-phase form generation clocks; and a second transistor connected to the second output terminal and the first transistor, wherein each gate line is connected to a node between the first and second transistors.
摘要翻译：用于平板显示装置的驱动电路包括用于产生n相形式产生时钟的生成单元; 以及多个移位寄存器级，用于使用n相形式产生时钟向多条栅极线顺序产生多个栅极信号，移位寄存器级中的一个分别包括用于分别输出第一和第二开关信号的第一和第二输出端使用前述移位寄存器级之一的输出信号和随后的移位寄存器级之一的输出信号; 连接到第一输出端的第一晶体管，用于接收n相形成时钟之一; 以及连接到第二输出端和第一晶体管的第二晶体管，其中每个栅极线连接到第一和第二晶体管之间的节点。

36. 发明申请

US20060139292A1 Driving circuit including shift register and flat panel display device using the same 有权
公开(公告)号：US20060139292A1
公开(公告)日：2006-06-29
申请号：US11172232
申请日：2005-06-29
申请人： Soo-Young Yoon , Yong-Ho Jang , Binn Kim , Soo-Hwan Moon
发明人： Soo-Young Yoon , Yong-Ho Jang , Binn Kim , Soo-Hwan Moon
IPC分类号： G09G3/36
CPC分类号： G11C19/28 , G11C19/00
摘要： A driving circuit for a flat panel display device includes shift register stages, each containing: a first TFT charging a Q node according to a start signal; a second TFT discharging the Q node according to an output voltage of a next shift register stage; a pull-up unit increasing an output voltage according to the Q node voltage; an odd pull-down unit decreasing the output voltage in an odd frame according to a QB-o node voltage; and an even pull-down unit decreasing the output voltage in an even frame according to a QB-e node voltage. A gate and drain of a third odd TFT connected to the QB-o node are connected to each other and receive an odd source voltage. A gate and drain of the third even TFT connected to the QB-e node are connected to each other and receive an even source voltage.

37. 发明申请

US20050285840A1 Driving circuit including shift register and flat panel display device using the same 有权
标题翻译：驱动电路包括移位寄存器和使用其的平板显示器件
公开(公告)号：US20050285840A1
公开(公告)日：2005-12-29
申请号：US11167192
申请日：2005-06-28
申请人： Yong-Ho Jang , Soo-Young Yoon , Nam-Wook Cho
发明人： Yong-Ho Jang , Soo-Young Yoon , Nam-Wook Cho
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G2310/0267 , G09G2310/0286 , G09G2310/06 , G11C19/184
摘要： A driving circuit for a flat panel display device includes a generation unit for generating n-phase form generation clocks; and a plurality of shift register stages for sequentially generating a plurality gate signals to a plurality of gate lines using the n-phase form generation clocks, one of the shift register stage including first and second output terminals for outputting first and second switching signals, respectively, using an output signal of one of the preceding shift register stages and an output signal of one of the subsequent shift register stages; a first transistor connected to the first output terminal for receiving one of the n-phase form generation clocks; and a second transistor connected to the second output terminal and the first transistor, wherein each gate line is connected to a node between the first and second transistors.
摘要翻译：用于平板显示装置的驱动电路包括用于产生n相形式产生时钟的生成单元; 以及多个移位寄存器级，用于使用n相形式产生时钟向多条栅极线顺序产生多个栅极信号，移位寄存器级中的一个分别包括用于分别输出第一和第二开关信号的第一和第二输出端使用前述移位寄存器级之一的输出信号和随后的移位寄存器级之一的输出信号; 连接到第一输出端的第一晶体管，用于接收n相形成时钟之一; 以及连接到第二输出端和第一晶体管的第二晶体管，其中每个栅极线连接到第一和第二晶体管之间的节点。

38. 发明授权

US06818059B2 Method of crystallizing amorphous silicon layer and crystallizing apparatus thereof 有权
标题翻译：非晶硅层结晶方法及其结晶装置
公开(公告)号：US06818059B2
公开(公告)日：2004-11-16
申请号：US09350313
申请日：1999-07-09
申请人： Jin Jang , Soo-Young Yoon , Jae-Young Oh , Woo-Sung Shon , Seong-Jin Park
发明人： Jin Jang , Soo-Young Yoon , Jae-Young Oh , Woo-Sung Shon , Seong-Jin Park
IPC分类号： C30B106
CPC分类号： H01L21/02672 , C30B1/023 , C30B29/06 , H01J37/32009 , H01L21/02532 , H01L21/02595 , H01L21/2022 , Y10T117/10 , Y10T117/1008
摘要： The present invention is related to a method of crystallizing an amorphous silicon layer and a crystallizing apparatus thereof which crystallize an amorphous silicon layer using plasma. The present invention includes the steps of depositing an inducing substance for silicon crystallization on an amorphous silicon layer by plasma exposure, and carrying out annealing on the amorphous silicon layer to the amorphous silicon layer. The present invention includes a chamber having an inner space, a substrate support in the chamber wherein the substrate support supports a substrate, a plasma generating means in the chamber wherein the plasma generating means produces plasma inside the chamber, and a heater at the substrate support wherein the heater supplies the substrate with heat.
摘要翻译：本发明涉及一种使非晶硅层结晶的方法及其使用等离子体结晶非晶硅层的结晶装置。本发明包括以下步骤：通过等离子体曝光在非晶硅层上沉积用于硅结晶的诱导物质，并在非晶硅层上对非晶硅层进行退火。本发明包括具有内部空间的腔室，腔室中的衬底支撑件，其中衬底支撑件支撑衬底;腔室中的等离子体产生装置，其中等离子体产生装置在室内产生等离子体，以及衬底支撑件处的加热器其中所述加热器对所述基板供热。

39. 发明授权

US06241817B1 Method for crystallizing amorphous layer 失效
标题翻译：非晶层结晶方法
公开(公告)号：US06241817B1
公开(公告)日：2001-06-05
申请号：US09083109
申请日：1998-05-22
申请人： Jin Jang , Soo-Young Yoon , Jae-Young Oh
发明人： Jin Jang , Soo-Young Yoon , Jae-Young Oh
IPC分类号： C30B106
CPC分类号： C30B1/023 , C30B29/06
摘要： A method for crystallizing an amorphous layer into a polycrystalline layer. The method uses a substrate under the amorphous layer and a nickel film on the amorphous layer, which are subjected to a heat treatment. The nickel film is formed by a coating step that uses a nickel-containing solution. Alternatively, a nickel and gold, or a nickel and palladium, solution can be used. The method eliminates contamination with metal in the polycrystalline silicon layer and reduces its growth temperature.
摘要翻译：一种将非晶层结晶成多晶层的方法。该方法使用非晶层下的衬底和非晶层上的镍膜进行热处理。镍膜通过使用含镍溶液的涂布步骤形成。或者，可以使用镍和金，或镍和钯的溶液。该方法消除了多晶硅层中金属的污染并降低其生长温度。

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