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31. 发明授权

US08841202B2 Method of producing a hybrid substrate by partial recrystallization of a mixed layer 有权
标题翻译：通过混合层的部分再结晶来制造混合基板的方法
公开(公告)号：US08841202B2
公开(公告)日：2014-09-23
申请号：US12705039
申请日：2010-02-12
申请人： Franck Fournel , Thomas Signamarcheix , Laurent Clavelier , Chrystel Deguet
发明人： Franck Fournel , Thomas Signamarcheix , Laurent Clavelier , Chrystel Deguet
IPC分类号： H01L21/30
CPC分类号： H01L21/76254
摘要： A method of producing a hybrid substrate includes preparing a monocrystalline first substrate to obtain two surface portions. A temporary substrate is prepared including a mixed layer along which extends one surface portion and is formed of first areas and adjacent different second areas of amorphous material, the second areas forming at least part of the free surface of the first substrate. The first substrate is bonded to the other surface portion with the same crystal orientation as the first surface portion, by molecular bonding over at least the amorphous areas. A solid phase recrystallization of at least part of the amorphous areas according to the crystal orientation of the first substrate is selectively carried and the two surface portions are separated.
摘要翻译：制造混合基板的方法包括制备单晶第一基板以获得两个表面部分。制备临时衬底，其包括混合层，沿其延伸一个表面部分并且由第一区域和相邻的不同第二区域的非晶材料形成，第二区域形成第一衬底的至少部分自由表面。第一衬底通过在至少非晶区上分子键合而与第一表面部分具有相同的晶体取向而与另一表面部分结合。选择性地承载根据第一基板的晶体取向的至少一部分非晶区域的固相重结晶，并分离两个表面部分。

32. 发明申请

US20120206216A1 ACOUSTIC WAVE DEVICE INCLUDING A SURFACE WAVE FILTER AND A BULK WAVE FILTER, AND METHOD FOR MAKING SAME 有权
标题翻译：包括表面波浪滤波器和大容量波形滤波器的声波装置及其制造方法
公开(公告)号：US20120206216A1
公开(公告)日：2012-08-16
申请号：US13500614
申请日：2010-10-04
申请人： Chrystel Deguet , Laurent Clavelier , Emmanuel Defay , Alexandre Reinhardt
发明人： Chrystel Deguet , Laurent Clavelier , Emmanuel Defay , Alexandre Reinhardt
IPC分类号： H03H9/205 , H03H3/02
CPC分类号： H03H3/08 , H03H3/02 , H03H2003/0071 , Y10T29/42
摘要： An acoustic wave device comprising at least one surface acoustic wave filter and one bulk acoustic wave filter, the device including, on a substrate comprising a second piezoelectric material: a stack of layers including a first metal layer and a layer of a first monocrystalline piezoelectric material, wherein the stack of layers is partially etched so as to define a first area in which the first and second piezoelectric materials are present and a second area in which the first piezoelectric material is absent; a second metallization at the first area for defining the bulk acoustic wave filter integrating the first piezoelectric material, and a third metallization at the second area for defining the surface acoustic wave filter integrating the second piezoelectric material.
摘要翻译：一种声波装置，包括至少一个表面声波滤波器和一个体声波滤波器，该装置包括在包括第二压电材料的基板上，包括第一金属层和第一单晶压电材料层其中，所述层的一部分被部分蚀刻以限定其中存在所述第一和第二压电材料的第一区域和不存在所述第一压电材料的第二区域; 在第一区域处的第二金属化，用于限定集成第一压电材料的体声滤波器，以及在第二区域处的第三金属化，用于限定整合第二压电材料的表面声波滤波器。

33. 发明申请

US20120205614A1 METHOD FOR MANUFACTURING A VERY-HIGH-RESOLUTION SCREEN USING A NANOWIRE-BASED EMITTING ANISOTROPIC CONDUCTIVE FILM 有权
标题翻译：使用基于纳米级的发射异相导电膜制造高分辨率屏幕的方法
公开(公告)号：US20120205614A1
公开(公告)日：2012-08-16
申请号：US13503480
申请日：2010-10-19
申请人： Francois Templier , Laurent Clavelier , Marc Rabarot
发明人： Francois Templier , Laurent Clavelier , Marc Rabarot
IPC分类号： H01L33/04 , B82Y99/00 , B82Y40/00
CPC分类号： H01L27/156 , B82Y20/00 , H01L33/0079 , H01L33/08 , H01L33/18 , H01L2924/0002 , H01L2924/00
摘要： A method for producing an emissive pixel screen includes forming an active pixel matrix along which an electrode forming layer runs and having pixels arranged according to a distribution, forming an anisotropic substrate that includes a set of light emitting diodes constituted by parallel nanowires and arranged in an insulating matrix transversely with respect to a substrate thickness and having a density higher than a density of the pixels irrespective of the pixel distribution, connecting the substrate to the active pixel matrix by connecting only sub-groups of the parallel nanowires by a first end to separate pixel electrodes defined in the electrode forming layer according to the distribution of the pixels in the matrix, and connecting the sub-groups, by another end, to a common electrode, and delimiting the sub-groups by rendering the nanowires of the substrate that are arranged between the sub-groups emissively inactive.
摘要翻译：一种用于制造发射像素屏幕的方法包括形成有源像素矩阵，电极形成层沿着该有源像素阵列运行并具有根据分布布置的像素，形成各向异性衬底，该各向异性衬底包括由平行的纳米线构成的一组发光二极管，绝缘基体相对于衬底厚度横向地具有不同于像素分布的密度高于像素密度的密度，通过将平行纳米线的子组连接到第一端而将衬底连接到有源像素矩阵，以分离根据矩阵中的像素的分布在电极形成层中限定的像素电极，并且将另一端的子组连接到公共电极，并且通过使基板的纳米线排列在子组之间，不起作用。

34. 发明授权

US08178427B2 Epitaxial methods for reducing surface dislocation density in semiconductor materials 失效
标题翻译：降低半导体材料表面位错密度的外延方法
公开(公告)号：US08178427B2
公开(公告)日：2012-05-15
申请号：US12721461
申请日：2010-03-10
申请人： Chantal Arena , Laurent Clavelier , Marc Rabarot
发明人： Chantal Arena , Laurent Clavelier , Marc Rabarot
IPC分类号： H01L21/20
CPC分类号： H01L29/2003 , H01L21/0242 , H01L21/0243 , H01L21/02458 , H01L21/0254 , H01L21/02639
摘要： The invention provides methods and structures for reducing surface dislocations of a semiconductor layer, and can be employed during the epitaxial growth of semiconductor structures and layers comprising III-nitride materials. Embodiments involve the formation of a plurality of dislocation pit plugs to prevent propagation of dislocations from an underlying layer of material into a following semiconductor layer of material.
摘要翻译：本发明提供了用于减少半导体层的表面位错的方法和结构，并且可以在半导体结构和包含III族氮化物材料的层的外延生长期间使用。实施例涉及形成多个位错坑塞，以防止位错从材料的下层扩散到随后的材料半导体层中。

35. 发明授权

US08076169B2 Method of fabricating an electromechanical device including at least one active element 有权
标题翻译：制造包括至少一个有源元件的机电装置的方法
公开(公告)号：US08076169B2
公开(公告)日：2011-12-13
申请号：US12488882
申请日：2009-06-22
申请人： Francois Perruchot , Bernard Diem , Vincent Larrey , Laurent Clavelier , Emmanuel Defay
发明人： Francois Perruchot , Bernard Diem , Vincent Larrey , Laurent Clavelier , Emmanuel Defay
IPC分类号： H01L21/00
CPC分类号： B81C1/00238 , B81B2201/0271 , B81C1/00357 , B81C2201/0115 , B81C2201/014 , B81C2201/0191
摘要： The invention relates to a method of fabricating an electromechanical device including an active element, wherein the method comprises the following steps:a) making a monocrystalline first stop layer on a monocrystalline layer of a first substrate;b) growing a monocrystalline mechanical layer epitaxially on said first stop layer out of at least one material that is different from that of the stop layer;c) making a sacrificial layer on said active layer out of a material that is suitable for being etched selectively relative to said mechanical layer;d) making a bonding layer on the sacrificial layer;e) bonding a second substrate on the bonding layer; andf) eliminating the first substrate and the stop layer to reveal the surface of the mechanical layer opposite from the sacrificial layer, the active element being made by at least a portion of the mechanical layer.
摘要翻译：本发明涉及一种制造包括有源元件的机电装置的方法，其中该方法包括以下步骤：a）在第一衬底的单晶层上制备单晶第一阻挡层; b）在所述第一停止层上外延生长至少一种不同于所述停止层的材料的单晶机械层; c）在适合于相对于所述机械层选择性蚀刻的材料中在所述有源层上制造牺牲层; d）在牺牲层上形成结合层; e）在接合层上粘合第二衬底; 以及f）消除所述第一衬底和所述阻挡层以露出与所述牺牲层相对的所述机械层的表面，所述有源元件由所述机械层的至少一部分制成。

36. 发明申请

US20100075461A1 METHOD FOR TRANSFERRING CHIPS ONTO A SUBSTRATE 有权
标题翻译：将基板转移到基板上的方法
公开(公告)号：US20100075461A1
公开(公告)日：2010-03-25
申请号：US12564597
申请日：2009-09-22
申请人： Laurent Clavelier , Chrystel Deguet , Patrick Leduc , Hubert Moriceau
发明人： Laurent Clavelier , Chrystel Deguet , Patrick Leduc , Hubert Moriceau
IPC分类号： H01L21/50
CPC分类号： H01L21/7813 , H01L24/80 , H01L25/0657 , H01L25/50 , H01L2225/06513 , H01L2225/06541 , H01L2924/0002 , H01L2924/00
摘要： The invention relates to a method for making a stack of at least two stages of circuits, each stage comprising a substrate and at least one component (10, 20) and metallic connections formed in or on this substrate, the assembly of a stage to be transferred onto a previous stage comprising:a) ionic implantation (29) in the substrate (2, 25) of the stage to be transferred through at least part of the components (10, 20), so as to form a weakened zone (30),b) formation of metallic connections of said components,c) transfer and assembly of some of this substrate onto the previous stage,d) a step to thin the transferred part of said substrate by fracture along the weakened zone (30).
摘要翻译：本发明涉及一种用于制造至少两级电路的堆叠的方法，每个级包括衬底和形成在该衬底中或之上的至少一个部件（10,20）和金属连接，所述组件的阶段为转移到前一阶段，包括：a）通过至少部分组分（10,20）转移的阶段的衬底（2,25）中的离子注入（29），以形成弱化区（30 ），b）形成所述部件的金属连接，c）将所述基材中的一些转移和组装到前一阶段，d）通过沿弱化区（30）的断裂来稀释所述基板的转移部分的步骤。

37. 发明申请

US20100029031A1 METHOD OF FABRICATING A MEMS/NEMS ELECTROMECHANICAL COMPONENT 有权
标题翻译：制造MEMS / NEMS电子元件的方法
公开(公告)号：US20100029031A1
公开(公告)日：2010-02-04
申请号：US12488898
申请日：2009-06-22
申请人： François Perruchot , Bernard Diem , Vincent Larrey , Laurent Clavelier , Emmanuel Defay
发明人： François Perruchot , Bernard Diem , Vincent Larrey , Laurent Clavelier , Emmanuel Defay
IPC分类号： H01L21/18
CPC分类号： B81C1/00507 , B81B2201/0271 , B81C2201/0115 , B81C2201/0136 , B81C2201/0177 , B81C2203/0136 , B81C2203/0145 , H03H3/0072 , H03H9/175 , H03H9/2436 , Y10S438/933
摘要： The invention relates to a method of fabricating and electromechanical device on at least one substrate, the device including at least one active element and wherein the method comprises: a) making a heterogeneous substrate comprising a first portion, an interface layer, and a second portion, the first portion including one or more buried zones sandwiched between first and second regions formed in a first monocrystalline material, the first region extending to the surface of the first portion, and the second region extending to the interface layer, at least one said buried zone being made at least in part out of a second monocrystalline material so as to make it selectively attackable relative to the first and second regions; b) making openings from the surface of the first portion and through the first region, which openings open out to at least one said buried zone; and c) etching at least part of at least one buried zone to form at least one cavity so as to define at least one active element that is at least a portion of the second region between a said cavity and said interface layer; and wherein the first and second portions of the substrate are constituted respectively from first and second substrates that are assembled together by bonding, at least one of them including at least one said interface layer over at least a fraction of its surface.
摘要翻译：本发明涉及在至少一个基板上制造和机电装置的方法，所述装置包括至少一个有源元件，并且其中所述方法包括：a）制造包含第一部分，界面层和第二部分，所述第一部分包括被夹在形成于第一单晶材料中的第一和第二区域之间的一个或多个掩埋区域，所述第一区域延伸到所述第一部分的表面，并且所述第二区域延伸到所述界面层，所述第二区域延伸至所述界面层，区域至少部分地由第二单晶材料制成，以使其相对于第一和第二区域选择性地被破坏; b）从所述第一部分的表面和所述第一区域制造开口，所述第一区域开放到至少一个所述掩埋区域; 以及c）蚀刻至少一个掩埋区的至少一部分以形成至少一个空腔，以便限定至少一个有源元件，所述至少一个有源元件是所述空腔和所述界面层之间的所述第二区域的至少一部分; 并且其中所述基底的第一和第二部分分别由通过粘合而组装在一起的第一和第二基底构成，其中至少一个在其表面的至少一部分上包括至少一个所述界面层。

38. 发明授权

US07648893B2 Method for manufacturing a semiconductor-on-insulator substrate for microelectronics and optoelectronics 有权
标题翻译：用于制造微电子学和光电子学的绝缘体上半导体衬底的方法
公开(公告)号：US07648893B2
公开(公告)日：2010-01-19
申请号：US12144992
申请日：2008-06-24
申请人： Jean-Francois Damlencourt , Laurent Clavelier
发明人： Jean-Francois Damlencourt , Laurent Clavelier
IPC分类号： H01L21/36
CPC分类号： H01L21/02516 , H01L21/0242 , H01L21/02422 , H01L21/0245 , H01L21/02502 , H01L21/02532 , H01L21/02639 , H01L21/02664
摘要： A method for manufacturing a semiconductor including the steps of supplying a substrate having a support with one face supporting a strained silicon thin layer; forming a first mask on a portion of the strained silicon thin layer; epitaxy of Si1-xGex on the portion of the layer not masked by the first mask; condensating germanium to obtain a strained germanium layer, the strained germanium layer then covered by a silicon oxide layer; eliminating the first mask and of the silicon oxide layer thereby exposing a semi-conducting thin layer; forming a second mask on the semi-conducting thin layer exposed via the previous step, the second mask protecting a region of the exposing a remaining strained germanium portion; epitaxial growing germanium on the remaining strained germanium portion; and removing the second mask.
摘要翻译：一种制造半导体的方法，包括以下步骤：将具有支撑体的支撑体的基板供给支撑应变硅薄层的步骤; 在应变硅薄层的一部分上形成第一掩模; Si1-xGex在未被第一掩模掩蔽的部分上的外延; 冷凝锗以获得应变锗层，然后应变锗层被氧化硅层覆盖; 消除第一掩模和氧化硅层从而暴露半导体薄层; 在经由前述步骤暴露的半导电薄层上形成第二掩模，所述第二掩模保护暴露剩余的应变锗部分的区域; 在剩余的锗锗部分上外延生长锗; 并移除第二掩模。

39. 发明申请

US20090317931A1 METHOD OF FABRICATING AN ELECTROMECHANICAL DEVICE INCLUDING AT LEAST ONE ACTIVE ELEMENT 有权
标题翻译：制造包括至少一个活动元件的电气设备的方法
公开(公告)号：US20090317931A1
公开(公告)日：2009-12-24
申请号：US12488882
申请日：2009-06-22
申请人： François Perruchot , Bernard Diem , Vincent Larrey , Laurent Clavelier , Emmanuel Defay
发明人： François Perruchot , Bernard Diem , Vincent Larrey , Laurent Clavelier , Emmanuel Defay
IPC分类号： H01L29/84
CPC分类号： B81C1/00238 , B81B2201/0271 , B81C1/00357 , B81C2201/0115 , B81C2201/014 , B81C2201/0191
摘要： The invention relates to a method of fabricating an electromechanical device including an active element, wherein the method comprises the following steps:a) making a monocrystalline first stop layer on a monocrystalline layer of a first substrate;b) growing a monocrystalline mechanical layer epitaxially on said first stop layer out of at least one material that is different from that of the stop layer;c) making a sacrificial layer on said active layer out of a material that is suitable for being etched selectively relative to said mechanical layer;d) making a bonding layer on the sacrificial layer;e) bonding a second substrate on the bonding layer; andf) eliminating the first substrate and the stop layer to reveal the surface of the mechanical layer opposite from the sacrificial layer, the active element being made by at least a portion of the mechanical layer.
摘要翻译：本发明涉及一种制造包括有源元件的机电装置的方法，其中该方法包括以下步骤：a）在第一衬底的单晶层上制备单晶第一阻挡层; b）在所述第一停止层上外延生长至少一种不同于所述停止层的材料的单晶机械层; c）在适合于相对于所述机械层选择性蚀刻的材料中在所述有源层上制造牺牲层; d）在牺牲层上形成结合层; e）在接合层上粘合第二衬底; 以及f）消除所述第一衬底和所述阻挡层以露出与所述牺牲层相对的所述机械层的表面，所述有源元件由所述机械层的至少一部分制成。

40. 发明申请

US20070287257A1 METHOD FOR PRODUCING SI1-YGEY BASED ZONES WITH DIFFERENT CONTENTS IN GE ON A SAME SUBSTRATE BY CONDENSATION OF GERMANIUM 有权
标题翻译：通过对锗进行同位素生产在同一基片上的不同含量的SI1-YGEY基区的方法
公开(公告)号：US20070287257A1
公开(公告)日：2007-12-13
申请号：US11761074
申请日：2007-06-11
申请人： Jean-Francois Damlencourt , Yves Morand , Laurent Clavelier
发明人： Jean-Francois Damlencourt , Yves Morand , Laurent Clavelier
IPC分类号： H01L21/336
CPC分类号： H01L21/32105 , H01L21/02381 , H01L21/02532 , H01L21/02639 , H01L21/84 , H01L27/1203 , H01L29/78684
摘要： The disclosure relates a method for producing a microelectronic device including a plurality of based Si1-yGey semi-conductor zones (where 0
摘要翻译：本公开内容涉及一种用于生产包括多个基于Si 1-y N y Y y半导体区（其中0 半导体层（其中0

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