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1. 发明授权

US08076169B2 Method of fabricating an electromechanical device including at least one active element 有权
标题翻译：制造包括至少一个有源元件的机电装置的方法
公开(公告)号：US08076169B2
公开(公告)日：2011-12-13
申请号：US12488882
申请日：2009-06-22
申请人： Francois Perruchot , Bernard Diem , Vincent Larrey , Laurent Clavelier , Emmanuel Defay
发明人： Francois Perruchot , Bernard Diem , Vincent Larrey , Laurent Clavelier , Emmanuel Defay
IPC分类号： H01L21/00
CPC分类号： B81C1/00238 , B81B2201/0271 , B81C1/00357 , B81C2201/0115 , B81C2201/014 , B81C2201/0191
摘要： The invention relates to a method of fabricating an electromechanical device including an active element, wherein the method comprises the following steps:a) making a monocrystalline first stop layer on a monocrystalline layer of a first substrate;b) growing a monocrystalline mechanical layer epitaxially on said first stop layer out of at least one material that is different from that of the stop layer;c) making a sacrificial layer on said active layer out of a material that is suitable for being etched selectively relative to said mechanical layer;d) making a bonding layer on the sacrificial layer;e) bonding a second substrate on the bonding layer; andf) eliminating the first substrate and the stop layer to reveal the surface of the mechanical layer opposite from the sacrificial layer, the active element being made by at least a portion of the mechanical layer.
摘要翻译：本发明涉及一种制造包括有源元件的机电装置的方法，其中该方法包括以下步骤：a）在第一衬底的单晶层上制备单晶第一阻挡层; b）在所述第一停止层上外延生长至少一种不同于所述停止层的材料的单晶机械层; c）在适合于相对于所述机械层选择性蚀刻的材料中在所述有源层上制造牺牲层; d）在牺牲层上形成结合层; e）在接合层上粘合第二衬底; 以及f）消除所述第一衬底和所述阻挡层以露出与所述牺牲层相对的所述机械层的表面，所述有源元件由所述机械层的至少一部分制成。

2. 发明申请

US20090325335A1 HETEROGENEOUS SUBSTRATE INCLUDING A SACRIFICIAL LAYER, AND A METHOD OF FABRICATING IT 有权
标题翻译：异质基底包括一个非常复杂的层，以及一种制造它的方法
公开(公告)号：US20090325335A1
公开(公告)日：2009-12-31
申请号：US12488854
申请日：2009-06-22
申请人： François Perruchot , Bernard Diem , Vincent Larrey , Laurent Clavelier , Emmanuel Defay
发明人： François Perruchot , Bernard Diem , Vincent Larrey , Laurent Clavelier , Emmanuel Defay
IPC分类号： H01L21/302 , H01L21/02
CPC分类号： B81C1/00595 , B81B2201/0271 , B81C2201/0109 , B81C2201/014
摘要： The invention relates to a method of making a component from a heterogeneous substrate comprising first and second portions in at least one monocrystalline material, and a sacrificial layer constituted by at least one stack of at least one layer of monocrystalline Si situated between two layers of monocrystalline SiGe, the stack being disposed between said first and second portions of monocrystalline material, wherein the method consists in etching said stack by making: e) at least one opening in the first and/or second portion and the first and/or second layer of SiGe so as to reach the layer of Si; and f) eliminating all or part of the layer of Si.
摘要翻译：本发明涉及一种从包含至少一种单晶材料中的第一和第二部分的异质衬底制备组分的方法，以及由位于两层单晶之间的至少一层单晶硅的至少一个叠层构成的牺牲层 SiGe，堆叠设置在单晶材料的第一和第二部分之间，其中该方法包括通过以下步骤蚀刻所述堆叠：e）在第一和/或第二部分中的至少一个开口，以及第一和/ SiGe，以达到Si层; 和f）消除Si的全部或部分层。

3. 发明授权

US07993949B2 Heterogeneous substrate including a sacrificial layer, and a method of fabricating it 有权
标题翻译：包括牺牲层的非均相基板及其制造方法
公开(公告)号：US07993949B2
公开(公告)日：2011-08-09
申请号：US12488854
申请日：2009-06-22
申请人： François Perruchot , Bernard Diem , Vincent Larrey , Laurent Clavelier , Emmanuel Defay
发明人： François Perruchot , Bernard Diem , Vincent Larrey , Laurent Clavelier , Emmanuel Defay
IPC分类号： H01L21/02
CPC分类号： B81C1/00595 , B81B2201/0271 , B81C2201/0109 , B81C2201/014
摘要： The invention relates to a method of making a component from a heterogeneous substrate comprising first and second portions in at least one monocrystalline material, and a sacrificial layer constituted by at least one stack of at least one layer of monocrystalline Si situated between two layers of monocrystalline SiGe, the stack being disposed between said first and second portions of monocrystalline material, wherein the method consists in etching said stack by making: e) at least one opening in the first and/or second portion and the first and/or second layer of SiGe so as to reach the layer of Si; and f) eliminating all or part of the layer of Si.
摘要翻译：本发明涉及一种从包含至少一种单晶材料中的第一和第二部分的异质衬底制备组分的方法，以及由位于两层单晶之间的至少一层单晶硅的至少一个叠层构成的牺牲层 SiGe，堆叠设置在单晶材料的第一和第二部分之间，其中该方法包括通过以下步骤蚀刻所述堆叠：e）在第一和/或第二部分中的至少一个开口，以及第一和/ SiGe，以达到Si层; 和f）消除Si的全部或部分层。

4. 发明授权

US07906439B2 Method of fabricating a MEMS/NEMS electromechanical component 有权
标题翻译：制造MEMS / NEMS机电元件的方法
公开(公告)号：US07906439B2
公开(公告)日：2011-03-15
申请号：US12488898
申请日：2009-06-22
申请人： François Perruchot , Bernard Diem , Vincent Larrey , Laurent Clavelier , Emmanuel Defay
发明人： François Perruchot , Bernard Diem , Vincent Larrey , Laurent Clavelier , Emmanuel Defay
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： B81C1/00507 , B81B2201/0271 , B81C2201/0115 , B81C2201/0136 , B81C2201/0177 , B81C2203/0136 , B81C2203/0145 , H03H3/0072 , H03H9/175 , H03H9/2436 , Y10S438/933
摘要： The invention provides a method of fabricating and electromechanical device having an active element on at least one substrate, the method having the steps of: a) making a heterogeneous substrate having a first portion, an interface layer, and a second portion, the first portion including one or more buried zones sandwiched between first and second regions formed in a first monocrystalline material, the first region extending to the surface of the first portion, and the second region extending to the interface layer, at least one said buried zone being made at least in part out of a second monocrystalline material so as to make it selectively attackable relative to the first and second regions; b) making openings from the surface of the first portion and through the first region, which openings open out to at least one said buried zone; and c) etching at least part of at least one buried zone to form at least one cavity so as to define at least one active element that is at least a portion of the second region between said cavity and said interface layer; wherein the first and second portions of the substrate are constituted respectively from first and second substrates that are assembled together by bonding, at least one of them including at least one said interface layer over at least a fraction of its surface.
摘要翻译：本发明提供一种在至少一个基板上具有有源元件的制造方法和机电装置，该方法具有以下步骤：a）制造具有第一部分，界面层和第二部分的非均相基底，第一部分包括夹在形成于第一单晶材料中的第一和第二区域之间的一个或多个掩埋区域，第一区域延伸到第一部分的表面，第二区域延伸到界面层，至少一个所述掩埋区域至少部分地由第二单晶材料制成，以使其相对于第一和第二区域选择性地具有攻击性; b）从所述第一部分的表面和所述第一区域制造开口，所述第一区域开放到至少一个所述掩埋区域; 以及c）蚀刻至少一个掩埋区域的至少一部分以形成至少一个空腔，以便限定至少一个有源元件，所述至少一个有源元件是所述腔和所述界面层之间的第二区域的至少一部分; 其中所述基板的第一和第二部分分别由通过粘接而组装在一起的第一和第二基板构成，其中至少一个在其表面的至少一部分上包括至少一个所述界面层。

5. 发明申请

US20100029031A1 METHOD OF FABRICATING A MEMS/NEMS ELECTROMECHANICAL COMPONENT 有权
标题翻译：制造MEMS / NEMS电子元件的方法
公开(公告)号：US20100029031A1
公开(公告)日：2010-02-04
申请号：US12488898
申请日：2009-06-22
申请人： François Perruchot , Bernard Diem , Vincent Larrey , Laurent Clavelier , Emmanuel Defay
发明人： François Perruchot , Bernard Diem , Vincent Larrey , Laurent Clavelier , Emmanuel Defay
IPC分类号： H01L21/18
CPC分类号： B81C1/00507 , B81B2201/0271 , B81C2201/0115 , B81C2201/0136 , B81C2201/0177 , B81C2203/0136 , B81C2203/0145 , H03H3/0072 , H03H9/175 , H03H9/2436 , Y10S438/933
摘要： The invention relates to a method of fabricating and electromechanical device on at least one substrate, the device including at least one active element and wherein the method comprises: a) making a heterogeneous substrate comprising a first portion, an interface layer, and a second portion, the first portion including one or more buried zones sandwiched between first and second regions formed in a first monocrystalline material, the first region extending to the surface of the first portion, and the second region extending to the interface layer, at least one said buried zone being made at least in part out of a second monocrystalline material so as to make it selectively attackable relative to the first and second regions; b) making openings from the surface of the first portion and through the first region, which openings open out to at least one said buried zone; and c) etching at least part of at least one buried zone to form at least one cavity so as to define at least one active element that is at least a portion of the second region between a said cavity and said interface layer; and wherein the first and second portions of the substrate are constituted respectively from first and second substrates that are assembled together by bonding, at least one of them including at least one said interface layer over at least a fraction of its surface.
摘要翻译：本发明涉及在至少一个基板上制造和机电装置的方法，所述装置包括至少一个有源元件，并且其中所述方法包括：a）制造包含第一部分，界面层和第二部分，所述第一部分包括被夹在形成于第一单晶材料中的第一和第二区域之间的一个或多个掩埋区域，所述第一区域延伸到所述第一部分的表面，并且所述第二区域延伸到所述界面层，所述第二区域延伸至所述界面层，区域至少部分地由第二单晶材料制成，以使其相对于第一和第二区域选择性地被破坏; b）从所述第一部分的表面和所述第一区域制造开口，所述第一区域开放到至少一个所述掩埋区域; 以及c）蚀刻至少一个掩埋区的至少一部分以形成至少一个空腔，以便限定至少一个有源元件，所述至少一个有源元件是所述空腔和所述界面层之间的所述第二区域的至少一部分; 并且其中所述基底的第一和第二部分分别由通过粘合而组装在一起的第一和第二基底构成，其中至少一个在其表面的至少一部分上包括至少一个所述界面层。

6. 发明申请

US20090317931A1 METHOD OF FABRICATING AN ELECTROMECHANICAL DEVICE INCLUDING AT LEAST ONE ACTIVE ELEMENT 有权
标题翻译：制造包括至少一个活动元件的电气设备的方法
公开(公告)号：US20090317931A1
公开(公告)日：2009-12-24
申请号：US12488882
申请日：2009-06-22
申请人： François Perruchot , Bernard Diem , Vincent Larrey , Laurent Clavelier , Emmanuel Defay
发明人： François Perruchot , Bernard Diem , Vincent Larrey , Laurent Clavelier , Emmanuel Defay
IPC分类号： H01L29/84
CPC分类号： B81C1/00238 , B81B2201/0271 , B81C1/00357 , B81C2201/0115 , B81C2201/014 , B81C2201/0191
摘要： The invention relates to a method of fabricating an electromechanical device including an active element, wherein the method comprises the following steps:a) making a monocrystalline first stop layer on a monocrystalline layer of a first substrate;b) growing a monocrystalline mechanical layer epitaxially on said first stop layer out of at least one material that is different from that of the stop layer;c) making a sacrificial layer on said active layer out of a material that is suitable for being etched selectively relative to said mechanical layer;d) making a bonding layer on the sacrificial layer;e) bonding a second substrate on the bonding layer; andf) eliminating the first substrate and the stop layer to reveal the surface of the mechanical layer opposite from the sacrificial layer, the active element being made by at least a portion of the mechanical layer.
摘要翻译：本发明涉及一种制造包括有源元件的机电装置的方法，其中该方法包括以下步骤：a）在第一衬底的单晶层上制备单晶第一阻挡层; b）在所述第一停止层上外延生长至少一种不同于所述停止层的材料的单晶机械层; c）在适合于相对于所述机械层选择性蚀刻的材料中在所述有源层上制造牺牲层; d）在牺牲层上形成结合层; e）在接合层上粘合第二衬底; 以及f）消除所述第一衬底和所述阻挡层以露出与所述牺牲层相对的所述机械层的表面，所述有源元件由所述机械层的至少一部分制成。

7. 发明申请

US20090321887A1 METHOD OF FABRICATING AN ELECTROMECHANICAL STRUCTURE INCLUDING AT LEAST ONE MECHANICAL REINFORCING PILLAR 审中-公开
标题翻译：制造一个机械结构的机械结构的方法，包括一个机械增强支柱
公开(公告)号：US20090321887A1
公开(公告)日：2009-12-31
申请号：US12488841
申请日：2009-06-22
申请人： Vincent Larrey , François Perruchot , Bernard Diem , Laurent Clavelier , Philippe Robert
发明人： Vincent Larrey , François Perruchot , Bernard Diem , Laurent Clavelier , Philippe Robert
IPC分类号： H01L21/30 , H01L23/58
CPC分类号： H01L29/66007 , B81B2201/0264 , B81C1/00357 , B81C1/00682 , B81C2201/019 , H01L2924/0002 , H01L2924/00
摘要： The invention relates to a method of fabricating an electromechanical structure presenting a first substrate (1) including at least one layer (1′) of monocrystalline material covered in a sacrificial layer (2) that presents a free surface, the structure presenting at least one mechanical reinforcing pillar received in said sacrificial layer, the method being characterized in that it comprises: a) making at least one well region (51, 52) in the sacrificial layer (2) by etching, at least in the entire thickness of the sacrificial layer (2), the well region defining at least one said mechanical pillar; b) depositing a first functionalization layer (4, 31) of a first material, relative to which the sacrificial layer is suitable for being etched selectively, the functionalization layer (4) filling at least one well region (51) at least partially and covering the free surface of the sacrificial layer (2) at least around the well region(s); and b′) depositing a filler layer (6, 32) of a second material different from the first material for terminating the filling of the well region(s) (5′), said filler layer (6) covering the first functionalization layer (4) at least in part around the well region(s) (5′), and planarizing the filler layer (6, 32), the pillar(s) being formed by the superposition of at least the first material and the second material in the well region(s); and releasing the electromechanical structure by removing at least partially the sacrificial layer (2). The invention also relates to an electromechanical structure obtained by the method.
摘要翻译：本发明涉及一种制造机电结构的方法，所述机电结构呈现第一衬底（1），所述第一衬底（1）包括覆盖在呈现自由表面的牺牲层（2）中的至少一层单晶材料层（1'），所述结构呈现至少一个所述方法的特征在于：其包括：a）至少在所述牺牲层的整个厚度中通过蚀刻在所述牺牲层（2）中制造至少一个阱区域（51,52）层（2），所述阱区限定至少一个所述机械支柱; b）沉积第一材料的第一官能化层（4,31），所述第一材料相对于所述第一材料，所述第一材料相对于所述第一材料，所述牺牲层适于被选择性地蚀刻，所述官能化层（4）至少部分填充至少一个阱区域（51）并且覆盖所述牺牲层（2）的至少围绕所述阱区域的自由表面; 和b'）沉积与所述第一材料不同的第二材料的填充层（6,32），以终止所述阱区域（5'）的填充，所述填充层（6）覆盖所述第一官能化层（ 4）至少部分地围绕所述阱区域（5'）周围，并且平坦化所述填充层（6,32），所述柱通过至少所述第一材料和所述第二材料的叠加形成井区; 以及通过至少部分去除所述牺牲层（2）来释放所述机电结构。本发明还涉及通过该方法获得的机电结构。

8. 发明授权

US09106199B2 Acoustic wave device including a surface wave filter and a bulk wave filter, and method for making same 有权
标题翻译：包括表面波滤波器和体波滤波器的声波器件及其制造方法
公开(公告)号：US09106199B2
公开(公告)日：2015-08-11
申请号：US13500614
申请日：2010-10-04
申请人： Chrystel Deguet , Laurent Clavelier , Emmanuel Defay , Alexandre Reinhardt
发明人： Chrystel Deguet , Laurent Clavelier , Emmanuel Defay , Alexandre Reinhardt
IPC分类号： H03H3/08 , H03H3/02 , H03H3/007
CPC分类号： H03H3/08 , H03H3/02 , H03H2003/0071 , Y10T29/42
摘要： An acoustic wave device comprising at least one surface acoustic wave filter and one bulk acoustic wave filter, the device including, on a substrate comprising a second piezoelectric material: a stack of layers including a first metal layer and a layer of a first monocrystalline piezoelectric material, wherein the stack of layers is partially etched so as to define a first area in which the first and second piezoelectric materials are present and a second area in which the first piezoelectric material is absent; a second metallization at the first area for defining the bulk acoustic wave filter integrating the first piezoelectric material, and a third metallization at the second area for defining the surface acoustic wave filter integrating the second piezoelectric material.
摘要翻译：一种声波装置，包括至少一个表面声波滤波器和一个体声波滤波器，该装置包括在包括第二压电材料的基板上，包括第一金属层和第一单晶压电材料层其中，所述层的一部分被部分蚀刻以限定其中存在所述第一和第二压电材料的第一区域和不存在所述第一压电材料的第二区域; 在第一区域处的第二金属化，用于限定集成第一压电材料的体声滤波器，以及在第二区域处的第三金属化，用于限定整合第二压电材料的表面声波滤波器。

9. 发明申请

US20120206216A1 ACOUSTIC WAVE DEVICE INCLUDING A SURFACE WAVE FILTER AND A BULK WAVE FILTER, AND METHOD FOR MAKING SAME 有权
标题翻译：包括表面波浪滤波器和大容量波形滤波器的声波装置及其制造方法
公开(公告)号：US20120206216A1
公开(公告)日：2012-08-16
申请号：US13500614
申请日：2010-10-04
申请人： Chrystel Deguet , Laurent Clavelier , Emmanuel Defay , Alexandre Reinhardt
发明人： Chrystel Deguet , Laurent Clavelier , Emmanuel Defay , Alexandre Reinhardt
IPC分类号： H03H9/205 , H03H3/02
CPC分类号： H03H3/08 , H03H3/02 , H03H2003/0071 , Y10T29/42
摘要： An acoustic wave device comprising at least one surface acoustic wave filter and one bulk acoustic wave filter, the device including, on a substrate comprising a second piezoelectric material: a stack of layers including a first metal layer and a layer of a first monocrystalline piezoelectric material, wherein the stack of layers is partially etched so as to define a first area in which the first and second piezoelectric materials are present and a second area in which the first piezoelectric material is absent; a second metallization at the first area for defining the bulk acoustic wave filter integrating the first piezoelectric material, and a third metallization at the second area for defining the surface acoustic wave filter integrating the second piezoelectric material.
摘要翻译：一种声波装置，包括至少一个表面声波滤波器和一个体声波滤波器，该装置包括在包括第二压电材料的基板上，包括第一金属层和第一单晶压电材料层其中，所述层的一部分被部分蚀刻以限定其中存在所述第一和第二压电材料的第一区域和不存在所述第一压电材料的第二区域; 在第一区域处的第二金属化，用于限定集成第一压电材料的体声滤波器，以及在第二区域处的第三金属化，用于限定整合第二压电材料的表面声波滤波器。

10. 发明授权

US08853785B2 Integrated circuit with electrostatically coupled MOS transistors and method for producing such an integrated circuit 有权
标题翻译：具有静电耦合MOS晶体管的集成电路及其制造方法
公开(公告)号：US08853785B2
公开(公告)日：2014-10-07
申请号：US12868488
申请日：2010-08-25
申请人： Emmanuel Augendre , Maud Vinet , Laurent Clavelier , Perrine Batude
发明人： Emmanuel Augendre , Maud Vinet , Laurent Clavelier , Perrine Batude
IPC分类号： H01L27/088
CPC分类号： H01L27/1104 , H01L21/8221 , H01L27/0688 , H01L27/11
摘要： An integrated circuit including at least: a first MOS transistor; a second MOS transistor, arranged on the first MOS transistor, the second MOS transistor including a channel region in at least one semiconductor layer including two approximately parallel primary faces; a portion of at least one electrically conductive material electrically connected to a gate of the first transistor and arranged between the gate of the first transistor and the channel region of the second transistor; a dielectric layer arranged at least between the portion of the electrically conductive material and the channel region of the second transistor; and a section of the channel region of the second transistor in a plane parallel to the two primary faces of the semiconductor layer is included in a section of the portion of the electrically conductive material projected in said plane.
摘要翻译：一种集成电路，至少包括：第一MOS晶体管; 配置在所述第一MOS晶体管上的第二MOS晶体管，所述第二MOS晶体管在至少一个包含两个近似平行的主面的半导体层中包括沟道区; 至少一个导电材料的一部分电连接到第一晶体管的栅极并且布置在第一晶体管的栅极和第二晶体管的沟道区之间; 至少布置在所述导电材料的所述部分和所述第二晶体管的沟道区之间的电介质层; 并且在与半导体层的两个主面平行的平面中的第二晶体管的沟道区域的一部分被包括在投影在所述平面中的导电材料部分的一部分中。

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