专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明申请

US20120089760A1 Increasing Functionality Of A Reader-Writer Lock 有权
标题翻译：增加读写器锁的功能
公开(公告)号：US20120089760A1
公开(公告)日：2012-04-12
申请号：US13325688
申请日：2011-12-14
申请人： Bratin Saha , Ali-Reza Adl-Tabatabai
发明人： Bratin Saha , Ali-Reza Adl-Tabatabai
IPC分类号： G06F12/00 , G06F12/14
CPC分类号： G06F12/145 , G06F9/4881 , G06F9/526
摘要： In one embodiment, the present invention includes a method for accessing a shared memory associated with a reader-writer lock according to a first concurrency mode, dynamically changing from the first concurrency mode to a second concurrency mode, and accessing the shared memory according to the second concurrency mode. In this way, concurrency modes can be adaptively changed based on system conditions. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，本发明包括一种用于根据第一并发模式访问与读写器锁相关联的共享存储器的方法，该方法从第一并发模式动态地改变到第二并发模式，以及根据所述第一并发模式访问共享存储器第二并发模式。以这种方式，可以根据系统条件自适应地改变并发模式。描述和要求保护其他实施例。

32. 发明申请

US20110145516A1 USING BUFFERED STORES OR MONITORING TO FILTER REDUNDANT TRANSACTIONAL ACCESSES AND MECHANISMS FOR MAPPING DATA TO BUFFERED METADATA 有权
标题翻译：使用缓冲存储器或监视过滤冗余交易访问和将数据映射到缓冲元数据的机制
公开(公告)号：US20110145516A1
公开(公告)日：2011-06-16
申请号：US12638098
申请日：2009-12-15
申请人： Ali-Reza Adl-Tabatabai , Gad Sheaffer , Bratin Saha , Jan Gray , David Callahan , Burton Smith , Graefe Goetz
发明人： Ali-Reza Adl-Tabatabai , Gad Sheaffer , Bratin Saha , Jan Gray , David Callahan , Burton Smith , Graefe Goetz
IPC分类号： G06F12/00
CPC分类号： G06F9/522 , G06F8/458 , G06F9/52 , G06F11/3471 , G06F2201/865 , G06F2201/87
摘要： A method and apparatus for accelerating a Software Transactional Memory (STM) system is herein described. A data object and metadata for the data object may each be associated with a filter, such as a hardware monitor or ephemerally held filter information. The filter is in a first, default state when no access, such as a read, from the data object has occurred during a pendancy of a transaction. Upon encountering a first access to the metadata, such as a first read, access barrier operations, such as logging of the metadata; setting a read monitor; or updating ephemeral filter information with an ephemeral/buffered store operation, are performed. Upon a subsequent/redundant access to the metadata, such as a second read, access barrier operations are elided to accelerate the subsequent access based on the filter being set to the second state to indicate a previous access occurred. Additionally, mapping of data objects to ephemeral information may be provided by software, such as through a pointer to the ephemeral information associated with the data object; an offset from a base address of the data object to the ephemeral information included associated with the data object; an index into a segment containing the ephemeral information associated with the data object; mapping the data object to the ephemeral information utilizing address arithmetic; and a hash that maps the data object to ephemeral information.
摘要翻译：这里描述了用于加速软件事务存储器（STM）系统的方法和装置。数据对象和数据对象的元数据可以分别与诸如硬件监视器或者瞬时保持的过滤器信息的过滤器相关联。过滤器处于第一个默认状态，当事务的挂起期间没有发生来自数据对象的访问，例如读取。在遇到元数据的首次访问时，例如第一读取，访问屏障操作，诸如记录元数据; 设置一个读取监视器; 或者用临时/缓冲存储操作来更新临时过滤器信息。在对诸如第二读取的元数据的后续/冗余访问（例如第二读取）时，消除访问屏障操作以基于被设置为第二状态的过滤器来加速后续访问，以指示先前的访问发生。另外，数据对象到短暂信息的映射可以由软件提供，例如通过指向与数据对象相关联的短暂信息的指针; 从数据对象的基地址到包括与数据对象相关联的临时信息的偏移; 指向包含与数据对象相关联的短暂信息的段的索引; 使用地址算术将数据对象映射到临时信息; 以及将数据对象映射到临时信息的散列。

33. 发明授权

US07958319B2 Hardware acceleration for a software transactional memory system 有权
标题翻译：软件交易内存系统的硬件加速
公开(公告)号：US07958319B2
公开(公告)日：2011-06-07
申请号：US11926423
申请日：2007-10-29
申请人： Bratin Saha , Ali-Reza Adl-Tabatabai , Quinn A. Jacobson
发明人： Bratin Saha , Ali-Reza Adl-Tabatabai , Quinn A. Jacobson
IPC分类号： G06F13/376
CPC分类号： G06F13/4243 , G06F9/3834 , G06F9/466 , G06F9/526
摘要： A method and apparatus for accelerating transactional execution. Barriers associated with shared memory lines referenced by memory accesses within a transaction are only invoked/executed the first time the shared memory lines are accessed within a transaction. Hardware support, such as a transaction field/transaction bits, are provided to determine if an access is the first access to a shared memory line during a pendancy of a transaction. Additionally, in an aggressive operational mode version numbers representing versions of elements stored in shared memory lines are not stored and validated upon commitment to save on validation costs. Moreover, even in a cautious mode, that stores version numbers to enable validation, validation costs may not be incurred, if eviction of accessed shared memory lines do not occur during execution of the transaction.
摘要翻译：一种用于加速事务执行的方法和装置。只有在事务中第一次访问共享内存条时，才会调用/执行与事务中的内存访问引用的共享内存条相关联的障碍。提供诸如事务字段/事务位之类的硬件支持来确定访问是否是在事务挂起期间对共享存储器行的第一次访问。另外，在积极的操作模式中，代表存储在共享存储器行中的元素的版本号的版本号在保存验证成本的承诺时不被存储和验证。而且，即使在谨慎的模式下，存储版本号以启用验证，如果在执行交易期间没有发生访问的共享内存条的驱逐，则可能不会产生验证成本。

34. 发明申请

US20100332753A1 WAIT LOSS SYNCHRONIZATION 有权
标题翻译：等待丢失同步
公开(公告)号：US20100332753A1
公开(公告)日：2010-12-30
申请号：US12493163
申请日：2009-06-26
申请人： Jan Gray , David Callahan , Burton Jordan Smith , Gad Sheaffer , Ali-Reza Adl-Tabatabai , Bratin Saha
发明人： Jan Gray , David Callahan , Burton Jordan Smith , Gad Sheaffer , Ali-Reza Adl-Tabatabai , Bratin Saha
IPC分类号： G06F12/02 , G06F1/32 , G06F12/08
CPC分类号： G06F12/0831 , G06F1/3225
摘要： Synchronizing threads on loss of memory access monitoring. Using a processor level instruction included as part of an instruction set architecture for a processor, a read, or write monitor to detect writes, or reads or writes respectively from other agents on a first set of one or more memory locations and a read, or write monitor on a second set of one or more different memory locations are set. A processor level instruction is executed, which causes the processor to suspend executing instructions and optionally to enter a low power mode pending loss of a read or write monitor for the first or second set of one or more memory locations. A conflicting access is detected on the first or second set of one or more memory locations or a timeout is detected. As a result, the method includes resuming execution of instructions.
摘要翻译：在内存访问监控丢失时同步线程。使用处理器级指令作为处理器，读取或写入监视器的指令集体系结构的一部分而被包括，以分别从第一组一个或多个存储器位置和读取的或其他存储器位置的其他代理检测写入或读取或写入设置在第二组一个或多个不同存储单元上的写监视器。执行处理器级指令，这使得处理器暂停执行指令，并且可选地进入低功率模式，等待丢失第一或第二组一个或多个存储器位置的读或写监视器。在一个或多个存储器位置的第一或第二组上检测到冲突的访问，或者检测到超时。结果，该方法包括恢复指令的执行。

35. 发明申请

US20100229043A1 HARDWARE ACCELERATION FOR A SOFTWARE TRANSACTIONAL MEMORY SYSTEM 有权
标题翻译：用于软件交易存储系统的硬件加速
公开(公告)号：US20100229043A1
公开(公告)日：2010-09-09
申请号：US12782518
申请日：2010-05-18
申请人： Bratin Saha , Ali-Reza Adl-Tabatabai , Wuinn A. Jacobson
发明人： Bratin Saha , Ali-Reza Adl-Tabatabai , Wuinn A. Jacobson
IPC分类号： G06F12/08 , G06F11/28 , G06F12/00
CPC分类号： G06F13/4243 , G06F9/3834 , G06F9/466 , G06F9/526
摘要： A method and apparatus for accelerating transactional execution. Barriers associated with shared memory lines referenced by memory accesses within a transaction are only invoked/executed the first time the shared memory lines are accessed within a transaction. Hardware support, such as a transaction field/transaction bits, are provided to determine if an access is the first access to a shared memory line during a pendancy of a transaction. Additionally, in an aggressive operational mode version numbers representing versions of elements stored in shared memory lines are not stored and validated upon commitment to save on validation costs. Moreover, even in a cautious mode, that stores version numbers to enable validation, validation costs may not be incurred, if eviction of accessed shared memory lines do not occur during execution of the transaction.
摘要翻译：一种用于加速事务执行的方法和装置。只有在事务中第一次访问共享内存条时，才会调用/执行与事务中的内存访问引用的共享内存条相关联的障碍。提供诸如事务字段/事务位之类的硬件支持来确定访问是否是在事务挂起期间对共享存储器行的第一次访问。另外，在积极的操作模式中，代表存储在共享存储器行中的元素的版本号的版本号在保存验证成本的承诺时不被存储和验证。而且，即使在谨慎的模式下，存储版本号以启用验证，如果在执行交易期间没有发生访问的共享内存条的驱逐，则可能不会产生验证成本。

36. 发明申请

US20100218195A1 Software filtering in a transactional memory system 有权
标题翻译：事务存储系统中的软件过滤
公开(公告)号：US20100218195A1
公开(公告)日：2010-08-26
申请号：US12653471
申请日：2009-12-15
申请人： Ali-Reza Adl-Tabatabai , David Callahan , Jan Gray , Vinod Grover , Bratin Saha , Gad Sheaffer
发明人： Ali-Reza Adl-Tabatabai , David Callahan , Jan Gray , Vinod Grover , Bratin Saha , Gad Sheaffer
IPC分类号： G06F9/46
CPC分类号： G06F9/522 , G06F8/458 , G06F9/467
摘要： A method and apparatus for utilizing hardware mechanisms of a transactional memory system is herein described. Various embodiments relate to software-based filtering of operations from read and write barriers and read isolation barriers during transactional execution. Other embodiments relate to software-implemented read barrier processing to accelerate strong atomicity. Other embodiments are also described and claimed.
摘要翻译：这里描述了一种利用事务存储器系统的硬件机制的方法和装置。各种实施例涉及在事务执行期间从读写障碍和读隔离屏障的基于软件的操作过滤。其他实施例涉及软件实现的读屏障处理以加速强原子性。还描述和要求保护其他实施例。

37. 发明申请

US20090172292A1 ACCELERATING SOFTWARE LOOKUPS BY USING BUFFERED OR EPHEMERAL STORES 有权
标题翻译：通过使用缓冲存储或加速存储来加速软件查询
公开(公告)号：US20090172292A1
公开(公告)日：2009-07-02
申请号：US11965143
申请日：2007-12-27
申请人： Bratin Saha , Ali-Reza Adl-Tabatabai , Ethan Schuchman
发明人： Bratin Saha , Ali-Reza Adl-Tabatabai , Ethan Schuchman
IPC分类号： G06F12/08 , G06F12/00 , G06F12/10
CPC分类号： G06F12/1027 , G06F12/0811 , G06F2212/507
摘要： A method and apparatus for accelerating lookups in an address based table is herein described. When an address and value pair is added to an address based table, the value is privately stored in the address to allow for quick and efficient local access to the value. In response to the private store, a cache line holding the value is transitioned to a private state, to ensure the value is not made globally visible. Upon eviction of the privately held cache line, the information is not written-back to ensure locality of the value. In one embodiment, the address based table includes a transactional write buffer to hold addresses, which correspond to tentatively updated values during a transaction. Accesses to the tentative values during the transaction may be accelerated through use of annotation bits and private stores as discussed herein. Upon commit of the transaction, the values are copied to the location to make the updates globally visible.
摘要翻译：这里描述用于加速基于地址的表中的查找的方法和装置。当地址和值对被添加到基于地址的表中时，该值被私人地存储在地址中，以便能够快速高效地本地访问该值。响应于私有存储，保存该值的高速缓存行被转换到私有状态，以确保该值不是全局可见的。撤销私有高速缓存行时，信息不会被写回以确保价值的位置。在一个实施例中，基于地址的表包括用于保存地址的事务写入缓冲器，其对应于事务期间的暂时更新的值。可以通过使用如本文所讨论的注释位和专用存储来加速在事务期间访问临时值。在提交事务时，将将值复制到位置，以使更新全局可见。

38. 发明授权

US07542977B2 Transactional memory with automatic object versioning 失效
标题翻译：具有自动对象版本控制的事务性内存
公开(公告)号：US07542977B2
公开(公告)日：2009-06-02
申请号：US11477848
申请日：2006-06-29
申请人： Richard L. Hudson , Ali-Reza Adl-tabatabai , Bratin Saha
发明人： Richard L. Hudson , Ali-Reza Adl-tabatabai , Bratin Saha
IPC分类号： G06F17/00
CPC分类号： G06F9/467 , G06F12/0253
摘要： Embodiments of a system and method for transactional memory (TM) with automatic object versioning are described. Embodiments described herein include a TM system and method that facilitates the execution of object-oriented application programs in a transactional environment, including automatically versioning objects to enhance efficiency. Embodiments of the TM automatically designate versions of objects using pointers, accurately identifying usable and unusable versions. Object versioning as described herein allows the garbage collector to easily and efficiently determine which objects may be moved, freeing memory space and reducing the number of objects traversed by a transaction before finding a useable version of an object. Other embodiments are described and claimed.
摘要翻译：描述了具有自动对象版本控制的事务存储器（TM）的系统和方法的实施例。本文描述的实施例包括TM系统和方法，其有助于在事务环境中执行面向对象的应用程序，包括自动版本化对象以提高效率。 TM的实施例使用指针自动指定对象的版本，准确地标识可用和不可用的版本。如本文所述的对象版本控制允许垃圾收集器容易且有效地确定哪些对象可能被移动，释放存储器空间并减少事务经过的对象的数量，然后找到对象的可用版本。描述和要求保护其他实施例。

39. 发明申请

US20080270745A1 Hardware acceleration of a write-buffering software transactional memory 有权
标题翻译：写缓冲软件事务内存的硬件加速
公开(公告)号：US20080270745A1
公开(公告)日：2008-10-30
申请号：US11784859
申请日：2007-04-09
申请人： Bratin Saha , Ali-Reza Adl-Tabatabai , Quinn Jacobson
发明人： Bratin Saha , Ali-Reza Adl-Tabatabai , Quinn Jacobson
IPC分类号： G06F9/00
CPC分类号： G06F9/3834 , G06F9/3851 , G06F9/3863 , G06F9/467 , G06F12/0842
摘要： A method and apparatus for accelerating a software transactional memory (STM) system is described herein. Annotation field are associated with lines of a transactional memory. An annotation field associated with a line of the transaction memory is initialized to a first value upon starting a transaction. In response to encountering a read operation in the transaction, then annotation field is checked. If the annotation field includes a first value, the read is serviced from the line of the transaction memory without having to search an additional write space. A second and third value in the annotation field potentially indicates whether a read operation missed the transactional memory or a tentative value is stored in a write space. Additionally, an additional bit in the annotation field, may be utilized to indicate whether previous read operations have been logged, allowing for subsequent redundant read logging to be reduced.
摘要翻译：本文描述了用于加速软件事务存储器（STM）系统的方法和装置。注释字段与事务存储器的行相关联。与事务存储器的行相关联的注释字段在启动事务时被初始化为第一个值。响应于在事务中遇到读取操作，则检查注释字段。如果注释字段包含第一个值，则读取将从事务存储器的行提供服务，而不必搜索额外的写入空间。注释字段中的第二和第三个值潜在地指示读操作是否错过事务存储器或暂存值是否存储在写空间中。此外，注释字段中的另外一个位可以用于指示是否已经记录先前的读取操作，从而允许减少随后的冗余读取记录。

40. 发明申请

US20080098374A1 Method and apparatus for performing dynamic optimization for software transactional memory 有权
标题翻译：用于对软件事务性存储器进行动态优化的方法和装置
公开(公告)号：US20080098374A1
公开(公告)日：2008-04-24
申请号：US11540817
申请日：2006-09-29
申请人： Ali-Reza Adl-tabatabai , Vijay Menon , Richard L. Hudson , Bratin Saha , Tatiana Shpeisman
发明人： Ali-Reza Adl-tabatabai , Vijay Menon , Richard L. Hudson , Bratin Saha , Tatiana Shpeisman
IPC分类号： G06F9/45
CPC分类号： G06F8/447
摘要： A method for managing a transaction includes determining that an optimistically immutable field in the transaction is written to. Invaliding a method in response to determining that the method in the transaction reads is the optimistically immutable field.Other embodiments are disclosed and claimed.
摘要翻译：用于管理交易的方法包括确定事务中的乐观不变字段被写入。响应于确定事务读取中的方法是乐观地不变的字段而无效的方法。公开和要求保护其他实施例。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式