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31. 发明申请

US20070122945A1 Methods of fabricating integrated circuit devices having fuse structures including buffer layers 失效
公开(公告)号：US20070122945A1
公开(公告)日：2007-05-31
申请号：US11699782
申请日：2007-01-30
申请人： Hyun-Chul Kim
发明人： Hyun-Chul Kim
IPC分类号： H01L21/82
CPC分类号： H01L27/10885 , H01L23/5258 , H01L27/10817 , H01L27/10888 , H01L27/10894 , H01L27/10897 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit device is provided including an integrated circuit substrate having a fuse region. A window layer is provided on the integrated circuit substrate that defines a fuse region. The window layer is positioned at an upper portion of the integrated circuit device and recessed beneath a surface of the integrated circuit device. A buffer pattern is provided between the integrated circuit substrate and the window layer and a fuse pattern is provided between the buffer pattern and the window layer. Methods of forming integrated circuit devices are also described.

32. 发明申请

US20060282857A1 Method for providing integrated EPG in dual mode DMB receiver 审中-公开
标题翻译：在双模DMB接收机中提供集成EPG的方法
公开(公告)号：US20060282857A1
公开(公告)日：2006-12-14
申请号：US11449996
申请日：2006-06-09
申请人： Hyun-Chul Kim , Young-Jip Kim , Yun-Je Oh , Ji-Wuck Jung
发明人： Hyun-Chul Kim , Young-Jip Kim , Yun-Je Oh , Ji-Wuck Jung
IPC分类号： H04N5/445 , G06F13/00 , G06F3/00 , H04N7/16
CPC分类号： H04H60/39 , H04H20/72 , H04H20/74 , H04N5/44543 , H04N21/4351 , H04N21/4622 , H04N21/482 , H04N21/6112 , H04N21/6143
摘要： Disclosed is a method for integrating and providing EPG information provided through a terrestrial DMB and a satellite DMB in a dual mode DMB receiver which supports both the terrestrial DMB and the satellite DMB, the method comprising detecting, by the dual mode DMB receiver, the EPG information from the terrestrial DMB and the satellite DMB, generating categories according to ensembles of the terrestrial DMB, and assigning one category to a satellite DMB system, setting the generated categories as an upper layer, and storing EPG information according to each category as a lower layer of the upper layer, and outputting the EPG information according to said each category based on a change in the category, thereby providing an integrated EPG.
摘要翻译：公开了一种用于在支持地面DMB和卫星DMB的双模DMB接收机中通过地面DMB和卫星DMB提供的EPG信息的方法，该方法包括通过双模DMB接收机检测EPG 来自地面DMB和卫星DMB的信息，根据地面DMB的集合生成类别，并将一个类别分配给卫星DMB系统，将生成的类别设置为上层，并将根据每个类别的EPG信息存储为较低层层，并且基于类别的变化根据所述每个类别输出EPG信息，从而提供集成EPG。

33. 发明申请

US20050264838A1 Method and system to print data over network 审中-公开
标题翻译：通过网络打印数据的方法和系统
公开(公告)号：US20050264838A1
公开(公告)日：2005-12-01
申请号：US11111876
申请日：2005-04-22
申请人： Hyun-Chul Kim
发明人： Hyun-Chul Kim
IPC分类号： G06F3/12 , G06F15/00
CPC分类号： H04N1/00204 , H04N1/00244 , H04N1/00973 , H04N1/32128 , H04N2201/0082 , H04N2201/3212
摘要： A method and system to print data over a network include analyzing header information of print data input to the printing device and determining an interpreter corresponding to the print data, requesting from the server in which a plurality of interpreters are stored the determined interpreter, withdrawing the requested interpreter from the server and transmitting the withdrawn interpreter to the printing device, and printing the print data using the received interpreter. Accordingly, the print data can be printed without storing various kinds of interpreters in the printing device, and thus, a memory space needed for the interpreters in the printing device is reduced.
摘要翻译：一种通过网络打印数据的方法和系统包括分析输入到打印设备的打印数据的标题信息，并确定与打印数据相对应的解释器，从其中存储多个解释器的服务器请求确定的解释器，从服务器请求的解释器，并将撤销的解释器发送到打印设备，并使用接收的解释器打印打印数据。因此，打印数据可以打印而不在打印装置中存储各种解释器，因此减少了打印装置中的解释器所需的存储器空间。

34. 发明申请

US20050144559A1 Method and system to selectively print a file 审中-公开
标题翻译：选择打印文件的方法和系统
公开(公告)号：US20050144559A1
公开(公告)日：2005-06-30
申请号：US11020126
申请日：2004-12-27
申请人： Hyun-chul Kim
发明人： Hyun-chul Kim
IPC分类号： G06F3/12 , G06F17/21
CPC分类号： G06F3/125 , G06F3/1205 , G06F3/1284
摘要： A printing system to selectively print a file includes a storage to store an input file, page information extracted from the input file, and a file edited by pages, an operating panel equipment to display the page information by pages to allow the input file stored in the storage to be selectively edited and editing the input file by pages, a control unit to store the input file, the page information and the edited file in the storage and performing control commands inputted through the operating panel equipment, and a printer to convert the edited file into printable data and printing the printable data.
摘要翻译：用于选择性地打印文件的打印系统包括存储输入文件，从输入文件提取的页面信息和由页面编辑的文件的操作面板设备，用于通过页面显示页面信息，以允许输入文件存储在要选择性地编辑的存储器，通过页面编辑输入文件，将输入文件存储的控制单元，页面信息和编辑的文件存储在存储器中，并执行通过操作面板设备输入的控制命令，以及打印机，编辑的文件转换为可打印数据并打印可打印数据。

35. 发明申请

US20050116316A1 Semiconductor device with fuse box and method for fabricating the same 失效
标题翻译：带有保险丝盒的半导体器件及其制造方法
公开(公告)号：US20050116316A1
公开(公告)日：2005-06-02
申请号：US11029830
申请日：2005-01-04
申请人： Hyun-Chul Kim
发明人： Hyun-Chul Kim
IPC分类号： H01L27/02 , H01L23/525 , H01L29/00
CPC分类号： H01L23/5258 , H01L24/05 , H01L2924/12042 , H01L2924/00
摘要： A semiconductor device comprises a semiconductor substrate having a bonding pad region; and a bonding pad and a fuse box formed in the bonding pad region. Thus, the chip size can be reduced and the manufacturing yield can be increased.
摘要翻译：半导体器件包括具有焊盘区域的半导体衬底; 以及形成在焊盘区域中的焊盘和保险丝盒。因此，可以降低芯片尺寸并且可以提高制造产量。

36. 发明授权

US06853050B2 Semiconductor device with fuse box and method for fabricating the same 有权
公开(公告)号：US06853050B2
公开(公告)日：2005-02-08
申请号：US10397905
申请日：2003-03-25
申请人： Hyun-Chul Kim
发明人： Hyun-Chul Kim
IPC分类号： H01L27/02 , H01L23/525 , H01L29/00 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/5258 , H01L24/05 , H01L2924/12042 , H01L2924/00
摘要： A semiconductor device comprises a semiconductor substrate having a bonding pad region; and a bonding pad and a fuse box formed in the bonding pad region. Thus, the chip size can be reduced and the manufacturing yield can be increased.

37. 发明授权

US06518624B2 Trench-gate power semiconductor device preventing latch-up and method for fabricating the same 失效
公开(公告)号：US06518624B2
公开(公告)日：2003-02-11
申请号：US09734016
申请日：2000-12-12
申请人： Hyun-chul Kim , Chong-man Yun , Kyu-hyun Lee , Ju-il Kim
发明人： Hyun-chul Kim , Chong-man Yun , Kyu-hyun Lee , Ju-il Kim
IPC分类号： H01L2976
CPC分类号： H01L29/0696 , H01L29/1095 , H01L29/66348 , H01L29/7397
摘要： A trench-gate power semiconductor device and a method for fabricating the same are provided. The trench-gate power semiconductor device includes a semiconductor substrate of a first conductivity type used as a collector region, a buffer layer of a second conductivity type formed on the semiconductor substrate, a drift region of a second conductivity type formed on the buffer layer, a base region of a first conductivity type formed on the drift region, a gate dielectric layer formed on the surface of a trench which is formed down to a predetermined depth into the drift region and surrounds the base region, a gate electrode formed on the gate dielectric layer, an emitter region of a second conductivity type contacting both the surface of the base region and an upper sidewall of the trench in the base region, the emitter region contains a first emitter region formed so as to be extended to a predetermined length along the sidewall of the trench and to be alternately arranged in the base region and a second emitter region extended to a predetermined length from the first emitter to the center of the base region, an emitter electrode formed so as to be electrically connected to the first emitter region through a part of the second emitter region, and a collector electrode formed so as to be electrically connected to the semiconductor substrate.

38. 发明授权

US09530729B2 Semiconductor devices including insulating extension patterns between adjacent landing pads and methods of fabricating the same 有权
公开(公告)号：US09530729B2
公开(公告)日：2016-12-27
申请号：US14859435
申请日：2015-09-21
申请人： Yong-gyu Choi , Hyun-chul Kim , Seung-hee Ko
发明人： Yong-gyu Choi , Hyun-chul Kim , Seung-hee Ko
IPC分类号： H01L23/522 , H01L23/528 , H01L27/108 , H01L27/02 , H01L21/768
CPC分类号： H01L23/5228 , H01L21/76897 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/10814 , H01L27/10823 , H01L27/10855 , H01L27/10876 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor memory device includes a plurality of pattern structures respectively including a bit line and insulating spacers on sidewalls thereof protruding from a substrate. A plurality of insulating extension patterns are provided on opposing sidewalls of the pattern structures, and respectively extend from upper portions of the opposing sidewalls toward the substrate along the insulating spacers such that lower portions of the opposing sidewalls are free of the extension patterns. A plurality of buried contact patterns are provided on the substrate between the lower portions of the opposing sidewalls of adjacent pattern structures. Related fabrication methods are also discussed.

39. 发明授权

US09165934B2 Semiconductor devices including insulating extension patterns between adjacent landing pads and methods of fabricating the same 有权
标题翻译：包括相邻着陆焊盘之间的绝缘延伸图案的半导体器件及其制造方法
公开(公告)号：US09165934B2
公开(公告)日：2015-10-20
申请号：US14445829
申请日：2014-07-29
申请人： Yong-gyu Choi , Hyun-chul Kim , Seung-hee Ko
发明人： Yong-gyu Choi , Hyun-chul Kim , Seung-hee Ko
IPC分类号： H01L27/108
CPC分类号： H01L23/5228 , H01L21/76897 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/10814 , H01L27/10823 , H01L27/10855 , H01L27/10876 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor memory device includes a plurality of pattern structures respectively including a bit line and insulating spacers on sidewalls thereof protruding from a substrate. A plurality of insulating extension patterns are provided on opposing sidewalls of the pattern structures, and respectively extend from upper portions of the opposing sidewalls toward the substrate along the insulating spacers such that lower portions of the opposing sidewalls are free of the extension patterns. A plurality of buried contact patterns are provided on the substrate between the lower portions of the opposing sidewalls of adjacent pattern structures. Related fabrication methods are also discussed.
摘要翻译：半导体存储器件包括分别包括位线的多个图形结构和从衬底突出的侧壁上的绝缘间隔物。多个绝缘延伸图案设置在图案结构的相对的侧壁上，并且分别从相对的侧壁的上部沿着绝缘间隔件延伸到衬底，使得相对的侧壁的下部分没有扩展图案。在相邻图案结构的相对侧壁的下部之间的衬底上设置多个埋入接触图案。还讨论了相关的制造方法。

40. 发明申请

US20150061154A1 SEMICONDUCTOR DEVICES INCLUDING INSULATING EXTENSION PATTERNS BETWEEN ADJACENT LANDING PADS AND METHODS OF FABRICATING THE SAME 有权
标题翻译：半导体器件，其中包括相邻接线垫之间的绝缘扩展图案及其制造方法
公开(公告)号：US20150061154A1
公开(公告)日：2015-03-05
申请号：US14445829
申请日：2014-07-29
申请人： Yong-Gyu Choi , Hyun-Chul Kim , Seung-hee Ko
发明人： Yong-Gyu Choi , Hyun-Chul Kim , Seung-hee Ko
IPC分类号： H01L23/522 , H01L23/528
CPC分类号： H01L23/5228 , H01L21/76897 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/10814 , H01L27/10823 , H01L27/10855 , H01L27/10876 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor memory device includes a plurality of pattern structures respectively including a bit line and insulating spacers on sidewalls thereof protruding from a substrate. A plurality of insulating extension patterns are provided on opposing sidewalls of the pattern structures, and respectively extend from upper portions of the opposing sidewalls toward the substrate along the insulating spacers such that lower portions of the opposing sidewalls are free of the extension patterns. A plurality of buried contact patterns are provided on the substrate between the lower portions of the opposing sidewalls of adjacent pattern structures. Related fabrication methods are also discussed.
摘要翻译：半导体存储器件包括分别包括位线的多个图形结构和从衬底突出的侧壁上的绝缘间隔物。多个绝缘延伸图案设置在图案结构的相对的侧壁上，并且分别从相对的侧壁的上部沿着绝缘间隔件延伸到衬底，使得相对的侧壁的下部分没有扩展图案。在相邻图案结构的相对侧壁的下部之间的衬底上设置多个埋入接触图案。还讨论了相关的制造方法。

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