专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US06617908B1 Switched-capacitor circuits with reduced distortion 有权
标题翻译：开关电容电路具有减小的失真
公开(公告)号：US06617908B1
公开(公告)日：2003-09-09
申请号：US10104125
申请日：2002-03-22
申请人： Axel Thomsen , Sherry Xiao hong Wu , John Laurence Melanson
发明人： Axel Thomsen , Sherry Xiao hong Wu , John Laurence Melanson
IPC分类号： G06F764
CPC分类号： H03F3/005 , H03F2200/331
摘要： A switched capacitor circuit 300, including a sampling capacitor 303, switches 301, 304 for charging the sampling capacitor 303 during a charging phase, and switches 302, 305 for transferring charge from the sampling capacitor 303 to a load 313 in the feedback loop of an operational amplifier 312 during a dump phase. Circuitry 701 controls the discharge of sampling capacitor 303 during the dump phase to minimize transients at the input of the operational amplifier 312 and thereby minimize input threshold voltage variation.
摘要翻译：包括采样电容器303的开关电容器电路300，用于在充电阶段期间对采样电容器303充电的开关301,304以及用于将电荷从采样电容器303传送到负载313的反馈回路中的开关302,305 运行放大器312。电路701在放电阶段期间控制采样电容器303的放电，以使运算放大器312的输入处的瞬变最小化，从而最小化输入阈值电压变化。

22. 发明授权

US06504412B1 Storage element with switched capacitor 失效
标题翻译：带开关电容器的存储元件
公开(公告)号：US06504412B1
公开(公告)日：2003-01-07
申请号：US09663750
申请日：2000-09-15
申请人： Sriram R. Vangal , Tanay Karnik
发明人： Sriram R. Vangal , Tanay Karnik
IPC分类号： G06F764
CPC分类号： H03K3/013 , H03K3/356191
摘要： A latch includes a pair of inverters cross-coupled between a storage node and a feedback node. A capacitor is conditionally coupled to the feedback node through a pass gate such that the capacitor is coupled to the feedback node when the latch holds data and is not coupled to the feedback node when the latch is loading. The capacitor reduces the latch's susceptibility to soft errors when holding data, and does not appreciably slow the latch when data is loading. The capacitor is implemented using the gate capacitance of complementary transistors. A flip-flop includes cascaded latches, one or more of which have a switched capacitor on a feedback node.
摘要翻译：锁存器包括交叉耦合在存储节点和反馈节点之间的一对反相器。电容器有条件地通过传递门耦合到反馈节点，使得当锁存器保持数据时，电容器耦合到反馈节点，并且当锁存器被加载时，电容器不耦合到反馈节点。当保存数据时，电容会降低锁存器对软错误的敏感性，并且在数据加载时不会明显减慢锁存器的速度。使用互补晶体管的栅极电容来实现电容器。触发器包括级联锁存器，其中一个或多个锁存器在反馈节点上具有开关电容器。

23. 发明授权

US06437629B1 Semiconductor device with circuit for adjusting input/output terminal capacitance 有权
标题翻译：具有用于调节输入/输出端子电容的电路的半导体器件
公开(公告)号：US06437629B1
公开(公告)日：2002-08-20
申请号：US09543333
申请日：2000-04-05
申请人： Sachiko Edo
发明人： Sachiko Edo
IPC分类号： G06F764
CPC分类号： G11C29/02 , G11C29/022 , G11C29/025 , G11C29/028 , G11C2029/5002
摘要： A semiconductor device of the invention comprises: an external terminal; an internal circuit connected to the external terminal; a MOS transistor whose gate terminal or common terminal of the drain and source is connected to the external terminal; and a bonding pad for applying a predetermined voltage to a terminal which is not connected to the external terminal of the MOS transistor.
摘要翻译：本发明的半导体器件包括：外部端子; 连接到外部端子的内部电路; MOS晶体管，其栅极端子或漏极和源极的公共端子连接到外部端子; 以及用于向未连接到MOS晶体管的外部端子的端子施加预定电压的接合焊盘。

24. 发明授权

US06429718B1 Computer tomograph with a multi-stage charge-integrated read amplifier 失效
标题翻译：具有多级电荷集成读取放大器的计算机断层扫描仪
公开(公告)号：US06429718B1
公开(公告)日：2002-08-06
申请号：US09469334
申请日：1999-12-22
申请人： Josef Lauter , Stefan Schneider , Herfried K. Wieczorek
发明人： Josef Lauter , Stefan Schneider , Herfried K. Wieczorek
IPC分类号： G06F764
CPC分类号： H03G3/001
摘要： The invention relates to a computer tomograph provided with a charge-integrating read amplifier having a plurality of gain factors for a data acquisition system as well as a control circuit for the gain factor. In order to avoid noise in addition to the shot noise in computer tomographs of this kind and also to avoid degrading of the DQE (Detection Quantum Efficiency), according to the invention it is proposed that the control circuit automatically selects the gain factor in dependence on the expected integrated input signal of the next frame, the expectation being based on the maximum possible relative variation of the integrated input signal between two successive frames.
摘要翻译：本发明涉及具有电荷积分读取放大器的计算机断层摄影机，该放大器具有用于数据采集系统的多个增益因子以及用于增益因子的控制电路。为了避免这种计算机断层扫描中的散粒噪声以及除了DQE（检测量子效率）的劣化之外的噪声，根据本发明，提出了控制电路根据预期下一帧的积分输入信号，期望是基于两个连续帧之间的积分输入信号的最大可能的相对变化。

25. 发明授权

US06404262B1 Switched capacitor integrator using unity gain buffers 有权
标题翻译：开关电容积分器采用单位增益缓冲器
公开(公告)号：US06404262B1
公开(公告)日：2002-06-11
申请号：US09715661
申请日：2000-11-17
申请人： Krishnaswamy Nagaraj , T. R. Viswanathan
发明人： Krishnaswamy Nagaraj , T. R. Viswanathan
IPC分类号： G06F764
CPC分类号： G06G7/184
摘要： An exemplary electronic circuit of the present include first and second buffers 34 and 38, which are preferably unity gain buffers. A first switch 36 (e.g., a NMOS transistor or a CMOS transmission gate) is coupled between the output of the first buffer 34 and the first terminal of a capacitor 40. The input of the second buffer 38 is also coupled to the first terminal of the capacitor 40. A second switch 42 is coupled between the second terminal of the capacitor 40 and a first voltage node Va and a third switch 44 is coupled between the second terminal of the capacitor 40 and a second voltage node Vb. This circuit can be used as an integrator in a number of applications.
摘要翻译：本发明的示例性电子电路包括第一和第二缓冲器34和38，其优选地是单位增益缓冲器。第一开关36（例如，NMOS晶体管或CMOS传输门）耦合在第一缓冲器34的输出端与电容器40的第一端之间。第二缓冲器38的输入端还耦合到电容器40.第二开关42耦合在电容器40的第二端和第一电压节点Va之间，第三开关44耦合在电容器40的第二端和第二电压节点Vb之间。该电路可用作许多应用中的积分器。

26. 发明授权

US06194946B1 Method and circuit for compensating the non-linearity of capacitors 失效
标题翻译：补偿电容器非线性的方法和电路
公开(公告)号：US06194946B1
公开(公告)日：2001-02-27
申请号：US09074279
申请日：1998-05-07
申请人： Paul Fowers
发明人： Paul Fowers
IPC分类号： G06F764
CPC分类号： G11C27/024 , G06G7/1865
摘要： Capacitor voltage coefficient errors are reduced in a lossy integrator by providing oppositely oriented first and second feedback capacitors in a switched capacitor feedback circuit coupled between the output and a summing conductor connected to an inverting input of an operational amplifier. During a first clock signal, terminals of the first feedback capacitor are coupled to a reference voltage by closing first and second reset switches and the second feedback capacitor is coupled between the inverting input and the output conductor by closing first and second sampling switches. Then, during a second clock signal the terminals of the second feedback capacitor are coupled to the first reference voltage by closing third and fourth reset switches, and the second feedback capacitor is coupled between the inverting input and the output by closing third and fourth sampling switches. The opposed orientations of the first and second feedback capacitors result in time-averaging of opposite polarity voltage coefficient error charge contributions into the inverting input by the first and second feedback capacitors. In one embodiment, data-dependent flow of charge into a “quiet” reference voltage source is avoided by first coupling a capacitor to an auxiliary reference voltage source that is substantially equal to the quiet reference voltage, and later coupling the capacitor to the quiet reference voltage source.
摘要翻译：通过在耦合在输出端和连接到运算放大器的反相输入的求和导体之间的开关电容器反馈电路中提供相反方向的第一和第二反馈电容器，在有损积分器中降低电容器电压系数误差。在第一时钟信号期间，通过关闭第一和第二复位开关将第一反馈电容器的端子耦合到参考电压，并且通过关闭第一和第二采样开关将第二反馈电容器耦合在反相输入端和输出导体之间。然后，在第二时钟信号期间，通过关闭第三和第四复位开关将第二反馈电容器的端子耦合到第一参考电压，并且第二反馈电容器通过关闭第三和第四采样开关而耦合在反相输入和输出之间。第一和第二反馈电容器的相反方向导致由第一和第二反馈电容器对反向输入的相反极性电压系数误差电荷贡献的时间平均。在一个实施例中，通过首先将电容器耦合到基本上等于静态参考电压的辅助参考电压源，然后将电容器耦合到静态参考电压来避免电荷进入“安静”参考电压源的数据相关流动电压源。

27. 发明授权

US06191637B1 Switched capacitor bias circuit for generating a reference signal proportional to absolute temperature, capacitance and clock frequency 有权
标题翻译：开关电容器偏置电路，用于产生与绝对温度，电容和时钟频率成比例的参考信号
公开(公告)号：US06191637B1
公开(公告)日：2001-02-20
申请号：US09263134
申请日：1999-03-05
申请人： Laurence Douglas Lewicki , Shu-Ing Ju
发明人： Laurence Douglas Lewicki , Shu-Ing Ju
IPC分类号： G06F764
CPC分类号： G05F3/245 , G05F3/262
摘要： An integrated switched capacitor bias circuit for generating a reference signal which is proportional to absolute temperature, a capacitance and a clock signal frequency. A current mirror circuit generates a primary current and a mirrored current. Under the control of a clock signal, a switched capacitor circuit uses the mirrored current to constantly accumulate charges on primary capacitor while also alternately sharing such charges with and then discharging one of two additional capacitors. The magnitude of the current drawn by the switched capacitor circuit is a factor of the junction area of a diode and absolute temperature. To maintain equality of the primary and mirrored currents, a node voltage within the current mirror circuit is monitored by a bias circuit which provides a bias signal for controlling the current mirror circuit. An additional current replication stage is driven by the current mirror circuit to provide an additional mirrored current which is proportional to a product of absolute temperature and the frequency of the clock signal.
摘要翻译：一种用于产生与绝对温度成比例的参考信号，电容和时钟信号频率的集成开关电容器偏置电路。电流镜电路产生初级电流和镜像电流。在时钟信号的控制下，开关电容器电路使用镜像电流来恒定地累积主电容器上的电荷，同时还交替地共享这样的电荷，然后将两个附加电容器中的一个放电。由开关电容器电路吸收的电流的大小是二极管的接合面积和绝对温度的一个因素。为了保持初级和镜像电流的相等性，电流镜电路内的节点电压由偏置电路监控，该偏置电路提供用于控制电流镜电路的偏置信号。额外的电流复制级由电流镜电路驱动，以提供与绝对温度和时钟信号频率成正比的附加镜像电流。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式