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21. 发明申请

US20050204220A1 Random number test circuit, random number generation circuit, semiconductor integrated circuit, IC card and information terminal device 审中-公开
标题翻译：随机数测试电路，随机数生成电路，半导体集成电路，IC卡和信息终端设备
公开(公告)号：US20050204220A1
公开(公告)日：2005-09-15
申请号：US11067672
申请日：2005-03-01
申请人： Shinichi Yasuda , Shinobu Fujita , Koichi Fujisaki , Tetsufumi Tanamoto , Keiko Abe
发明人： Shinichi Yasuda , Shinobu Fujita , Koichi Fujisaki , Tetsufumi Tanamoto , Keiko Abe
IPC分类号： G06F7/58 , G01R31/28 , G06F11/00 , G09C1/00 , H03K3/84
CPC分类号： G06F7/58 , G01R31/3181
摘要： A random number test circuit includes a counting unit to count number of repetitions of a certain-value bit in a random number sequence, the repetitions occurring in series, a detecting unit to detect a plurality of numbers corresponding to a kind of bits in the random number sequence, and a determining unit to determine whether the random number sequence is normal, based on the numbers.
摘要翻译：随机数测试电路包括：计数单元，用于对随机数序列中的特定值比特的重复次数进行计数，串联发生的重复;检测单元，用于检测与随机数中的比特种类对应的多个数字数字序列，以及基于该数字确定随机数序列是否正常的确定单元。

22. 发明授权

US08874631B2 Random number generation apparatus 有权
标题翻译：随机数生成装置
公开(公告)号：US08874631B2
公开(公告)日：2014-10-28
申请号：US12504998
申请日：2009-07-17
申请人： Mari Matsumoto , Tetsufumi Tanamoto , Shinichi Yasuda
发明人： Mari Matsumoto , Tetsufumi Tanamoto , Shinichi Yasuda
IPC分类号： G06F1/02 , G06F7/58 , H03B5/08
CPC分类号： G06F7/588
摘要： A random number generation apparatus includes: a random noise generation element comprising a source region and a drain region, a tunnel insulation film, a gate electrode, and a charge trap portion provided between the tunnel insulation film and the gate electrode and being capable of trapping charges, random noise being generated in a drain current flowing between the source region and the drain region on the basis of charges trapped in the charge trap portion; a random number conversion circuit for converting random noise generated from the random noise generation element to a random number; a first test circuit for performing a random number test to test quality of the random number output from the random number conversion circuit; and an initialization circuit for pulling out charges in the charge trap portion of the random noise generation element to the semiconductor substrate through the tunnel insulation film and thereby initializing the charge trap portion.
摘要翻译：随机数生成装置包括：包括源极区域和漏极区域的随机噪声产生元件，隧道绝缘膜，栅极电极和设置在隧道绝缘膜和栅极之间并且能够捕获的电荷陷阱部分电荷，基于俘获在电荷陷阱部分中的电荷在在源极区和漏极区之间流动的漏极电流中产生随机噪声; 随机数转换电路，用于将从随机噪声产生元件产生的随机噪声转换为随机数; 第一测试电路，用于执行随机数测试以测试从随机数转换电路输出的随机数的质量; 以及初始化电路，用于通过隧道绝缘膜将随机噪声发生元件的电荷陷阱部分中的电荷提取到半导体衬底，从而初始化电荷陷阱部分。

23. 发明授权

US08578318B2 Method for implementing circuit design for integrated circuit and computer readable medium 失效
标题翻译：集成电路和计算机可读介质电路设计实现方法
公开(公告)号：US08578318B2
公开(公告)日：2013-11-05
申请号：US13561483
申请日：2012-07-30
申请人： Kumiko Nomura , Shinichi Yasuda , Shinobu Fujita , Keiko Abe , Tetsufumi Tanamoto , Kazutaka Ikegami , Masato Oda
发明人： Kumiko Nomura , Shinichi Yasuda , Shinobu Fujita , Keiko Abe , Tetsufumi Tanamoto , Kazutaka Ikegami , Masato Oda
IPC分类号： G06F17/50
CPC分类号： G06F17/5077 , G06F17/5031 , G06F17/5054 , G06F17/5081
摘要： In one embodiment, a method for implementing a circuit design for an integrated circuit includes: (a) obtaining a first wiring to satisfy a given operating frequency; (b) calculating a maximum bypass wiring length based on the given operating frequency and a critical path of the first wiring; (c) obtaining a second wiring by bypassing the first wiring using wires other than wires of the first wiring in a first wiring group, wherein wiring of the integrated circuit is categorized into a plurality of wiring groups, and the first wiring is included in the first wiring group of the categorized wiring groups; and (d) replacing the first wiring with the second wiring, if a difference between the second wiring and the first wiring is not larger than the maximum bypass wiring length, and not replacing the first wiring if said difference is larger than the maximum bypass wiring length.
摘要翻译：在一个实施例中，一种用于实现集成电路的电路设计的方法包括：（a）获得第一布线以满足给定的工作频率; （b）基于给定的工作频率和第一布线的关键路径计算最大旁路布线长度; （c）通过在第一布线组中使用不同于第一布线的布线的旁路第一布线来获得第二布线，其中集成电路的布线被分类为多个布线组，并且第一布线包括在第一布线中分类布线组的第一接线组; 以及（d）如果所述第二布线和所述第一布线之间的差不大于所述最大旁路布线长度，则用所述第二布线代替所述第一布线，并且如果所述差大于所述最大旁路布线，则不更换所述第一布线长度。

24. 发明授权

US08432186B1 Programmable logic switch 有权
标题翻译：可编程逻辑开关
公开(公告)号：US08432186B1
公开(公告)日：2013-04-30
申请号：US13484639
申请日：2012-05-31
申请人： Koichiro Zaitsu , Kosuke Tatsumura , Mari Matsumoto , Shinichi Yasuda , Masato Oda , Haruka Kusai , Kiwamu Sakuma
发明人： Koichiro Zaitsu , Kosuke Tatsumura , Mari Matsumoto , Shinichi Yasuda , Masato Oda , Haruka Kusai , Kiwamu Sakuma
IPC分类号： H03K19/173
CPC分类号： H03K19/018585 , G11C5/146 , G11C16/10 , G11C16/12 , H03K19/1737
摘要： One embodiment provides a programmable logic switch in which a first nonvolatile memory and a second nonvolatile memory are formed in the same well, and in which to change the first nonvolatile memory from an erased state to a written state and leave the second nonvolatile memory being in the erased state, a first write voltage is applied to a first line connected with gate electrodes of the first and second nonvolatile memories, a second write voltage is applied to a second line connected to a source in the first nonvolatile memory, and a third write voltage lower than the second write voltage is applied to a fourth line connected to a source of the second nonvolatile memory.
摘要翻译：一个实施例提供一种可编程逻辑开关，其中在同一个阱中形成第一非易失性存储器和第二非易失性存储器，并且其中将第一非易失性存储器从擦除状态改变为写入状态，并使第二非易失性存储器处于擦除状态时，将第一写入电压施加到与第一和第二非易失性存储器的栅电极连接的第一线，第二写入电压被施加到连接到第一非易失性存储器中的源极的第二线，并且第三写入低于第二写入电压的电压被施加到连接到第二非易失性存储器的源极的第四线路。

25. 发明申请

US20120075910A1 SEMICONDUCTOR INTEGRATED CIRCUIT 有权
标题翻译：半导体集成电路
公开(公告)号：US20120075910A1
公开(公告)日：2012-03-29
申请号：US13223930
申请日：2011-09-01
申请人： Shinichi Yasuda
发明人： Shinichi Yasuda
IPC分类号： G11C11/00
CPC分类号： G11C13/003 , G11C13/0004 , G11C13/0007 , G11C13/0069 , G11C2213/74 , G11C2213/79
摘要： According to one embodiment, a semiconductor integrated circuit includes first and second resistance change type memory element and first and second switches. The first resistance change type memory element includes a first terminal connected to a first power supply and a second terminal connected to a first node. The second resistance change type memory element includes a third terminal connected to the first node and a fourth terminal connected to a second power supply. The first switch includes one end of a first current path connected to a first program power supply and the other end of the first current path connected to the first node. The second switch includes one end of a second current path connected to the first node and the other end of the second current path connected to a second program power supply.
摘要翻译：根据一个实施例，半导体集成电路包括第一和第二电阻变化型存储元件以及第一和第二开关。第一电阻变化型存储元件包括连接到第一电源的第一端子和连接到第一节点的第二端子。第二电阻变化型存储元件包括连接到第一节点的第三端子和连接到第二电源的第四端子。第一开关包括连接到第一程序电源的第一电流通路的一端和连接到第一节点的第一电流通路的另一端。第二开关包括连接到第一节点的第二电流路径的一端和连接到第二节目电源的第二电流路径的另一端。

26. 发明授权

US07772905B2 Semiconductor integrated circuit apparatus 失效
标题翻译：半导体集成电路装置
公开(公告)号：US07772905B2
公开(公告)日：2010-08-10
申请号：US11859878
申请日：2007-09-24
申请人： Shinichi Yasuda , Keiko Abe
发明人： Shinichi Yasuda , Keiko Abe
IPC分类号： H03K3/289
CPC分类号： H03K3/0375
摘要： It is made possible to provide a flip-flop circuit capable of implementing the error correction function with a small area increase as far as possible and a pipeline system using such a flip-flop circuit. A flip-flop circuit includes: a flip-flop configured to operate based on a rising edge or a falling edge of a first clock signal; a decision circuit configured to compare an input of the flip-flop with an output thereof and output a request signal when the input of the flip-flop is different from the output thereof; and a control circuit configured to receive a second clock signal from outside and generate the first clock signal and a confirmation signal. When the request signal is sent from the decision circuit after the flip-flop has been activated, the control circuit inverts the first clock signal, sends the confirmation to the decision circuit, and makes the decision circuit cancel the request signal.
摘要翻译：可以提供一种能够尽可能地实现小面积增加的误差校正功能的触发器电路和使用这种触发器电路的流水线系统。触发器电路包括：触发器，被配置为基于第一时钟信号的上升沿或下降沿进行操作; 判定电路，被配置为当触发器的输入与其输出不同时，将触发器的输入与其输出进行比较并输出请求信号; 以及控制电路，被配置为从外部接收第二时钟信号并产生第一时钟信号和确认信号。当在触发器被激活之后请求信号从判定电路发送时，控制电路使第一时钟信号反相，将确认发送到判定电路，并使判定电路取消请求信号。

27. 发明授权

US07703700B2 Rotary atomizing-head type coating machine 有权
标题翻译：旋转雾化头式涂布机
公开(公告)号：US07703700B2
公开(公告)日：2010-04-27
申请号：US11814090
申请日：2006-03-09
申请人： Shinichi Yasuda
发明人： Shinichi Yasuda
IPC分类号： B05B3/10 , B44D5/10 , F23D11/04 , B05D3/00 , B05D1/24 , B05D5/00
CPC分类号： B05B5/04 , B05B3/001 , B05B3/1064 , B05B5/001 , B05B5/0407 , B05B5/0415 , B05B5/0426 , B05B13/0431
摘要： A rotary atomizing-head type coating machine, wherein a paint passage for flowing a paint to a rotary atomizing-head, a turbine air passage flowing a turbine air to the turbine of an air motor, a discharge air passage for flowing the turbine air after driving the turbine to the outside in the form of a discharge air, and a heat insulating air discharge passage of a heat insulated air passage axially extending while surrounding the discharge air passage and allowing hot heat insulated air to flow therein are formed in the bottom part of a housing body forming a housing. Thus, even if the turbine air expanded in a heat insulated state and reduced in temperature flows in the discharge air passage, the housing can be prevented from being cooled by the discharge air by flowing a heat insulated air with a temperature higher than that of the discharge air in the heat insulated air discharge passage.
摘要翻译：一种旋转雾化头型涂布机，其特征在于，将涂料流向旋转雾化头，将涡轮空气流向空气马达的涡轮的涡轮空气通道，用于使涡轮空气流过的排气通道，将涡轮机以排气的形式驱动到外部，并且在包围排气通道并且允许热绝热空气流动的同时轴向延伸的绝热空气通道的隔热空气排出通道形成在底部形成壳体的壳体。因此，即使在隔热状态膨胀并且温度降低的涡轮机空气在排出空气通道中流动，也可以通过使隔热空气的温度高于在绝热空气排出通道中排出空气。

28. 发明申请

US20100057820A1 RANDOM NUMBER GENERATION APPARATUS 有权
标题翻译：随机数生成装置
公开(公告)号：US20100057820A1
公开(公告)日：2010-03-04
申请号：US12504998
申请日：2009-07-17
申请人： Mari Matsumoto , Tetsufumi Tanamoto , Shinichi Yasuda
发明人： Mari Matsumoto , Tetsufumi Tanamoto , Shinichi Yasuda
IPC分类号： G06F7/58
CPC分类号： G06F7/588
摘要： A random number generation apparatus includes: a random noise generation element comprising a source region and a drain region, a tunnel insulation film, a gate electrode, and a charge trap portion provided between the tunnel insulation film and the gate electrode and being capable of trapping charges, random noise being generated in a drain current flowing between the source region and the drain region on the basis of charges trapped in the charge trap portion; a random number conversion circuit for converting random noise generated from the random noise generation element to a random number; a first test circuit for performing a random number test to test quality of the random number output from the random number conversion circuit; and an initialization circuit for pulling out charges in the charge trap portion of the random noise generation element to the semiconductor substrate through the tunnel insulation film and thereby initializing the charge trap portion.
摘要翻译：随机数生成装置包括：包括源极区域和漏极区域的随机噪声产生元件，隧道绝缘膜，栅极电极和设置在隧道绝缘膜和栅极之间并且能够捕获的电荷陷阱部分电荷，基于俘获在电荷陷阱部分中的电荷在在源极区和漏极区之间流动的漏极电流中产生随机噪声; 随机数转换电路，用于将从随机噪声产生元件产生的随机噪声转换为随机数; 第一测试电路，用于执行随机数测试以测试从随机数转换电路输出的随机数的质量; 以及初始化电路，用于通过隧道绝缘膜将随机噪声发生元件的电荷陷阱部分中的电荷提取到半导体衬底，从而初始化电荷陷阱部分。

29. 发明申请

US20090177725A1 RANDOM NUMBER GENERATION DEVICE 有权
标题翻译：随机数生成装置
公开(公告)号：US20090177725A1
公开(公告)日：2009-07-09
申请号：US12212205
申请日：2008-09-17
申请人： Kazutaka IKEGAMI , Shinichi Yasuda
发明人： Kazutaka IKEGAMI , Shinichi Yasuda
IPC分类号： G06F7/58
CPC分类号： G06F7/588 , H03K3/0315 , H03K3/84
摘要： It is made possible to provide a random number generation device which generates a physical random number with as little power dissipation as possible. A random number generation device includes: a ring oscillator having at least one set, each set comprising a current noise source and a Schmitt inverter configured to receive an output of the current noise source; and a conversion circuit configured to convert output frequency fluctuation of the ring oscillator to a random number and output the random number.
摘要翻译：可以提供尽可能少的功率消耗来生成物理随机数的随机数生成装置。随机数生成装置包括：环形振荡器，其具有至少一组，每组包括电流噪声源，施密特反相器被配置为接收当前噪声源的输出; 以及转换电路，被配置为将环形振荡器的输出频率波动转换为随机数，并输出随机数。

30. 发明申请

US20080243978A1 RANDOM NUMBER GENERATOR 审中-公开
标题翻译：随机数发电机
公开(公告)号：US20080243978A1
公开(公告)日：2008-10-02
申请号：US12050079
申请日：2008-03-17
申请人： Shinichi Yasuda , Keiko Abe , Tetsufumi Tanamoto , Kumiko Nomura
发明人： Shinichi Yasuda , Keiko Abe , Tetsufumi Tanamoto , Kumiko Nomura
IPC分类号： G06F7/58
CPC分类号： G06F7/588
摘要： A random number generator includes an amplifier to amplify a difference between a noise signal and a reference signal to generate an amplified signal, a plurality of binarization circuits configured to binarize the amplified signal by using different inherent threshold values to obtain a plurality of binarized signals, and an exclusive OR circuit to perform an exclusive OR operation on the a plurality of binarized signals to generate random number sequence.
摘要翻译：随机数发生器包括：放大器，用于放大噪声信号和参考信号之间的差以产生放大信号;多个二值化电路，被配置为通过使用不同的固有阈值二值化放大的信号，以获得多个二值化信号; 以及异或电路，对多个二值化信号进行异或运算，生成随机数序列。

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