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21. 发明授权

US06501110B1 Semiconductor memory cell 失效
标题翻译：半导体存储单元
公开(公告)号：US06501110B1
公开(公告)日：2002-12-31
申请号：US09552617
申请日：2000-04-19
申请人： Mikio Mukai , Toshio Kobayashi , Yutaka Hayashi
发明人： Mikio Mukai , Toshio Kobayashi , Yutaka Hayashi
IPC分类号： H01L2976
CPC分类号： G11C11/405
摘要： A semiconductor memory cell comprising a first transistor for readout, a second transistor for switching, and having a first region, a second region formed in a surface region of the first region, a third region formed in a surface region of the second region, a fourth region formed in a surface region of the first region and spaced from the second region, a fifth region formed in a surface region of the fourth region, and a gate region, wherein when the semiconductor memory cell is cut with a first imaginary perpendicular plane which is perpendicular to the extending direction of the gate region and passes through the center of the gate region, the second region and the fourth region in the vicinity of the gate region are nearly symmetrical with respect to a second imaginary perpendicular plane which is in parallel with the extending direction of the gate region and passes through the center of the gate region.
摘要翻译：一种半导体存储单元，包括用于读出的第一晶体管，用于切换的第二晶体管，并且具有第一区域，形成在所述第一区域的表面区域中的第二区域，形成在所述第二区域的表面区域中的第三区域，第四区域形成在第一区域的表面区域中并且与第二区域隔开，形成在第四区域的表面区域中的第五区域和栅极区域，其中当半导体存储单元被切割成第一虚拟垂直平面其垂直于栅极区域的延伸方向并且通过栅极区域的中心，栅极区域附近的第二区域和第四区域相对于并联的第二假想垂直平面几乎对称与栅极区域的延伸方向并通过栅极区域的中心。

22. 发明授权

US06426790B1 Stage apparatus and holder, and scanning exposure apparatus and exposure apparatus 失效
标题翻译：舞台装置和支架，以及扫描曝光装置和曝光装置
公开(公告)号：US06426790B1
公开(公告)日：2002-07-30
申请号：US09514584
申请日：2000-02-28
申请人： Yutaka Hayashi
发明人： Yutaka Hayashi
IPC分类号： G03B2758
CPC分类号： G03F7/7095 , G03F7/70358 , G03F7/70725 , G03F7/70775 , G03F7/70833
摘要： A stage apparatus of the invention comprises: a holder for holding a substrate, and a position detection device for detecting a position of the substrate, based on reflected light from a mobile mirror provided at a predetermined positional relationship with the holder. The holder and a base material of the mobile mirror consist of ceramics having a coefficient of thermal expansion of 1×10−6/° C. or less. With such an apparatus, costs related to temperature control can be reduced.
摘要翻译：本发明的舞台装置包括：基于用于保持衬底的保持器和用于基于与保持器以预定位置关系设置的来自移动镜的反射光来检测衬底的位置的位置检测装置。移动镜的支架和基材由具有1×10-6 /℃或更低的热膨胀系数的陶瓷组成。利用这样的装置，可以降低与温度控制有关的成本。

23. 发明授权

US06285546B1 Mounting structure for electronic device 失效
标题翻译：电子设备的安装结构
公开(公告)号：US06285546B1
公开(公告)日：2001-09-04
申请号：US09450380
申请日：1999-11-29
申请人： Michihito Watarai , Yutaka Hayashi , Mitsuo Miyamoto , Kazuhiro Matsuo , Eiji Kadomoto , Koji Nakayama , Akihiro Sakurai , Shigeyasu Tsubaki
发明人： Michihito Watarai , Yutaka Hayashi , Mitsuo Miyamoto , Kazuhiro Matsuo , Eiji Kadomoto , Koji Nakayama , Akihiro Sakurai , Shigeyasu Tsubaki
IPC分类号： H05K720
CPC分类号： H05K7/20736
摘要： An electronic device has a frame and a back board having plural logical units and power supply units mounted thereon. The logical units and the power supply units are alternately located on both sides of the back board in the center of the frame so that the power supply units mounted on one side of the back board may feed a power to the closest logical units mounted on the other side. Further, the air flow paths to be circulated through the logical units and the power supply units are formed so that each unit may be efficiently cooled by the air fed by an air fan unit. As a result, the feeding voltage becomes uniform and the cooling efficiency is improved.
摘要翻译：电子设备具有框架和背板，其具有多个逻辑单元和安装在其上的电源单元。逻辑单元和电源单元交替地位于框架中心的背板的两侧，使得安装在背板的一侧上的电源单元可以将电力馈送到安装在背板上的最接近的逻辑单元另一边。此外，通过逻辑单元和电源单元循环的空气流动路径被形成为使得每个单元可以被由空气风扇单元供给的空气有效地冷却。结果，供电电压变得均匀，并且提高了冷却效率。

24. 发明授权

US06255166B1 Nonvolatile memory cell, method of programming the same and nonvolatile memory array 有权
标题翻译：非易失性存储单元，编程相同的非易失性存储器阵列的方法
公开(公告)号：US06255166B1
公开(公告)日：2001-07-03
申请号：US09473031
申请日：1999-12-28
申请人： Seiki Ogura , Yutaka Hayashi
发明人： Seiki Ogura , Yutaka Hayashi
IPC分类号： H01L21336
CPC分类号： H01L21/28202 , G11C16/0466 , G11C16/0475 , H01L21/28282 , H01L27/115 , H01L27/12 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66833 , H01L29/792
摘要： Provided in the present invention are a high speed and low program voltage nonvolatile memory cell, a programming method for same and a nonvolatile memory array. A nonvolatile memory cell comprises a first gate insulator formed on a surface of a first channel forming semiconductor region adjacent to a source region; a second gate insulator formed on a surface of a second channel forming semiconductor region adjacent to a drain region; a first gate electrode formed on said first gate insulator; and a second gate electrode formed on said second gate insulator wherein the second gate insulator includes a first layer forming a potential barrier at the interface with the second channel forming region; a third layer forming a potential barrier at the interface with the second gate electrode and the second layer between the first and third layers forming a carrier trapping level.
摘要翻译：在本发明中提供了一种高速和低编程电压的非易失性存储单元，一种用于其的编程方法和一种非易失性存储器阵列。非易失性存储单元包括形成在与源极区域相邻的形成半导体区域的第一沟道的表面上的第一栅极绝缘体; 形成在与漏极区相邻的形成半导体区域的第二沟道的表面上的第二栅极绝缘体; 形成在所述第一栅极绝缘体上的第一栅电极; 以及形成在所述第二栅极绝缘体上的第二栅电极，其中所述第二栅绝缘体包括在与所述第二沟道形成区的界面处形成势垒的第一层; 在与第二栅电极的界面处形成势垒的第三层和形成载流子俘获电平的第一和第三层之间的第二层。

25. 发明授权

US5825064A Semiconductor volatile/nonvolatile memory 失效
标题翻译：半导体易失性/非易失性存储器
公开(公告)号：US5825064A
公开(公告)日：1998-10-20
申请号：US25822
申请日：1993-03-03
申请人： Yutaka Hayashi , Yoshikazu Kojima , Ryoji Takada , Masaaki Kamiya
发明人： Yutaka Hayashi , Yoshikazu Kojima , Ryoji Takada , Masaaki Kamiya
IPC分类号： G11C17/00 , G11C11/56 , G11C14/00 , G11C16/04 , G11C27/00 , H01L21/8246 , H01L21/8247 , H01L27/105 , H01L29/788 , H01L29/792 , H01L29/76
CPC分类号： G11C27/005 , G11C11/5621 , G11C11/5628 , G11C11/5642 , G11C14/00
摘要： The semiconductor nonvolatile memory has integrated memory cells, each being operative to carry out writing and reading of information in random-access basis and having an electric charge storage structure effective to memorize the information in nonvolatile state. The information is temporarily written into each memory cell in volatile state, and thereafter the temporarily written information is written at one into the respective electric charge storage structure of each memory cell, thereby effecting quick writing of nonvolatile information into the respective memory cells of multi-bits.
摘要翻译：半导体非易失性存储器具有集成存储单元，每个存储单元可操作以在随机存取的基础上进行信息的写入和读取，并且具有有效地将信息存储在非易失性状态的电荷存储结构。该信息以易失性状态临时写入每个存储单元，之后将临时写入的信息一个写入每个存储单元的各个电荷存储结构中，从而将非易失性信息快速写入到多个存储单元的各个存储单元中，位。

26. 发明授权

US5627781A Nonvolatile semiconductor memory 失效
标题翻译：非易失性半导体存储器
公开(公告)号：US5627781A
公开(公告)日：1997-05-06
申请号：US555144
申请日：1995-11-08
申请人： Yutaka Hayashi , Machio Yamagishi
发明人： Yutaka Hayashi , Machio Yamagishi
IPC分类号： G11C17/00 , G11C7/06 , G11C16/04 , G11C16/06 , G11C16/28 , G11C7/00 , G11C8/00
CPC分类号： G11C16/28 , G11C7/062
摘要： A rewritable nonvolatile semiconductor memory device having a plurality of memory cells which are electrically and reversably variable in threshold values and one pair of reference cells, provided for each predetermined number of memory cells, having the same cross-sectional structure as the memory cells, the pair of reference cells having written in them data of opposite phases, and, at the time of reading, the currents of the pair of reference cells being combined to produce a reference current and the data being determined by comparing this with the signal current of the memory cell.
摘要翻译：一种可重写的非易失性半导体存储器件，其具有多个存储单元，所述多个存储单元电流可逆地以阈值变化，并且为每个预定数量的存储单元提供一对参考单元，具有与存储单元相同的横截面结构，在其中写入了相反相位数据的参考单元对，并且在读取时，组合的一对参考单元的电流产生参考电流，并且通过将数据与该参考单元的信号电流进行比较来确定数据记忆单元

27. 发明授权

US5595525A Numerically controlled grinding machine 失效
标题翻译：数控磨床
公开(公告)号：US5595525A
公开(公告)日：1997-01-21
申请号：US541426
申请日：1995-10-10
申请人： Yutaka Hayashi , Makoto Nonoyama
发明人： Yutaka Hayashi , Makoto Nonoyama
IPC分类号： B23Q15/00 , B24B47/20 , B24B49/04 , B24B51/00 , G05B19/409 , B24B49/00
CPC分类号： B24B51/00 , B24B49/04 , G05B19/409 , G05B2219/36064 , G05B2219/36065 , G05B2219/36066 , G05B2219/36077 , G05B2219/36088 , G05B2219/36196 , G05B2219/36223 , G05B2219/43158
摘要： A numerically controlled grinding machine of the present invention grinds a cylindrical surface of a workpiece by a relative movement between the workpiece and a grinding wheel. The grinding conditions such as a grinding method and a finishing diameter of the workpiece are inputted so that data necessary for grinding the Workpiece are automatically determined in dependence upon the grinding conditions. The automatically determined grinding data are displayed on a display means. The grinding data displayed on the display means are modified by one of the four rules of arithmetic. The modification are carried out in accordance with a compensation rate set by override switch and the like or a compensation value inputted by a key operation.
摘要翻译：本发明的数控磨床通过工件和砂轮之间的相对移动来研磨工件的圆柱形表面。输入研磨条件，例如研磨方法和工件的精加工直径，使得根据研磨条件自动确定研磨工件所需的数据。自动确定的磨削数据显示在显示装置上。显示在显示装置上的磨削数据由四个算术规则中的一个修改。根据由超控开关等设定的补偿率或通过键操作输入的补偿值进行修改。

28. 发明授权

US5271187A Numerically controlled grinding machine 失效
标题翻译：数控磨床
公开(公告)号：US5271187A
公开(公告)日：1993-12-21
申请号：US766214
申请日：1991-09-27
申请人： Takao Yoneda , Yasuji Sakakibara , Moriaki Sakakura , Naoki Arimoto , Mamoru Katsuta , Yutaka Hayashi , Masashi Yamanaka
发明人： Takao Yoneda , Yasuji Sakakibara , Moriaki Sakakura , Naoki Arimoto , Mamoru Katsuta , Yutaka Hayashi , Masashi Yamanaka
IPC分类号： B24B51/00 , B24B53/00 , G05B19/404 , G05B19/4065
CPC分类号： B24B51/00 , B24B53/00 , G05B19/404 , G05B19/4065 , G05B2219/45159 , G05B2219/49391 , G05B2219/50308
摘要： An apparatus capable of automatically determining grinding wheel dressing timing for dressing a grinding wheel. The apparatus estimates the abrasion of the grinding wheel in a grinding cycle on the basis of machining data and grinding conditions, and divides the grinding cycle into a plurality of stages according to the estimated abrasion to carry out grinding wheel dressing after the completion of every stage of the grinding cycle. In grinding a workpiece having a plurality of ground sections, the abrasion of the grinding wheel in grinding each ground section is estimated, and the abrasion is accumulated in accordance with grinding sequence. A ground section after grinding which grinding wheel dressing is to be carried out is determined on the basis of the cumulative abrasion. Similarly, the abrasions are accumulated for each of workpieces. A grinding wheel dressing is carried out after the completion of grinding a workpiece so that the cumulative abrasion may not exceed a predetermined value.

29. 发明授权

US5235542A Apparatus for converting optical information into electrical information signal, information storage element and method for storing information in the information storage element 失效
标题翻译：用于将光学信息转换成电信息信号的装置，用于将信息存储在信息存储元件中的信息存储元件和方法
公开(公告)号：US5235542A
公开(公告)日：1993-08-10
申请号：US776642
申请日：1991-10-15
申请人： Yutaka Hayashi , Iwao Hamaguchi , Shunsuke Fujita
发明人： Yutaka Hayashi , Iwao Hamaguchi , Shunsuke Fujita
IPC分类号： H01L27/146
CPC分类号： H01L27/14643
摘要： An apparatus for converting optical information into an electrical information signal includes a plurality of one-dimensional conversion arrays arranged in parallel form. Each one-dimensional conversion array has first and second photoelectric conversion structures integrally formed. The first photoelectric conversion structure has photoelectric conversion elements each having a light receiving surface onto which an information light is projected. The second photoelectric conversion structure has photoelectric conversion elements each having a sweep light receiving surface onto which a sweep light is projected. The sweep light has a cross section which simultaneously scans the sweep light receiving surface of one of the photoelectric conversion elements included in each of the one-dimensional conversion arrays. The electrical information signal is read out from the photoelectric conversion elements provided in the first photoelectric conversion structure when the sweep light is projected onto the photoelectric conversion elements provided in the second photoelectric conversion structure.
摘要翻译：用于将光学信息转换为电信息信号的装置包括以并行形式布置的多个一维转换阵列。每一维转换阵列具有一体形成的第一和第二光电转换结构。第一光电转换结构具有各自具有投影信息光的受光面的光电转换元件。第二光电转换结构具有光电转换元件，每个光电转换元件具有投射有扫描光的扫掠光接收表面。扫描光具有同时扫描包括在每个一维转换阵列中的一个光电转换元件的扫描光接收表面的横截面。当扫描光投射到设置在第二光电转换结构中的光电转换元件上时，从设置在第一光电转换结构中的光电转换元件读出电信息信号。

30. 发明授权

US5232868A Method for forming a thin semiconductor film 失效
标题翻译：薄半导体膜的形成方法
公开(公告)号：US5232868A
公开(公告)日：1993-08-03
申请号：US742101
申请日：1991-08-05
申请人： Yutaka Hayashi , Mitsuyuki Yamanaka
发明人： Yutaka Hayashi , Mitsuyuki Yamanaka
IPC分类号： H01L21/205 , H01L31/20
CPC分类号： H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L31/204 , Y02E10/50 , Y02P70/521 , Y10S148/051 , Y10S148/109
摘要： A method for forming a thin semiconductor film comprises the steps of supplying on a surface of a heated substrate a first material gas composed of germanium halide or germanium hydro-fluoride obtained by partially substituting fluorine of the germanium fluoride together with a second material gas composed of silicon hydride or silicon fluoro-hydride obtained by partially substituting hydrogen of the silicon hydride with fluorine and causing a chemical reaction between the first and second material gases, thereby growing a thin film containing germanium over the surface of the substrate. By controlling the substrate temperature or flow rate ratio of the first material gas to the second material gas, an optical gap of the thin film grown can be controlled.
摘要翻译：一种形成薄半导体膜的方法包括以下步骤：在被加热衬底的表面上提供由锗卤化物或氟化锗制成的第一材料气体，所述第一材料气体通过部分地将氟化锗氟化物与由氢化硅或氟化氢氢化物，其通过用氟部分地氢化硅氢化物并且引起第一和第二材料气体之间的化学反应而获得，从而在衬底的表面上生长含有锗的薄膜。通过控制第一原料气体与第二原料气体的基板温度或流速比，可以控制生长的薄膜的光学间隙。

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