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21. 发明授权

US06713975B2 Lighting apparatus, lighting control system and home electric appliance 有权
标题翻译：照明设备，照明控制系统和家用电器
公开(公告)号：US06713975B2
公开(公告)日：2004-03-30
申请号：US09915365
申请日：2001-07-27
申请人： Tatsumi Yamauchi , Fumio Murabayashi , Haruki Komatsu , Akio Inada
发明人： Tatsumi Yamauchi , Fumio Murabayashi , Haruki Komatsu , Akio Inada
IPC分类号： G05F100
CPC分类号： H05B37/0254 , H05B37/0245 , Y02B20/40
摘要： A lighting apparatus capable of improving amenity and energy-saving and controlling a lighting load as a user intends to do. The lighting apparatus is connected to a network and controlling the lighting load corresponding to information from the network, and the lighting apparatus further comprises an automatic mode for controlling the lighting load corresponding to the information from the network, a manual mode for controlling the lighting load independently of the information from the network, and a switching means for switching between the automatic mode and the manual mode.
摘要翻译：一种照明装置，其能够改善舒适性和节能性并且控制用户打算做的照明负载。照明装置连接到网络并控制与来自网络的信息相对应的照明负载，并且照明装置还包括用于控制与来自网络的信息相对应的照明负载的自动模式，用于控制照明负载的手动模式独立于来自网络的信息，以及用于在自动模式和手动模式之间切换的切换装置。

22. 发明授权

US06437621B2 Waveform shaping device 失效
标题翻译：波形整形装置
公开(公告)号：US06437621B2
公开(公告)日：2002-08-20
申请号：US09816100
申请日：2001-03-26
申请人： Kazuo Kato , Takashi Sase , Takashi Hotta , Fumio Murabayashi
发明人： Kazuo Kato , Takashi Sase , Takashi Hotta , Fumio Murabayashi
IPC分类号： H03K317
CPC分类号： C08K5/5419 , C08G77/442 , C08G77/50 , C08L27/12 , C08L69/00
摘要： A waveform shaping circuit is provided so that the duty factor of clock pulses can be set to 50% with high accuracy even if the clock pulses are of a low voltage and a high frequency. An inverter which receives the clock pulses through an alternating current coupling capacitor is provided with a non-linear limiter element for limiting an amplitude of an output symmetrically on positive and negative sides thereof. A first current-limiting impedance and a second current-limiting impedance are connected between a power supply side terminal of the inverter and a power supply bus and between a grounding side terminal of the inverter and a grounding bus, respectively.
摘要翻译：提供波形整形电路，使得即使时钟脉冲是低电压和高频率，时钟脉冲的占空因数也可以高精度地设置为50％。通过交流耦合电容器接收时钟脉冲的逆变器设置有非线性限制器元件，用于在其正侧和负侧对称地限制输出的幅度。逆变器的电源侧端子与电源总线之间以及逆变器的接地侧端子与接地母线之间分别连接有第一限流阻抗和第二限流阻抗。

23. 发明授权

US6101627A Information processing system and logic LSI, detecting a fault in the system or the LSI, by using internal data processed in each of them 失效
标题翻译：信息处理系统和逻辑LSI，通过使用它们中的每一个处理的内部数据来检测系统或LSI中的故障
公开(公告)号：US6101627A
公开(公告)日：2000-08-08
申请号：US206153
申请日：1998-12-07
申请人： Tetsuya Shimomura , Fumio Murabayashi , Kotaro Shimamura , Nobuyasu Kanekawa , Takashi Hotta
发明人： Tetsuya Shimomura , Fumio Murabayashi , Kotaro Shimamura , Nobuyasu Kanekawa , Takashi Hotta
IPC分类号： G06F11/16 , G06F11/18 , G06F11/20 , G06F11/22 , G06F11/30 , G06F13/00 , G06F15/78 , H02H3/05 , G06F7/02 , G06F11/08
CPC分类号： G06F11/1637 , G06F11/1654 , G06F11/2025 , G06F11/2038 , G06F11/2043
摘要： An information processing system has a plurality of processor circuits, each of the processor circuits including internal circuits and an internal processing result outputting circuit, the system having an internal data selection circuit connected to each of the processor circuits and at least one fault detection circuit. The internal processing result outputting circuit of each of the processor circuits outputs respective ones result data processed by respective ones of the internal circuits in the processor circuit. Each of the internal data selection circuit selects and outputs one selected result data output from the internal processing result outputting circuit of each of the processor circuits, at a predetermined timing. The fault detection circuit outputs a result of a comparison among the data selected by the respective internal data selection circuits of the processor circuits or among the data output at each predetermined timing by the processor circuits.
摘要翻译：信息处理系统具有多个处理器电路，每个处理器电路包括内部电路和内部处理结果输出电路，该系统具有连接到每个处理器电路的内部数据选择电路和至少一个故障检测电路。每个处理器电路的内部处理结果输出电路输出由处理器电路中的各个内部电路处理的各个结果数据。每个内部数据选择电路在预定的定时选择并输出从每个处理器电路的内部处理结果输出电路输出的一个选择的结果数据。故障检测电路输出由处理器电路的各个内部数据选择电路选择的数据或由处理器电路在每个预定定时输出的数据之间的比较结果。

24. 发明授权

US5684729A Floating-point addition/substraction processing apparatus and method thereof 失效
标题翻译：浮点加法/减法处理装置及其方法
公开(公告)号：US5684729A
公开(公告)日：1997-11-04
申请号：US530471
申请日：1995-09-19
申请人： Hiromichi Yamada , Fumio Murabayashi , Tatsumi Yamauchi , Takashi Hotta , Hideo Sawamoto , Takahiro Nishiyama , Yoshikazu Kiyoshige , Noriyasu Ido
发明人： Hiromichi Yamada , Fumio Murabayashi , Tatsumi Yamauchi , Takashi Hotta , Hideo Sawamoto , Takahiro Nishiyama , Yoshikazu Kiyoshige , Noriyasu Ido
IPC分类号： G06F7/50 , G06F7/74
CPC分类号： G06F7/74 , G06F7/485 , G06F7/49947 , G06F7/49994
摘要： To offer a floating-point addition/subtraction processing apparatus and a method thereof, capable of shortening the computation time, the floating-point calculation processing apparatus includes an approximate shift mount predicting unit for predicting a shift amount for normalization by using the input floating-point data to be addition/subtraction processed within an error of 1 bit, a shift error detecting unit for detecting a difference between the predicted shift amount and a correct shift amount, and an bit shifter for correcting a result, obtained by normalization using the predicted shift amount, by the detected difference of the two shift amounts, wherein a round-off determination and a shift amount calculation are processed in parallel before a normalization shift processing is executed.
摘要翻译：为了提供能够缩短计算时间的浮点加法/减法处理装置及其方法，浮点计算处理装置包括：近似移位预测单元，用于通过使用输入浮点运算处理装置预测用于归一化的移位量，点数据在1比特的误差内进行加法/减法处理;移位误差检测单元，用于检测预测偏移量和正确移位量之间的差;以及位移移位器，用于校正结果，移位量乘以检测到的两个移动量的差异，其中在执行归一化移位处理之前并行处理舍入确定和移位量计算。

25. 发明授权

US07692400B2 Mobile type power supply, connection device, and carried type electronic equipment 失效
标题翻译：移动式电源，连接装置和携带式电子设备
公开(公告)号：US07692400B2
公开(公告)日：2010-04-06
申请号：US11849261
申请日：2007-08-31
申请人： Akihiko Kanouda , Yasuaki Norimatsu , Fumio Murabayashi
发明人： Akihiko Kanouda , Yasuaki Norimatsu , Fumio Murabayashi
IPC分类号： H01M10/44 , H01M6/28 , H02J7/00
CPC分类号： H02J7/0065 , G06F1/1632 , H02M2001/0019 , H02M2001/0025
摘要： A battery and a DC-to-DC converter are contained in a battery pack. When the battery pack is connected to a load by means of a connector and an output voltage reference value, corresponding to the power supply voltage of the load, the output voltage of the battery is converted according to the output voltage reference value by the DC-to-DC converter. The output voltage reference value is set by an output voltage reference value output means in the connector. Furthermore, the converted voltage is supplied to the load via an output voltage line.
摘要翻译：电池组中包含电池和DC-DC转换器。当通过连接器将电池组连接到负载，并且与负载的电源电压对应的输出电压基准值时，电池的输出电压根据DC- 直流转换器。输出电压基准值由连接器中的输出电压基准值输出装置设定。此外，转换后的电压通过输出电压线供给负载。

26. 发明授权

US07479804B2 Interface device and information processing system 有权
标题翻译：接口设备和信息处理系统
公开(公告)号：US07479804B2
公开(公告)日：2009-01-20
申请号：US11499724
申请日：2006-08-07
申请人： Fumio Murabayashi , Takashi Sase , Mutsumi Kikuchi , Atsuo Watanabe , Masatsugu Amishiro , Kenji Tabuchi
发明人： Fumio Murabayashi , Takashi Sase , Mutsumi Kikuchi , Atsuo Watanabe , Masatsugu Amishiro , Kenji Tabuchi
IPC分类号： H03K19/0175
CPC分类号： H01L21/76283 , G05B19/0428 , G05B2219/25428 , G05B2219/25462 , H01L27/0629 , H04L25/0266
摘要： A first converter circuit converts a state signal, whose level is constant or slowly varies during a predetermine period of time, into a pulse signal to allow the signal to propagate across an electrically insulating area. A second converter circuit converts the pulse signal, which has propagated through an insulating circuit, into the original state signal or a signal having the same characteristics as the original state signal.
摘要翻译：第一转换器电路将预定时间段内的电平恒定或缓慢变化的状态信号转换成脉冲信号，以允许信号通过电绝缘区域传播。第二转换器电路将已经通过绝缘电路传播的脉冲信号转换成原始状态信号或具有与原始状态信号相同特性的信号。

27. 发明申请

US20080258678A1 MOBILE TYPE POWER SUPPLY, CONNECTION DEVICE, AND CARRIED TYPE ELECTRONIC EQUIPMENT 失效
标题翻译：移动电源，连接装置和传送型电子设备
公开(公告)号：US20080258678A1
公开(公告)日：2008-10-23
申请号：US11849261
申请日：2007-08-31
申请人： Akihiko Kanouda , Yasuaki Norimatsu , Fumio Murabayashi
发明人： Akihiko Kanouda , Yasuaki Norimatsu , Fumio Murabayashi
IPC分类号： H02J7/00 , H02J1/00
CPC分类号： H02J7/0065 , G06F1/1632 , H02M2001/0019 , H02M2001/0025
摘要： A battery and a DC-to-DC converter are contained in a battery pack. When the battery pack is connected to a load by means of a connector and an output voltage reference value, corresponding to the power supply voltage of the load, the output voltage of the battery is converted according to the output voltage reference value by the DC-to-DC converter. The output voltage reference value is set by an output voltage reference value output means in the connector. Furthermore, the converted voltage is supplied to the load via an output voltage line.
摘要翻译：电池组中包含电池和DC-DC转换器。当通过连接器将电池组连接到负载，并且与负载的电源电压对应的输出电压基准值时，电池的输出电压根据DC- 直流转换器。输出电压基准值由连接器中的输出电压基准值输出装置设定。此外，转换后的电压通过输出电压线供给负载。

28. 发明授权

US07268611B2 Semiconductor device and memory card using same 有权
标题翻译：半导体器件和存储卡使用相同
公开(公告)号：US07268611B2
公开(公告)日：2007-09-11
申请号：US10524087
申请日：2003-08-08
申请人： Mutsumi Kikuchi , Noboru Akiyama , Hiroyuki Shoji , Fumio Murabayashi , Akihiko Kanouda , Takashi Sase , Koji Tateno
发明人： Mutsumi Kikuchi , Noboru Akiyama , Hiroyuki Shoji , Fumio Murabayashi , Akihiko Kanouda , Takashi Sase , Koji Tateno
IPC分类号： G05F1/10
CPC分类号： G11C5/147 , H01L27/0688 , H01L27/08 , H02M3/156 , H02M2001/007
摘要： A semiconductor device capable of achieving downsizing without reducing the power supply efficiency and capable of reducing switching noises and a memory card using the same are disclosed. The device comprises a plurality of stages of voltage booster circuits for potentially raising a power supply voltage up to a final output voltage, a voltage control unit for controlling an output voltage at a nearby location of the final stage, and one or more internal elements to which the final output voltage is supplied. A primary voltage booster circuit at the first stage includes an inductance element, a switching element, a diode and a driver circuit. At a metal core part of the inductance element, a metal wiring line is used, which was formed by use of a fabrication process of semiconductor integrated circuits, while employing for its core part an inter-wiring layer dielectric film that was formed using the fabrication process. In addition, the switching element and the diode are arranged so that portions thereof are disposed beneath the inductance element.
摘要翻译：公开了能够实现小型化而不降低电源效率并且能够降低开关噪声的半导体器件和使用其的存储卡。该装置包括用于潜在地提高最终输出电压的电源电压的多级升压电路，用于控制最后级的附近位置处的输出电压的电压控制单元和一个或多个内部元件其提供最终输出电压。第一级的初级升压电路包括电感元件，开关元件，二极管和驱动器电路。在电感元件的金属芯部分，使用通过使用半导体集成电路的制造工艺形成的金属布线，同时使用其核心部分使用该制造形成的布线层电介质膜处理。此外，开关元件和二极管被布置成使得其部分设置在电感元件下方。

29. 发明授权

US06563200B2 Interface device and interface system 失效
公开(公告)号：US06563200B2
公开(公告)日：2003-05-13
申请号：US09940790
申请日：2001-08-29
申请人： Mutsumi Kikuchi , Fumio Murabayashi , Takashi Sase , Atsuo Watanabe , Masatsugu Amishiro
发明人： Mutsumi Kikuchi , Fumio Murabayashi , Takashi Sase , Atsuo Watanabe , Masatsugu Amishiro
IPC分类号： H01L23495
CPC分类号： H01L27/1203 , H01L23/50 , H01L2224/48227 , H01L2224/48257 , H01L2224/49112 , H01L2224/49171 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/19107 , H01L2924/00
摘要： In an interface device in which by means of a buried insulation film 412 and a region insulation portion 410 an SOI substrate 414 is divided into a semiconductor support substrate region 411, a controller side region 407 and a network side region 408 and a part of isolator circuits 405 and 406 making use of a static capacitance are formed in the network side region 408, the semiconductor support substrate region 411 and the network side region 408 are connected to a network power source to always keep these regions at a same potential, thereby, an interface device using a dielectric isolation substrate which suppresses erroneous operations due to noises and characteristic deterioration, and a system using the same are provided.

30. 发明授权

US06538866B1 Circuit for protecting a load from an overvoltage 失效
标题翻译：用于保护负载免受过电压的电路
公开(公告)号：US06538866B1
公开(公告)日：2003-03-25
申请号：US09526737
申请日：2000-03-16
申请人： Keiji Hanzawa , Masahiro Matsumoto , Fumio Murabayashi , Tatsumi Yamauchi , Hiromichi Yamada , Kohei Sakurai , Atsushi Miyazaki
发明人： Keiji Hanzawa , Masahiro Matsumoto , Fumio Murabayashi , Tatsumi Yamauchi , Hiromichi Yamada , Kohei Sakurai , Atsushi Miyazaki
IPC分类号： H02H900
CPC分类号： H01L27/0251 , H02H9/04
摘要： A circuit for protecting a load from an overvoltage can be integrated together with the load on the same chip by an MOS transistor manufacture process. This overvoltage protecting circuit is composed of a surge protection circuit, an overvoltage detecting circuit and a switching circuit. The surge protection circuit including two MOS transistors operates so that a surge voltage applied to a power supply receiving terminal is clamped by virtue of the source-drain breakdown voltage of the two MOS transistors, thereby absorbing the surge energy. The overvoltage detecting circuit including two MOS transistors operates so that a DC voltage supplied from the surge protection circuit is monitored with the source-drain voltage of the two MOS transistors taken as a reference voltage, thereby detecting an overvoltage. An overvoltage detection output brings an MOS transistor of the switching circuit into a turned-off condition to protect the load.
摘要翻译：可以通过MOS晶体管制造工艺将用于保护负载的过电压的电路与负载集成在同一芯片上。该过电压保护电路由浪涌保护电路，过电压检测电路和开关电路构成。包括两个MOS晶体管的浪涌保护电路工作，借助于两个MOS晶体管的源极 - 漏极击穿电压来钳位施加到电源接收端的浪涌电压，从而吸收浪涌能量。包括两个MOS晶体管的过电压检测电路进行工作，从而以两个MOS晶体管的源极 - 漏极电压作为参考电压来监视从浪涌保护电路提供的直流电压，从而检测过电压。过电压检测输出使开关电路的MOS晶体管成为关断状态，以保护负载。

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