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1. 发明授权

US06252446B1 Method and electrical circuit for regulating dead time given varying pulse repetition rates 失效
标题翻译：用于调整死区时间的方法和电路给定变化的脉冲重复率
公开(公告)号：US06252446B1
公开(公告)日：2001-06-26
申请号：US09367908
申请日：1999-11-19
申请人： Michael Zielinski , Gerhard Ziller
发明人： Michael Zielinski , Gerhard Ziller
IPC分类号： H03K317
CPC分类号： H03K5/1252
摘要： A method and an electrical circuit for converting highly structured analog signals arriving with variable pulse frequency into trigger pulses with an electronic circuit that locks the trigger pulses for a specific time, which is referred to as a dead time. The dead time being adapted to the current pulse frequency of the analog signals.
摘要翻译：一种用于将具有可变脉冲频率到达的高度结构化的模拟信号转换成触发脉冲的方法和电路，其中电子电路将触发脉冲锁定在特定时间，这被称为死区时间。死区时间适应模拟信号的当前脉冲频率。

2. 发明授权

US06437621B2 Waveform shaping device 失效
标题翻译：波形整形装置
公开(公告)号：US06437621B2
公开(公告)日：2002-08-20
申请号：US09816100
申请日：2001-03-26
申请人： Kazuo Kato , Takashi Sase , Takashi Hotta , Fumio Murabayashi
发明人： Kazuo Kato , Takashi Sase , Takashi Hotta , Fumio Murabayashi
IPC分类号： H03K317
CPC分类号： C08K5/5419 , C08G77/442 , C08G77/50 , C08L27/12 , C08L69/00
摘要： A waveform shaping circuit is provided so that the duty factor of clock pulses can be set to 50% with high accuracy even if the clock pulses are of a low voltage and a high frequency. An inverter which receives the clock pulses through an alternating current coupling capacitor is provided with a non-linear limiter element for limiting an amplitude of an output symmetrically on positive and negative sides thereof. A first current-limiting impedance and a second current-limiting impedance are connected between a power supply side terminal of the inverter and a power supply bus and between a grounding side terminal of the inverter and a grounding bus, respectively.
摘要翻译：提供波形整形电路，使得即使时钟脉冲是低电压和高频率，时钟脉冲的占空因数也可以高精度地设置为50％。通过交流耦合电容器接收时钟脉冲的逆变器设置有非线性限制器元件，用于在其正侧和负侧对称地限制输出的幅度。逆变器的电源侧端子与电源总线之间以及逆变器的接地侧端子与接地母线之间分别连接有第一限流阻抗和第二限流阻抗。

3. 发明授权

US06448827B1 Three-phase pulse width modulation waveform generator 失效
标题翻译：三相脉宽调制波形发生器
公开(公告)号：US06448827B1
公开(公告)日：2002-09-10
申请号：US09722013
申请日：2000-11-27
申请人： Hidetoshi Tojima
发明人： Hidetoshi Tojima
IPC分类号： H03K317
CPC分类号： H02M7/53873 , G06F1/025 , H03K7/08
摘要： The present invention provides a three-phase pulse width modulation waveform generator having at least an up-down counting circuitry which comprises: an up-down counter for performing an up-count or a down-count upon an external input of a count clock signal; and a count controller having an output side connected to an input side of the up-down counter for sending the input side of the up-down counter a count enable signal which enables the up-down counter to perform the up-count or the down-count.
摘要翻译：本发明提供一种三相脉宽调制波形发生器，其具有至少一个上下计数电路，其包括：用于在外部输入计数时钟信号时执行向上计数或递减计数的升降计数器 ; 以及计数控制器，其输出侧连接到所述升降计数器的输入侧，以向所述升降计数器的输入侧发送计数使能信号，所述计数使能信号使得所述升降计数器能够执行向上计数或向下计数 -计数。

4. 发明授权

US06784710B2 Multistage pulse width modulator 有权
标题翻译：多级脉宽调制器
公开(公告)号：US06784710B2
公开(公告)日：2004-08-31
申请号：US10316376
申请日：2002-12-11
申请人： Jack B. Andersen , Caleb Roberts
发明人： Jack B. Andersen , Caleb Roberts
IPC分类号： H03K317
CPC分类号： H03K7/08
摘要： Two or more pulse width modulation stages, each having progressively higher resolution, are utilized to allow the lower resolution stage or stages to operate at lower clock speeds. Later stages are operated at higher clock speeds and thus a smaller portion of the total pulse width modulation circuit utilizes the higher clock speed. Additionally, later stages operate over smaller time intervals in order to reduce usage of the later stages.
摘要翻译：利用两个或多个具有逐渐更高分辨率的脉冲宽度调制级以允许较低分辨率级或级在较低时钟速度下工作。后级以更高的时钟速度运行，因此总脉宽调制电路的较小部分利用较高的时钟速度。此外，后期阶段在较短的时间间隔内运行，以减少后期阶段的使用。

5. 发明授权

US06765422B1 High resolution fan control at high PWM frequency with a low clock frequency input 有权
标题翻译：高分辨率风扇控制在高PWM频率，低时钟频率输入
公开(公告)号：US06765422B1
公开(公告)日：2004-07-20
申请号：US10456876
申请日：2003-06-05
申请人： Mehmet Aslan , Richard Henderson , Chungwai Benedict Ng
发明人： Mehmet Aslan , Richard Henderson , Chungwai Benedict Ng
IPC分类号： H03K317
CPC分类号： H03K7/08 , H02P7/29
摘要： The present invention enables an IC to have a fast PWM while maintaining the low frequency clock requirement of the temperature measurement. Methods are presented to increase the resolution of the control using a relatively low input clock. According to one method, the numerator and denominator of the PWM duty cycle equation are adjusted to achieve a desired resolution. According to another method, a determined number of PWM cycles are used to set the PWM duty cycle. For example, an averaging of 1024 duty cycles may be used to achieve an increased resolution of the duty cycle as compared to using only one duty cycle. According to yet another method, an error integrating loop is used to determine the level of the next cycle. The number of cycles used to reach the target PWM duty cycle depends on the desired resolution.
摘要翻译：本发明使IC能够在保持温度测量的低频时钟要求的同时具有快速PWM。提出了使用较低输入时钟来提高控制分辨率的方法。根据一种方法，调整PWM占空比方程的分子和分母以达到期望的分辨率。根据另一种方法，使用确定数量的PWM周期来设置PWM占空比。例如，与仅使用一个占空比相比，可以使用1024个占空比的平均值来实现增加的占空比分辨率。根据另一种方法，使用误差积分环来确定下一周期的水平。用于达到目标PWM占空比的周期数取决于所需的分辨率。

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