专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US06730570B2 Method for forming a self-aligned contact of a semiconductor device and method for manufacturing a semiconductor device using the same 有权
标题翻译：用于形成半导体器件的自对准接触的方法和使用其制造半导体器件的方法
公开(公告)号：US06730570B2
公开(公告)日：2004-05-04
申请号：US10348017
申请日：2003-01-22
申请人： Seung-Mok Shin , Jae-Jong Han , Ki-Hyun Hwang
发明人： Seung-Mok Shin , Jae-Jong Han , Ki-Hyun Hwang
IPC分类号： H01L21336
CPC分类号： H01L21/76897 , H01L21/76831 , H01L29/6656
摘要： A method for forming a self-aligned contact in a semiconductor device which can reduce process failures and a method for manufacturing a semiconductor device that includes the self-aligned contact are provided. A self-aligned contact hole is formed in an interlayer dielectric film to expose a portion of the substrate between conductive structures formed thereon. A buffer layer is formed on a sidewall of the self-aligned contact hole, on the bottom of the self-aligned contact hole, and on the interlayer dielectric film such that the thickness of the buffer layer at an upper portion of the self-aligned contact hole is greater than the thickness of the buffer layer at the bottom of the self-aligned contact hole. After removing the portion of the buffer layer on the bottom of the self-aligned contact hole, a contact is formed in the self-aligned contact hole to make contact with the substrate.
摘要翻译：提供了一种用于在可以减少工艺故障的半导体器件中形成自对准接触的方法以及包括自对准接触的半导体器件的制造方法。在层间电介质膜中形成自对准接触孔，以在其上形成的导电结构之间露出基板的一部分。在自对准接触孔的侧壁，自对准接触孔的底部和层间电介质膜上形成缓冲层，使得缓冲层在自对准的上部的厚度接触孔大于自对准接触孔底部缓冲层的厚度。在自对准接触孔的底部上移除缓冲层的部分之后，在自对准接触孔中形成接触以与衬底接触。

22. 发明申请

US20050158977A1 Methods and apparatus for forming thin films for semiconductor devices 有权
标题翻译：用于形成半导体器件薄膜的方法和装置
公开(公告)号：US20050158977A1
公开(公告)日：2005-07-21
申请号：US11038324
申请日：2005-01-19
申请人： Jae-Hyun Yeo , Young-Wook Park , Ki-Chul Kim , Jae-Jong Han
发明人： Jae-Hyun Yeo , Young-Wook Park , Ki-Chul Kim , Jae-Jong Han
IPC分类号： H01L21/205 , H01L21/285 , H01L21/314 , H01L21/316 , H01L21/44 , H01L21/31 , H01L21/469
CPC分类号： C23C16/44 , H01L21/28562 , H01L21/3141 , H01L21/31604 , H01L21/31637 , H01L21/31641 , H01L21/31645 , H01L21/31691
摘要： Methods and apparatus are provided for forming thin films for semiconductor devices, which enable supplying and removing reactants containing constituent elements of a thin film to be formed, by preheating and supplying a process gas and a purging gas at a predetermined temperature in forming the thin film on a substrate. For example, a method for forming a thin film includes supplying a first reactant to a chamber to chemically adsorb the first reactant onto a substrate, the first reactant being bubbled by a first gas that is preheated, purging the chamber to remove residues on the substrate having the first reactant chemically adsorbed, and forming the thin film by a means of chemical displacement by supplying a second reactant to the chamber to chemically adsorb the second reactant onto the substrate.
摘要翻译：提供了用于形成用于半导体器件的薄膜的方法和装置，其能够通过在预定温度下预热和提供处理气体和净化气体来形成薄膜来提供和除去含有待形成的薄膜的构成元素的反应物在基板上。例如，用于形成薄膜的方法包括将第一反应物供应到室以化学吸附第一反应物到基底上，第一反应物被预热的第一气体鼓泡，清洗室以除去基底上的残留物使所述第一反应物被化学吸附，并且通过向所述室供应第二反应物以化学吸附所述第二反应物到所述基底上，通过化学位移形成所述薄膜。

23. 发明申请

US20050003597A1 Method of forming a gate oxide layer in a semiconductor device and method of forming a gate electrode having the same 有权
标题翻译：在半导体器件中形成栅氧化层的方法和形成具有该栅电极的栅电极的方法
公开(公告)号：US20050003597A1
公开(公告)日：2005-01-06
申请号：US10878103
申请日：2004-06-28
申请人： Jae-Jong Han , Woo-Sung Lee , Sang-Jin Park
发明人： Jae-Jong Han , Woo-Sung Lee , Sang-Jin Park
IPC分类号： H01L21/336 , H01L21/8238 , H01L21/8242
CPC分类号： H01L27/10894 , H01L21/823842 , H01L21/823857 , H01L27/10873
摘要： A first gate oxide layer pattern having a first thickness is formed in a first region of a substrate and a second gate oxide layer having a second thickness is formed in a second region of a substrate. A surface of the second gate oxide layer is selectively nitrified to form an oxynitride layer, thereby reducing a depletion effect of a poly gate and a fluctuation of threshold voltage.
摘要翻译：在衬底的第一区域中形成具有第一厚度的第一栅极氧化物层图案，并且在衬底的第二区域中形成具有第二厚度的第二栅极氧化物层。第二栅极氧化物层的表面被选择性硝化以形成氧氮化物层，从而降低多晶硅栅极的耗尽效应和阈值电压的波动。

24. 发明授权

US06815370B2 Plasma enhanced chemical vapor deposition apparatus and method for forming nitride layer using the same 失效
标题翻译：等离子体增强化学气相沉积装置和使用其形成氮化物层的方法
公开(公告)号：US06815370B2
公开(公告)日：2004-11-09
申请号：US10805335
申请日：2004-03-22
申请人： Jae-Jong Han , Kyoung-Seok Kim , Byung-Ho Ahn , Seung Mok Shin , Hwa-Sik Kim , Hong-Bae Park
发明人： Jae-Jong Han , Kyoung-Seok Kim , Byung-Ho Ahn , Seung Mok Shin , Hwa-Sik Kim , Hong-Bae Park
IPC分类号： H01L2131
CPC分类号： C23C16/4558 , C23C16/345 , C23C16/4404 , C23C16/4405 , C23C16/505 , H01J37/3244 , H01J37/32623
摘要： A plasma enhanced chemical vapor deposition apparatus and a method of forming a nitride layer using the same, wherein the plasma enhanced CVD apparatus includes a process chamber including an upper chamber with a dome shape, a lower chamber, and an insulator therebetween, a gas distributing ring, a susceptor for supporting a wafer and heating the process chamber, a plasma compensation ring surrounding the susceptor, a vacuum pump and an electric power source connected to the process chamber. The gas distributing ring has a plurality of upwardly inclined nozzles, allowing upward distribution of reactive gases. The method of forming a nitride layer includes forming a protective film on inner walls of a process chamber, the protective film having at least two layers of differeing dielectric constant, and sequentially supplying reactive gases to the process chamber. A nitride layer formed thereby has low hydrogen content, good density and oxidation resistance.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式