专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US4867829A Process for producing interior vehicular trim 失效
标题翻译：生产车内装饰工艺
公开(公告)号：US4867829A
公开(公告)日：1989-09-19
申请号：US91592
申请日：1987-08-31
申请人： Shigeru Moriya , Sadao Hijikata , Yasuyuki Izuhara , Akihiro Harada , Kunimasa Tsuzuki , Shigeki Nimura , Hirosi Watanabe
发明人： Shigeru Moriya , Sadao Hijikata , Yasuyuki Izuhara , Akihiro Harada , Kunimasa Tsuzuki , Shigeki Nimura , Hirosi Watanabe
IPC分类号： B29C43/12 , B29C51/16 , B29C51/28 , B29C65/02 , B29C65/74 , B29C65/78 , B60R13/02
CPC分类号： B29C65/7847 , B29C51/16 , B29C51/28 , B29C65/04 , B29C65/7441 , B29C65/749 , B29C66/54 , B29C66/545 , B29C2793/00 , B29C43/12 , B29C65/02 , B29C66/8322 , B29L2031/3005 , B29L2031/3014 , B60R13/02 , Y10T156/1054 , Y10T156/108 , Y10T156/1313
摘要： A process for producing interior vehicular trim, comprising covering the surface of a substrate to which a nap-raised ornamental member, and removing the synthetic resin surface material at the part thereof covering the nap-raised ornamental member and along the weld line. The synthetic resin surface material is welded and melt-cut on the peripheral edge of the ornamental member by carrying out the welding while the synthetic resin surface material is lifted up by force from the surface of the nap-raised ornamental member over the part thereof covering the ornmental member. An apparatus for producing interior vehicular trim, comprises an upper platen disposed to oppose matchably to a lower platen for supporting the substrate to which the nap-raised ornamental member has been partly applied, to effect welding of the synthetic resin surface material which was applied over the surface of the substrate, the welding being carried out along the peripheral edge of the ornamental member. The portion of the synthetic resin surface material covering the nap-raised ornamental member is removed by melt-cutting it along the welded line. A lift-up arrangement provided for lifting up the synthetic resin surface material at the part thereof covering the nap-raised ornamental member from the surface of the nap-raised ornamental member at least during the welding and melt-cutting steps.
摘要翻译：一种制造内部车辆装饰件的方法，包括将覆盖在所述基材上的小型装饰构件的表面覆盖所述合成树脂表面材料，并且沿着所述熔接线覆盖所述小型装饰构件的部分。合成树脂表面材料通过进行焊接而在装饰构件的周边边缘上被焊接和熔融切割，同时合成树脂表面材料通过力被从提花装饰件的表面覆盖在其覆盖部分上华人会员一种用于制造内部车辆装饰件的装置，包括上压板，设置成与下压板相配合，用于支撑已经部分地应用小升降装饰构件的基板，以实现施加在合成树脂表面材料上的焊接基板的表面，沿着装饰构件的周边边缘进行焊接。通过沿着焊接线熔融切割，除去覆盖小吊灯的装饰构件的合成树脂表面材料的部分。提升装置，其至少在焊接和熔融切割步骤期间，用于在其部分从提升的装饰构件的表面覆盖微小的装饰构件的部分上提升合成树脂表面材料。

22. 发明授权

US4297676A Mark signal amplifier 失效
标题翻译：标记信号放大器
公开(公告)号：US4297676A
公开(公告)日：1981-10-27
申请号：US107087
申请日：1979-12-26
申请人： Shigeru Moriya , Nobuo Hamamto , Kazuo Ichino , Kanji Ozawa
发明人： Shigeru Moriya , Nobuo Hamamto , Kazuo Ichino , Kanji Ozawa
IPC分类号： H01L21/027 , G06K7/10 , H01J37/304 , G06K9/32
CPC分类号： G06K7/10851 , H01J37/3045
摘要： In electron-beam lithography, and similar operations, to achieve good drawing accuracy on a sample, it is necessary to detect the position of a mark on the sample with high accuracy. To accomplish this, a mark signal amplifier is provided including a first circuit for taking maximum and minimum values out of a mark signal detected by causing an electron beam to scan a mark area provided on a sample. A second circuit determines a peak-to-peak value of an amplitude of the detected mark signal in accordance with the maximum and minimum values, and a third circuit produces an output signal of a constant amplitude level as an input to a binary-coding circuit in accordance with the peak-to-peak value. The output signal of the third circuit remains constant in spite of fluctuations of the detected mark signal, so that a higher accuracy is obtained in detecting the mark for positioning. An alternative arrangement adds the maximum and minimum values, and establishes a mean value of the maximum and minimum values from the resultant sum.
摘要翻译：在电子束光刻和类似的操作中，为了在样品上获得良好的绘图精度，有必要高精度地检测样品上标记的位置。为了实现这一点，提供了一种标记信号放大器，其包括用于从通过使电子束扫描样品上提供的标记区域而检测的标记信号中获取最大值和最小值的第一电路。第二电路根据最大值和最小值确定检测到的标记信号的幅度的峰 - 峰值，并且第三电路产生恒定幅度电平的输出信号作为二进制编码电路的输入按照峰峰值。尽管检测到的标记信号的波动，第三电路的输出信号保持恒定，从而在检测定位标记时获得较高的精度。一个替代方案是添加最大值和最小值，并从所得到的和建立最大值和最小值的平均值。

23. 发明授权

US4148232A Oil pressure control means for an automatic transmission 失效
标题翻译：用于自动变速器的油压控制装置
公开(公告)号：US4148232A
公开(公告)日：1979-04-10
申请号：US791578
申请日：1977-04-27
申请人： Shigeru Moriya
发明人： Shigeru Moriya
IPC分类号： F16H61/00 , F16H59/08 , F16H59/78 , F16H61/02 , B60K41/10
CPC分类号： F16H61/0267 , B60W2510/0676 , F16H2059/083 , F16H59/78 , Y10T477/653 , Y10T477/69395
摘要： An oil pressure control means for operating an automatic transmission for automobiles in a manner to establish various speed shift stages in accordance with the balance of the throttle pressure and the governor pressure, including a combination of a thermo-sensitive control means operable in response to the engine temperature and an oil passage change-over means, said combination being adapted to supply the line pressure in lieu of the throttle pressure to a speed shift valve which establishes the highest speed stage when the engine is not yet warmed up thereby positively shifting the speed shift valve to the lower speed shift position by over-balancing the governor pressure by the line pressure.
摘要翻译：一种油压控制装置，用于按照节流压力和调速器压力的平衡来建立各种变速级的方式来操作汽车用自动变速器，该组合包括可响应于所述调节器压力的控制装置操作的热敏控制装置的组合发动机温度和油路转换装置，所述组合适于将代替节气门压力的管路压力提供给速度换档阀，该换档阀在发动机尚未加热时建立最高速度级，从而主动地将速度通过将调速器压力过大地平衡管路压力，将换档阀切换到较低速度换档位置。

24. 发明授权

US07456031B2 Exposure device, exposure method, and semiconductor device manufacturing method 失效
标题翻译：曝光装置，曝光方法和半导体器件制造方法
公开(公告)号：US07456031B2
公开(公告)日：2008-11-25
申请号：US10534917
申请日：2003-11-13
申请人： Shinji Omori , Shigeru Moriya , Shinichiro Nohdo
发明人： Shinji Omori , Shigeru Moriya , Shinichiro Nohdo
IPC分类号： H01L31/26 , H01L21/66
CPC分类号： B82Y40/00 , B82Y10/00 , G03F1/20 , H01J37/304 , H01J37/3174
摘要： To provide an exposure apparatus and an exposure method able to correct an image-placement error during an exposure which is unable to decrease only by correcting electron beam description data of a mask pattern, and a semiconductor device manufacturing method used the same, wherein an image placement R2 of a mask is measured at an inversion posture against an exposure posture (ST7), the measured image placement R2 is corrected with considering a pattern displacement caused by gravity at the exposure posture and a first correction data Δ1 is prepared based on a difference of the corrected image placement and a designed data (ST10), and an exposure is performed by deflecting charged particle beam to correct a position of a pattern to be exposed to a subject based on the first correction data Δ1 (ST13).
摘要翻译：为了提供一种曝光装置和曝光方法，能够通过校正掩膜图案的电子束描述数据而不能减小曝光期间的图像放置误差，以及使用其的半导体器件制造方法，其中图像以与曝光姿势相反的反转姿势（ST7）测量掩模的放置R 2，考虑由曝光姿势引起的重力引起的图案位移，并且准备第一校正数据Delta 1来校正测量图像布置R 2 基于校正图像放置的差异和设计数据（ST10），并且通过基于第一校正数据Delta 1来对带电粒子束进行偏转来校正要暴露于对象的图案的位置来执行曝光（ ST 13）。

25. 发明申请

US20070114450A1 MASK-MAKING MEMBER AND ITS PRODUCTION METHOD, MASK AND ITS MAKING METHOD, EXPOSURE PROCESS, AND FABRICATION METHOD OF SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造成员及其生产方法，掩模及其制造方法，曝光过程和半导体器件的制造方法
公开(公告)号：US20070114450A1
公开(公告)日：2007-05-24
申请号：US11567912
申请日：2006-12-07
申请人： Kaoru Koike , Shigeru Moriya
发明人： Kaoru Koike , Shigeru Moriya
IPC分类号： G01N23/00
CPC分类号： G03F1/20 , H01J2237/0435 , H01J2237/31791 , H01L23/544 , H01L2223/5442 , H01L2223/54453 , H01L2924/0002 , Y10S438/975 , H01L2924/00
摘要： A mask blank has a plurality of pattern formation regions in which mask circuit patterns are to be formed, and a supporting region in which any mask circuit pattern is not to be formed. The supporting region is provided for holding the plurality of pattern formation regions while separating the plurality of pattern formation regions from each other. The supporting region has first and second alignment marks. Exposure of a mask made from the mask blank for forming mask circuit patterns thereon is performed on the basis of the first alignment marks, and exposure of a substrate for forming circuit patterns thereon is performed on the basis of the second alignment marks. With this configuration, a mask used for charged particle beam reduction-and-division transfer exposure can be highly accurately produced at a low cost, and exposure of a substrate can be highly accurately performed by using the mask.
摘要翻译：掩模坯料具有要形成掩模电路图案的多个图案形成区域和不形成任何掩模电路图案的支撑区域。支撑区域用于在分离多个图案形成区域的同时保持多个图案形成区域。支撑区域具有第一和第二对准标记。基于第一对准标记进行由掩模毛坯制成的掩模的曝光，并且基于第二对准标记进行用于在其上形成电路图案的基板的曝光。利用这种结构，可以以低成本高精度地制造用于带电粒子束减小和分割转印曝光的掩模，并且可以通过使用掩模高度准确地执行基板的曝光。

26. 发明申请

US20070054202A1 Mask, method of producing mask, and method of producing semiconductor device 失效
公开(公告)号：US20070054202A1
公开(公告)日：2007-03-08
申请号：US11594878
申请日：2006-11-09
申请人： Shigeru Moriya , Shinji Omori
发明人： Shigeru Moriya , Shinji Omori
IPC分类号： G21K5/00 , G03F1/00
CPC分类号： G03F1/20 , B82Y10/00 , B82Y40/00 , H01J37/3174 , H01J2237/31794 , H01L21/0334 , Y10S438/975
摘要： To provide a mask able to prevent a drop in pattern position accuracy due to the influence of internal stress of a membrane and able to align patterns including complementary divided patterns precisely, a method of producing the same, and a method of producing a semiconductor device. A stencil mask having lattice-shaped struts formed by etching a silicon wafer on four regions of a membrane wherein the lattices are offset from each other in the four regions and all of the struts are connected to other struts or the silicon wafer around the membrane (frame), a method of producing a stencil mask, and a method of producing a semiconductor device.

27. 发明授权

US07144178B2 Mask, method of producing mask, and method of producing semiconductor device 失效
公开(公告)号：US07144178B2
公开(公告)日：2006-12-05
申请号：US10689098
申请日：2003-10-21
申请人： Shigeru Moriya , Shinji Omori
发明人： Shigeru Moriya , Shinji Omori
IPC分类号： G03F1/00
CPC分类号： G03F1/20 , B82Y10/00 , B82Y40/00 , H01J37/3174 , H01J2237/31794 , H01L21/0334 , Y10S438/975
摘要： To provide a mask able to prevent a drop in pattern position accuracy due to the influence of internal stress of a membrane and able to align patterns including complementary divided patterns precisely, a method of producing the same, and a method of producing a semiconductor device. A stencil mask having lattice-shaped struts formed by etching a silicon wafer on four regions of a membrane wherein the lattices are offset from each other in the four regions and all of the struts are connected to other struts or the silicon wafer around the membrane (frame), a method of producing a stencil mask, and a method of producing a semiconductor device.

28. 发明授权

US07126231B2 Mask-making member and its production method, mask and its making method, exposure process, and fabrication method of semiconductor device 失效
公开(公告)号：US07126231B2
公开(公告)日：2006-10-24
申请号：US11103809
申请日：2005-04-12
申请人： Kaoru Koike , Shigeru Moriya
发明人： Kaoru Koike , Shigeru Moriya
IPC分类号： H01L21/76
CPC分类号： G03F1/20 , H01J2237/0435 , H01J2237/31791 , H01L23/544 , H01L2223/5442 , H01L2223/54453 , H01L2924/0002 , Y10S438/975 , H01L2924/00
摘要： A mask blank has a plurality of pattern formation regions in which mask circuit patterns are to be formed, and a supporting region in which any mask circuit pattern is not to be formed. The supporting region is provided for holding the plurality of pattern formation regions while separating the plurality of pattern formation regions from each other. The supporting region has first and second alignment marks. Exposure of a mask made from the mask blank for forming mask circuit patterns thereon is performed on the basis of the first alignment marks, and exposure of a substrate for forming circuit patterns thereon is performed on the basis of the second alignment marks. With this configuration, a mask used for charged particle beam reduction-and-division transfer exposure can be highly accurately produced at a low cost, and exposure of a substrate can be highly accurately performed by using the mask.

29. 发明授权

US07109500B2 Mask pattern correction method, semiconductor device manufacturing method, mask manufacturing method and mask 失效
标题翻译：掩模图案校正方法，半导体器件制造方法，掩模制造方法和掩模
公开(公告)号：US07109500B2
公开(公告)日：2006-09-19
申请号：US10509230
申请日：2003-03-20
申请人： Shinji Omori , Kaoru Koike , Shigeru Moriya , Isao Ashida
发明人： Shinji Omori , Kaoru Koike , Shigeru Moriya , Isao Ashida
IPC分类号： H01L21/027 , G03F9/00
CPC分类号： G03F1/20 , H01J2237/31794
摘要： A mask pattern correction method capable of preventing a position of a pattern from deviating by deformation of a mask due to gravity, a mask production method, a mask, and a production method of a semiconductor device capable of forming a fine pattern with high accuracy are provided. A mask pattern correction method, a mask production method, a mask produced thereby and a production method of a semiconductor device using the mask include a step of creating first position data indicating positions of a plurality of marks when supporting a first thin film having the marks in a state where a first surface directs upward, a step of creating second position data indicating mark positions when supporting the first thin film in a state where a second surface directs upward, a step of obtaining a transfer function for converting the first position data to the second position data, and a step of correcting a mask pattern as a shape of exposure beam transmission portions formed on a second thin film by using an inverse function of the transfer function.
摘要翻译：能够通过重力防止图案的位置偏离掩模的位置偏移的掩模图案校正方法，能够以高精度形成精细图案的半导体器件的掩模制造方法，掩模和制造方法，提供。掩模图案校正方法，掩模制造方法，由此制备的掩模和使用掩模的半导体器件的制造方法包括：当支撑具有标记的第一薄膜时，创建指示多个标记的位置的第一位置数据的步骤在第一面向上方的状态下，在第二面向上方的状态下支撑第一薄膜时，形成指示标记位置的第二位置数据的步骤，获得将第一位置数据变换为第二位置数据，以及通过使用传递函数的反函数将掩模图案校正为形成在第二薄膜上的曝光光束透射部分的形状的步骤。

30. 发明授权

US07060996B2 Mask, method of producing mask, and method of producing semiconductor device 失效
公开(公告)号：US07060996B2
公开(公告)日：2006-06-13
申请号：US10843484
申请日：2004-05-12
申请人： Shigeru Moriya , Shinji Omori
发明人： Shigeru Moriya , Shinji Omori
IPC分类号： B01D59/44
CPC分类号： G03F1/20 , B82Y10/00 , B82Y40/00 , H01J37/3174 , H01J2237/31794 , H01L21/0334 , Y10S438/975
摘要： To provide a mask able to prevent a drop in pattern position accuracy due to the influence of internal stress of a membrane and able to align patterns including complementary divided patterns precisely, a method of producing the same, and a method of producing a semiconductor device. A stencil mask having lattice-shaped struts formed by etching a silicon wafer on four regions of a membrane wherein the lattices are offset from each other in the four regions and all of the struts are connected to other struts or the silicon wafer around the membrane (frame), a method of producing a stencil mask, and a method of producing a semiconductor device.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式