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21. 发明申请

US20100172185A1 Method for Operating a Flash Memory Device 有权
标题翻译：操作闪存设备的方法
公开(公告)号：US20100172185A1
公开(公告)日：2010-07-08
申请号：US12650787
申请日：2009-12-31
申请人： Se Jun Kim
发明人： Se Jun Kim
IPC分类号： G11C16/04 , G11C16/06
CPC分类号： G11C16/3459 , G11C16/3454
摘要： A charge trap flash memory device is capable of preventing a data retention fail by ensuring a data retention margin. A method for operating the charge trap flash memory device is provided. A selected memory cell is programmed using a program voltage. The selected memory cell is verified using a first program verify voltage. Date retention states of selected memory cell having passed the program verify step are verified using a retention verify voltage. A read step of determining a program pass or fail by reading data of the selected memory cell having passed the retention verify step is performed using a read voltage.
摘要翻译：充电陷阱闪存设备能够通过确保数据保留余量来防止数据保留失败。提供了一种用于操作电荷陷阱闪存器件的方法。使用编程电压对选定的存储单元进行编程。使用第一程序验证电压验证所选存储单元。使用保留验证电压验证已经通过程序验证步骤的选定存储单元的保持状态。使用读取电压来执行通过读取已经通过保留验证步骤的所选存储单元的数据来确定程序通过或失败的读取步骤。

22. 发明申请

US20080225595A1 CHARGE TRAP TYPE NON-VOLATILE MEMORY DEVICE AND PROGRAM METHOD THEREOF 失效
标题翻译：充电陷阱型非易失性存储器件及其程序方法
公开(公告)号：US20080225595A1
公开(公告)日：2008-09-18
申请号：US11771632
申请日：2007-06-29
申请人： Eun Seok CHOI , Se Jun Kim , Kyoung Hwan Park , Hyun Seung Yoo
发明人： Eun Seok CHOI , Se Jun Kim , Kyoung Hwan Park , Hyun Seung Yoo
IPC分类号： G11C11/34
CPC分类号： G11C16/3454 , G11C16/0466
摘要： A method of programming a charge trap type non-volatile memory device includes applying a program pulse to a selected memory cell, applying a detrap pulse to the selected memory cell, and applying a program verify pulse to the memory cell. The charge trap type non-volatile memory device includes a memory cell array including a charge trap memory cell, and a high voltage generator for supplying a detrap pulse to the charge trap memory cell.
摘要翻译：一种对电荷陷阱型非易失性存储器件进行编程的方法包括将程序脉冲施加到所选择的存储单元，向所选择的存储单元施加去除脉冲，以及将程序验证脉冲施加到存储单元。电荷陷阱型非易失性存储器件包括具有电荷陷阱存储单元的存储单元阵列，以及用于向电荷陷阱存储单元提供去除脉冲的高电压发生器。

23. 发明授权

US07410881B2 Method of manufacturing flash memory device 失效
标题翻译：制造闪存设备的方法
公开(公告)号：US07410881B2
公开(公告)日：2008-08-12
申请号：US11618702
申请日：2006-12-29
申请人： Sun Mi Park , Yoo Nam Jeon , Nam Kyeong Kim , Se Jun Kim
发明人： Sun Mi Park , Yoo Nam Jeon , Nam Kyeong Kim , Se Jun Kim
IPC分类号： H01L21/76
CPC分类号： H01L27/115 , H01L21/76849 , H01L21/76877 , H01L27/11521
摘要： A method of manufacturing a flash memory device includes etching an insulating layer provided over a substrate to form a contact hole to define a contact hole exposing a junction region formed on the substrate. The contact hole is filled with a first conductive material, the first conductive material contacting the junction region and extending above an upper surface of the contact hole. The first conductive material is etched to partly fill the contact hole, so that the first conductive material fills a lower portion of the contact hole, wherein an upper portion of the contact hole remains not filled due to the etching of the first conductive material, wherein the etched first conductive material defines a contact plug. A first dielectric layer and a second dielectric layer are formed over the contact plug, thereby filling the upper portion of the contact hole. Part of the first and second dielectric layers is etched to expose the contact plug and the upper portion of the contact hole. A second conductive material is formed on the contact plug and filling the upper portion of the contact hole to form a bit line.
摘要翻译：制造闪速存储器件的方法包括蚀刻设置在衬底上的绝缘层以形成接触孔，以限定暴露形成在衬底上的接合区域的接触孔。接触孔填充有第一导电材料，第一导电材料接触接合区并在接触孔的上表面上方延伸。第一导电材料被蚀刻以部分地填充接触孔，使得第一导电材料填充接触孔的下部，其中接触孔的上部部分由于蚀刻第一导电材料而保持不被填充，其中蚀刻的第一导电材料限定接触插塞。第一电介质层和第二电介质层形成在接触插塞上，从而填充接触孔的上部。蚀刻第一和第二电介质层的一部分以暴露接触插塞和接触孔的上部。第二导电材料形成在接触插塞上并填充接触孔的上部以形成位线。

24. 发明申请

US20080128789A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20080128789A1
公开(公告)日：2008-06-05
申请号：US11740882
申请日：2007-04-26
申请人： Kyoung Hwan PARK , Eun Seok Choi , Se Jun Kim , Hyun Seung Yoo
发明人： Kyoung Hwan PARK , Eun Seok Choi , Se Jun Kim , Hyun Seung Yoo
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L29/42324 , H01L29/40117 , H01L29/4234 , H01L29/7881 , H01L29/792
摘要： A semiconductor memory device includes a semiconductor substrate in which junctions are formed, and a tunnel insulating layer, a charge storage layer, a blocking layer and a gate electrode pattern, which are sequentially stacked over the semiconductor substrate. The blocking layer has a structure in which a blocking insulating layer is surrounded by a high dielectric layer.
摘要翻译：半导体存储器件包括其中形成有结的半导体衬底，以及依次层叠在半导体衬底上的隧道绝缘层，电荷存储层，阻挡层和栅电极图案。阻挡层具有阻挡绝缘层被高介电层包围的结构。

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