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21. 发明申请

US20110101466A1 PACKAGE CONFIGURATIONS FOR LOW EMI CIRCUITS 有权
标题翻译：低EMI电路的封装配置
公开(公告)号：US20110101466A1
公开(公告)日：2011-05-05
申请号：US12611018
申请日：2009-11-02
申请人： Yifeng Wu
发明人： Yifeng Wu
IPC分类号： H01L27/088 , H01L29/78
CPC分类号： H01L21/4803 , H01L21/4814 , H01L21/4871 , H01L21/77 , H01L23/057 , H01L23/36 , H01L25/072 , H01L25/115 , H01L27/0248 , H01L2224/48091 , H01L2924/13055 , H01L2924/13091 , H01L2924/30107 , H01L2924/00014 , H01L2924/00
摘要： An electronic component includes a high voltage switching transistor encased in a package. The high voltage switching transistor comprises a source electrode, a gate electrode, and a drain electrode all on a first side of the high voltage switching transistor. The source electrode is electrically connected to a conducting structural portion of the package. Assemblies using the abovementioned transistor with another transistor can be formed, where the source of one transistor can be electrically connected to a conducting structural portion of a package containing the transistor and a drain of the second transistor is electrically connected to the second conductive structural portion of a package that houses the second transistor. Alternatively, the source of the second transistor is electrically isolated from its conductive structural portion, and the drain of the second transistor is electrically isolated from its conductive structural portion.
摘要翻译：电子部件包括封装在封装中的高压开关晶体管。高电压开关晶体管包括全部在高压开关晶体管的第一侧上的源电极，栅电极和漏电极。源电极电连接到封装的导电结构部分。可以形成使用上述晶体管与另一晶体管的组件，其中一个晶体管的源极可以电连接到包含晶体管的封装的导电结构部分，并且第二晶体管的漏极电连接到第二导体结构部分的第二导电结构部分一个容纳第二个晶体管的封装。或者，第二晶体管的源极与其导电结构部分电隔离，并且第二晶体管的漏极与其导电结构部分电隔离。

22. 发明授权

US07929161B2 Image processing system and method 失效
标题翻译：图像处理系统和方法
公开(公告)号：US07929161B2
公开(公告)日：2011-04-19
申请号：US10825452
申请日：2004-04-15
申请人： Yifeng Wu , Kevin R. Hudson
发明人： Yifeng Wu , Kevin R. Hudson
IPC分类号： G06F3/12 , G06K9/00
CPC分类号： H04N1/32502 , G06F3/1208 , G06F3/1263 , G06F3/1285 , H04N1/32523 , H04N1/3255
摘要： A printing control system includes a plurality of printing units, an image source, and a system processing unit. The image source provides a print job comprising a plurality of images to the system processing unit. The system processing unit receives the plurality of images in the print job from the image source, and calculates an image histogram for each image in the print job. The system processing unit then determines the similarity of the images in the print job by comparing the calculated histograms. The system processing unit then classifies the images into classes based on the comparison, and sends the classes of images to the printing units.
摘要翻译：打印控制系统包括多个打印单元，图像源和系统处理单元。图像源向系统处理单元提供包括多个图像的打印作业。系统处理单元从图像源接收打印作业中的多个图像，并计算打印作业中每个图像的图像直方图。然后，系统处理单元通过比较计算的直方图来确定打印作业中图像的相似性。然后，系统处理单元基于比较将图像分类为类，并将图像的类别发送到打印单元。

23. 发明申请

US20110057232A1 SEMICONDUCTOR DEVICES INCLUDING SHALLOW IMPLANTED REGIONS AND METHODS OF FORMING THE SAME 有权
标题翻译：包括浅层植入区域的半导体器件及其形成方法
公开(公告)号：US20110057232A1
公开(公告)日：2011-03-10
申请号：US12118243
申请日：2008-05-09
申请人： Scott T. Sheppard , R. Peter Smith , Yifeng Wu , Sten Heikman , Matthew Jacob-Mitos
发明人： Scott T. Sheppard , R. Peter Smith , Yifeng Wu , Sten Heikman , Matthew Jacob-Mitos
IPC分类号： H01L29/737 , H01L21/338
CPC分类号： H01L29/7787 , H01L23/291 , H01L23/3171 , H01L29/0843 , H01L29/2003 , H01L29/66462 , H01L2924/0002 , H01L2924/00
摘要： Methods of forming a semiconductor device include forming a dielectric layer on a Group III-nitride semiconductor layer, selectively removing portions of the dielectric layer over spaced apart source and drain regions of the semiconductor layer, implanting ions having a first conductivity type directly into the source and drain regions of the semiconductor layer, annealing the semiconductor layer and the dielectric layer to activate the implanted ions, and forming metal contacts on the source and drain regions of the semiconductor layer.
摘要翻译：形成半导体器件的方法包括在III族氮化物半导体层上形成电介质层，在半导体层的间隔开的源极和漏极区域上选择性地去除电介质层的部分，将具有第一导电类型的离子直接注入到源和漏区，退火半导体层和电介质层以激活注入的离子，并在半导体层的源极和漏极区上形成金属接触。

24. 发明授权

US07692263B2 High voltage GaN transistors 有权
标题翻译：高压GaN晶体管
公开(公告)号：US07692263B2
公开(公告)日：2010-04-06
申请号：US11603427
申请日：2006-11-21
申请人： Yifeng Wu , Primit Parikh , Umesh Mishra
发明人： Yifeng Wu , Primit Parikh , Umesh Mishra
IPC分类号： H01L29/93
CPC分类号： H01L29/7787 , H01L29/2003 , H01L29/404 , H01L29/66462 , H01L29/7786
摘要： A multiple field plate transistor includes an active region, with a source, a drain, and a gate. A first spacer layer is over the active region between the source and the gate and a second spacer layer over the active region between the drain and the gate. A first field plate on the first spacer layer is connected to the gate. A second field plate on the second spacer layer is connected to the gate. A third spacer layer is on the first spacer layer, the second spacer layer, the first field plate, the gate, and the second field plate, with a third field plate on the third spacer layer and connected to the source. The transistor exhibits a blocking voltage of at least 600 Volts while supporting a current of at least 2 Amps with an on resistance of no more than 5.0 mΩ-cm2, of at least 600 Volts while supporting a current of at least 3 Amps with an on resistance of no more than 5.3 mΩ-cm2, of at least 900 Volts while supporting a current of at least 2 Amps with an on resistance of no more than 6.6 mΩ-cm2, or a blocking voltage of at least 900 Volts while supporting a current of at least 3 Amps with an on resistance of no more than 7.0 mΩ-cm2.
摘要翻译：多场板晶体管包括有源区，源极，漏极和栅极。第一间隔层在源极和栅极之间的有源区上方，并且在漏极和栅极之间的有源区上方具有第二间隔层。第一间隔层上的第一场板连接到栅极。第二间隔层上的第二场板连接到栅极。第三间隔层位于第一间隔层，第二间隔层，第一场板，栅极和第二场板上，在第三间隔层上具有第三场板并连接到源极。晶体管表现出至少600伏特的阻断电压，同时支持至少2安培的电流，其导通电阻不超过5.0mΩ（OHgr·-cm2）为至少600伏，同时支持至少3安培的电流耐电压不超过5.3mΩ，OHgr--cm2，至少900V，同时支持至少2安培的电流，导通电阻不超过6.6mΩ，OHgr-cm2，或阻断电压至少为900V，同时支持至少3安培的电流，导通电阻不超过7.0mΩ，OHgr; -cm2。

25. 发明申请

US20100010081A1 ANTI-TUMOR EFFECT OF DIMERIC PHTHALIDE COMPOUND 有权
标题翻译：二元酚酞化合物的抗肿瘤作用
公开(公告)号：US20100010081A1
公开(公告)日：2010-01-14
申请号：US12523792
申请日：2007-01-19
申请人： Fei Chen , Tao Wang , Yifeng Wu
发明人： Fei Chen , Tao Wang , Yifeng Wu
IPC分类号： A61K31/343 , A61P35/00
CPC分类号： A61K31/365 , C07D307/88 , C07D493/08 , C07D493/10
摘要： The present invention provides for the use of a dimeric phthalide compound, the dimeric phthalide compound has broad anti-tumor activity, can directly inhibit the proliferation of tumor cells and induce cell death, but also indirectly inhibit the development of tumors by suppressing neovascularization. And further, the dimeric phthalide compound can be used alone or in combination to treat cancer, as well as in combination with chemotherapeutics to increase the efficacy of chemotherapeutics and decrease the toxicity of chemotherapeutics.
摘要翻译：本发明提供二聚苯酞化合物的用途，二苯醚膦化合物具有广泛的抗肿瘤活性，可直接抑制肿瘤细胞的增殖并诱导细胞死亡，而且通过抑制新生血管形成间接抑制肿瘤的发生。此外，二聚苯酞化合物可以单独使用或组合使用以治疗癌症，以及与化学治疗剂组合以增加化学治疗剂的功效并降低化学治疗剂的毒性。

26. 发明申请

US20090315078A1 INSULATING GATE AlGaN/GaN HEMT 审中-公开
标题翻译：绝缘栅AlGaN / GaN HEMT
公开(公告)号：US20090315078A1
公开(公告)日：2009-12-24
申请号：US12554803
申请日：2009-09-04
申请人： Primit Parikh , Umesh Mishra , Yifeng Wu
发明人： Primit Parikh , Umesh Mishra , Yifeng Wu
IPC分类号： H01L29/778 , H01L29/06 , H01L29/772 , H01L29/12
CPC分类号： H01L29/7787 , H01L23/291 , H01L23/3171 , H01L29/2003 , H01L29/432 , H01L29/517 , H01L29/518 , H01L29/7783 , H01L29/7786 , H01L2924/0002 , H01L2924/00
摘要： AlGaN/GaN HEMTs are disclosed having a thin AlGaN layer to reduce trapping and also having additional layers to reduce gate leakage and increase the maximum drive current. One HEMT according to the present invention comprises a high resistivity semiconductor layer with a barrier semiconductor layer on it. The barrier layer has a wider bandgap than the high resistivity layer and a 2DEG forms between the layers. Source and drain contacts contact the barrier layer, with part of the surface of the barrier layer uncovered by the contacts. An insulating layer is included on the uncovered surface of the barrier layer and a gate contact is included on the insulating layer. The insulating layer forms a barrier to gate leakage current and also helps to increase the HEMT's maximum current drive. The invention also includes methods for fabricating HEMTs according to the present invention. In one method, the HEMT and its insulating layer are fabricated using metal-organic chemical vapor deposition (MOCVD). In another method the insulating layer is sputtered onto the top surface of the HEMT in a sputtering chamber.
摘要翻译：公开了具有薄AlGaN层的AlGaN / GaN HEMT以减少陷阱并且还具有附加层以减少栅极泄漏并增加最大驱动电流。根据本发明的一个HEMT包括其上具有阻挡半导体层的高电阻率半导体层。阻挡层具有比高电阻率层更宽的带隙，并且层之间形成2DEG。源极和漏极触点接触阻挡层，阻挡层的一部分表面被触点覆盖。绝缘层包括在阻挡层的未覆盖表面上，并且绝缘层上包括栅极接触。绝缘层对栅极漏电流形成屏障，也有助于增加HEMT的最大电流驱动。本发明还包括用于制造根据本发明的HEMT的方法。在一种方法中，HEMT及其绝缘层使用金属有机化学气相沉积（MOCVD）制造。在另一种方法中，在溅射室中将绝缘层溅射到HEMT的顶表面上。

27. 发明申请

US20090309124A1 LED Fabrication via Ion Implant Isolation 有权
标题翻译：通过离子植入隔离制造LED
公开(公告)号：US20090309124A1
公开(公告)日：2009-12-17
申请号：US12507288
申请日：2009-07-22
申请人： Yifeng Wu , Gerald H. Negley , David B. Slater, JR. , Valeri F. Tsvetkov , Alexander Suvorov
发明人： Yifeng Wu , Gerald H. Negley , David B. Slater, JR. , Valeri F. Tsvetkov , Alexander Suvorov
IPC分类号： H01L33/00
CPC分类号： H01L33/32 , H01L33/305
摘要： A semiconductor light emitting diode includes a semiconductor substrate, an epitaxial layer of n-type Group III nitride on the substrate, a p-type epitaxial layer of Group III nitride on the n-type epitaxial layer and forming a p-n junction with the n-type layer, and a resistive gallium nitride region on the n-type epitaxial layer and adjacent the p-type epitaxial layer for electrically isolating portions of the p-n junction. A metal contact layer is formed on the p-type epitaxial layer. In method embodiments disclosed, the resistive gallium nitride border is formed by forming an implant mask on the p-type epitaxial region and implanting ions into portions of the p-type epitaxial region to render portions of the p-type epitaxial region semi-insulating. A photoresist mask or a sufficiently thick metal layer may be used as the implant mask.
摘要翻译：半导体发光二极管包括半导体衬底，衬底上的n型III族氮化物的外延层，n型外延层上的III族氮化物的p型外延层，并与n型外延层形成pn结，型层和n型外延层上的电阻性氮化镓区，并且邻近p型外延层，用于电隔离pn结的部分。在p型外延层上形成金属接触层。在公开的方法实施例中，通过在p型外延区上形成注入掩模并将离子注入到p型外延区的一部分中以形成半绝缘的p型外延区的部分来形成电阻性氮化镓边界。可以使用光致抗蚀剂掩模或足够厚的金属层作为植入物掩模。

28. 发明申请

US20080252229A1 High efficiency AC LED driver circuit 有权
标题翻译：高效率交流LED驱动电路
公开(公告)号：US20080252229A1
公开(公告)日：2008-10-16
申请号：US11786907
申请日：2007-04-13
申请人： Yifeng Wu
发明人： Yifeng Wu
IPC分类号： H05B37/00
CPC分类号： H05B33/0803 , H05B33/0809 , Y02B20/342
摘要： In an AC drive circuit for LEDs, a current limiting capacitor connects to an AC source, a first circuit portion, including a first rectifying diode and a first power capacitor, connects between the current limiting capacitor and the source and a second circuit portion, including a second rectifying diode in series with a second power capacitor, is in parallel with the first circuit portion. A first LED is in the first circuit portion in parallel with the first power capacitor, while a second LED in the second circuit portion is in parallel with the second power capacitor. During positive half cycles, the first rectifying diode charges the first power capacitor and drives the first LED. During negative half cycles, the second rectifying diode charges the second power capacitor and drives the second LED.
摘要翻译：在用于LED的AC驱动电路中，限流电容器连接到AC电源，包括第一整流二极管和第一功率电容器的第一电路部分连接在限流电容器和源极之间以及第二电路部分，包括与第二电力电容器串联的第二整流二极管与第一电路部分并联。第一LED与第一电力电容器并联在第一电路部分中，而第二电路部分中的第二LED与第二功率电容器并联。在正半周期期间，第一整流二极管对第一功率电容器充电并驱动第一LED。在负半周期期间，第二整流二极管对第二功率电容器充电并驱动第二LED。

29. 发明申请

US20080230786A1 High temperature performance capable gallium nitride transistor 有权
标题翻译：耐高温性能的氮化镓晶体管
公开(公告)号：US20080230786A1
公开(公告)日：2008-09-25
申请号：US11726975
申请日：2007-03-23
申请人： Sten Heikman , Yifeng Wu
发明人： Sten Heikman , Yifeng Wu
IPC分类号： H01L29/778
CPC分类号： H01L29/7787 , H01L29/2003 , H01L29/402 , H01L29/404 , H01L29/475 , H01L29/66462
摘要： A transistor device capable of high performance at high temperatures. The transistor comprises a gate having a contact layer that contacts the active region. The gate contact layer is made of a material that has a high Schottky barrier when used in conjunction with a particular semiconductor system (e.g., Group-III nitrides) and exhibits decreased degradation when operating at high temperatures. The device may also incorporate a field plate to further increase the operating lifetime of the device.
摘要翻译：在高温下能够高性能的晶体管器件。晶体管包括具有接触有源区的接触层的栅极。当与特定的半导体系统（例如III族氮化物）结合使用时，栅极接触层由具有高肖特基势垒的材料制成，并且在高温下操作时表现出降低的降解。该装置还可以包括场板以进一步增加装置的工作寿命。

30. 发明申请

US20080128752A1 GaN based HEMTs with buried field plates 有权
标题翻译：具有掩埋场板的GaN基HEMT
公开(公告)号：US20080128752A1
公开(公告)日：2008-06-05
申请号：US11901103
申请日：2007-09-13
申请人： Yifeng Wu
发明人： Yifeng Wu
IPC分类号： H01L29/205
CPC分类号： H01L29/778 , H01L29/2003 , H01L29/402 , H01L29/42316 , H01L29/66462 , H01L29/7786 , H01L29/7787 , H01L29/8128
摘要： A transistor comprising an active region, with source and drain electrodes formed in contact with the active region and a gate formed between the source and drain electrodes and in contact with the active region. A first spacer layer is on at least part of the surface of the active region between the gate and the drain electrode and between the gate and the source electrode. The gate comprises a generally t-shaped top portion that extends toward the source and drain electrodes. A field plate is on the spacer layer and under the overhand of at least one section of the gate top portion. The field plate is at least partially covered by a second spacer layer, with the second spacer layer on at least part of the surface of the first active layer and between the gate and the drain and between the gate and the source. At least one conductive path electrically connects the field plate to the source electrode or the gate.
摘要翻译：一种晶体管，包括有源区，源极和漏极形成为与有源区接触，栅极形成在源极和漏极之间并与有源区接触。第一间隔层位于栅极和漏电极之间以及栅极和源电极之间的有源区的表面的至少一部分上。栅极包括朝向源极和漏极延伸的大致t形的顶部部分。场板位于间隔层上并且在栅极顶部的至少一个部分的下方。场板至少部分地被第二间隔层覆盖，其中第二间隔层位于第一有源层的至少部分表面上，并且在栅极和漏极之间以及栅极和源极之间。至少一个导电路径将场板电连接到源电极或栅极。

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