专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US06635943B1 Method and system for reducing charge gain and charge loss in interlayer dielectric formation 有权
标题翻译：降低层间电介质形成中电荷增益和电荷损失的方法和系统
公开(公告)号：US06635943B1
公开(公告)日：2003-10-21
申请号：US09533617
申请日：2000-03-22
申请人： Angela T. Hui , Tuan Duc Pham , Richard J. Huang , Mark T. Ramsbey , Lu You
发明人： Angela T. Hui , Tuan Duc Pham , Richard J. Huang , Mark T. Ramsbey , Lu You
IPC分类号： H01L2900
CPC分类号： H01L21/823425 , H01L21/76819 , H01L21/76837
摘要： A method and system for insulating a lower layer of a semiconductor device from an upper layer of the semiconductor device is disclosed. The method and system include providing an interlayer dielectric on the lower layer. The interlayer dielectric is capable of gap filling while using only species of relatively low mobility. The method and system also include planarizing a surface of the interlayer dielectric.
摘要翻译：公开了一种用于将半导体器件的下层与半导体器件的上层绝缘的方法和系统。该方法和系统包括在下层上提供层间电介质。层间电介质能够间隙填充，同时仅使用相对较低迁移率的物质。该方法和系统还包括平坦化层间电介质的表面。

22. 发明授权

US06420278B1 Method for improving the dielectric constant of silicon-based semiconductor materials 失效
标题翻译：改善硅基半导体材料介电常数的方法
公开(公告)号：US06420278B1
公开(公告)日：2002-07-16
申请号：US09096760
申请日：1998-06-12
申请人： Dawn M. Hopper , Richard J. Huang , Lu You
发明人： Dawn M. Hopper , Richard J. Huang , Lu You
IPC分类号： H01L2131
CPC分类号： H01L21/02134 , H01L21/02282 , H01L21/3124
摘要： An ultra-large scale integrated circuit is manufactured by using silicon-based, low dielectric constant materials in which the dielectric constant has been reduced by spinning on the dielectric to silicon wafers, eliminating soft bake steps, and heating the wafers to about 400° C. for about one hour in a vacuum or inert atmosphere.
摘要翻译：通过使用硅基低介电常数材料制造超大规模集成电路，其中介电常数通过在电介质上旋转至硅晶片而减少，消除了软烘烤步骤，并将晶片加热至约400℃ 在真空或惰性气氛中约1小时。

23. 发明授权

US06136729A Method for improving semiconductor dielectrics 有权
标题翻译：改善半导体电介质的方法
公开(公告)号：US06136729A
公开(公告)日：2000-10-24
申请号：US133042
申请日：1998-08-12
申请人： Dawn M. Hopper , Richard J. Huang , Lu You
发明人： Dawn M. Hopper , Richard J. Huang , Lu You
IPC分类号： H01L21/312 , H01L21/314 , H01L21/316 , H01L21/31
CPC分类号： H01L21/02134 , H01L21/02282 , H01L21/3124 , H01L21/316
摘要： An ultra-large scale integrated circuit is manufactured by using silicon-based, low dielectric materials on a wafer in which the hydrophobic nature of the dielectric materials is improved by relative low temperature heating in a vacuum or inert atmosphere, slowly increasing the wafer temperature to the hard bake temperature at a predetermined ramp rate, and heating the wafer at the hard bake temperature for a predetermine amount of time. As a result, the dielectric material can repel wet etch chemicals and minimize the formation of holes in the dielectric materials due to etching by wet etch chemicals.
摘要翻译：通过在晶片上使用硅基低电介质材料制造超大规模集成电路，其中通过在真空或惰性气氛中的相对低温加热来提高电介质材料的疏水性，缓慢地将晶片温度提高到硬烘烤温度以预定的斜率进行，并且在硬烘烤温度下将晶片加热预定的时间量。结果，电介质材料可以排斥湿蚀刻化学品，并且由于通过湿蚀刻化学品的蚀刻使介电材料中的孔的形成最小化。

24. 发明授权

US06864556B1 CVD organic polymer film for advanced gate patterning 失效
标题翻译：用于先进栅极图案化的CVD有机聚合物膜
公开(公告)号：US06864556B1
公开(公告)日：2005-03-08
申请号：US10335445
申请日：2002-12-31
申请人： Lu You , Marina V. Plat , Chih Yuh Yang , Scott A. Bell , Richard J. Huang , Christopher F. Lyons , Mark S. Chang , Marilyn I. Wright
发明人： Lu You , Marina V. Plat , Chih Yuh Yang , Scott A. Bell , Richard J. Huang , Christopher F. Lyons , Mark S. Chang , Marilyn I. Wright
IPC分类号： G03F7/09 , H01L21/033 , H01L21/28 , H01L21/3213 , H01L21/47 , H01L31/0232
CPC分类号： H01L21/32139 , G03F7/091 , H01L21/0332 , H01L21/28123 , H01L29/785
摘要： A bottom anti-reflective coating comprising an organic polymer layer having substantially no nitrogen and a low compressive stress in relation to a polysilicon layer is employed as the lower layer of a bi-layer antireflective coating/hardmask structure to reduce deformation of a pattern to be formed in a patternable layer. The organic polymer layer is substantially transparent to visible radiation, enabling better detection of alignment marks during a semiconductor device fabrication process and improving overlay accuracy. The organic polymer layer provides excellent step coverage and may be advantageously used in the fabrication of structures such as FinFETs.
摘要翻译：采用底层抗反射涂层，其包含基本上不含氮的有机聚合物层和相对于多晶硅层的低压缩应力作为双层抗反射涂层/硬掩模结构的下层，以减少图案的变形形成在可图案层中。有机聚合物层对可见辐射基本上是透明的，能够在半导体器件制造过程中更好地检测对准标记并提高覆盖精度。有机聚合物层提供优异的台阶覆盖，并且可以有利地用于制造诸如FinFET的结构。

25. 发明授权

US06803313B2 Method for forming a hardmask employing multiple independently formed layers of a pecvd material to reduce pinholes 有权
标题翻译：用于形成采用多个独立形成的pecvd材料层以减少针孔的硬掩模的方法
公开(公告)号：US06803313B2
公开(公告)日：2004-10-12
申请号：US10256368
申请日：2002-09-27
申请人： Pei-Yuan Gao , Lu You , Richard J. Huang
发明人： Pei-Yuan Gao , Lu You , Richard J. Huang
IPC分类号： H01L2144
CPC分类号： H01L21/0332 , H01L21/32139 , H01L2924/0002 , H01L2924/00
摘要： A bi-layer BARC/hardmask structure includes a layer of amorphous carbon and two or more distinct and independently formed layers of a PECVD material such as SiON formed on the amorphous carbon layer. By independently forming several layers of PECVD material, at least some pinholes that are present in the lowermost PECVD layer are closed by upper PECVD layers and therefore do not extend through all of the PECVD layers. As a result the upper surface of the uppermost PECVD layer has a lower pinhole density than the lower PECVD layer. This reduces photoresist poisoning by dopant in the amorphous carbon layer, and etching of the amorphous carbon layer by photoresist stripping chemistry.
摘要翻译：双层BARC /硬掩模结构包括非晶碳层和形成在无定形碳层上的诸如SiON的PECVD材料的两个或更多个不同且独立形成的层。通过独立地形成多层PECVD材料，存在于最低PECVD层中的至少一些针孔由上PECVD层封闭，因此不延伸穿过所有PECVD层。结果，最上面的PECVD层的上表面具有比下PECVD层更低的针孔密度。这减少了无定形碳层中的掺杂剂的光致抗蚀剂中毒，以及通过光刻胶剥离化学法蚀刻无定形碳层。

26. 发明授权

US06689684B1 Cu damascene interconnections using barrier/capping layer 有权
标题翻译：铜镶嵌互连使用屏障/覆盖层
公开(公告)号：US06689684B1
公开(公告)日：2004-02-10
申请号：US09783619
申请日：2001-02-15
申请人： Lu You , Fei Wang , Richard J. Huang
发明人： Lu You , Fei Wang , Richard J. Huang
IPC分类号： H01L214763
CPC分类号： H01L21/76844 , H01L21/76804 , H01L21/7681 , H01L21/76834 , H01L21/76849 , H01L21/76862 , H01L21/76865
摘要： Interconnects to an underlying Cu feature are formed with improved reliability by replacing a portion of the capping layer in the bottom of an opening in an overlying dielectric layer, e.g., an ILD, with a barrier material, such as Ta or TaN. During Ar sputter etching to round the ILD corners, the exposed barrier layer portion is removed and redeposited to form a liner on the side surfaces of the dielectric layer defining the opening, thereby avoiding Cu redeposition on, and/or penetration through, the side surfaces of the dielectric layer.
摘要翻译：通过用诸如Ta或TaN的阻挡材料替换上覆电介质层（例如ILD）中的开口底部的覆盖层的一部分，形成具有改进的可靠性的互连件。在Ar溅射蚀刻以绕过ILD拐角期间，暴露的阻挡层部分被去除并重新沉积以在限定开口的电介质层的侧表面上形成衬垫，从而避免Cu再沉积和/或穿透侧面的介电层。

27. 发明授权

US06530340B2 Apparatus for manufacturing planar spin-on films 有权
标题翻译：平面旋涂薄膜制造装置
公开(公告)号：US06530340B2
公开(公告)日：2003-03-11
申请号：US09190721
申请日：1998-11-12
申请人： Lu You , Dawn Hopper , Richard J. Huang
发明人： Lu You , Dawn Hopper , Richard J. Huang
IPC分类号： B05C1108
CPC分类号： H01L21/76801 , G03F7/16 , H01L21/6715
摘要： This invention describes improved apparatus and methods for spin-on deposition of semiconductor thin films. The improved apparatus provides for controlled temperature, pressure and gas compositions within the deposition chamber. The improved methods comprise dispensing of solutions containing thin film precursor via a moveable dispensing device and the careful regulation of the pattern of deposition of the precursor solution onto the wafer. The invention also comprises the careful regulation of deposition variables including dispensation time, wafer rpm, stop time and rates of wafer rotation. In one embodiment, the precursor solution is dispensed from the outer edge of the wafer toward the center. In alternative embodiments, processors regulate the movement of the dispensing arm and the precursor pump to provide an evenly dispensed layer of precursor solution. The invention also describes improved methods for evaporating solvents and curing thin films. The methods of this invention enable the production of spin-on thin films, which have more even film thickness and uniformity. The semiconductor thin films produced by the methods of this invention are useful for the manufacture of semiconductor devices comprising interlevel dielectric materials.
摘要翻译：本发明描述了用于半导体薄膜的旋涂沉积的改进的装置和方法。改进的装置提供沉积室内的受控温度，压力和气体组成。改进的方法包括通过可移动的分配装置分配含有薄膜前体的溶液，以及仔细调节前体溶液沉积在晶片上的图案。本发明还包括仔细调节沉积变量，包括分配时间，晶片转速，停止时间和晶片旋转速率。在一个实施方案中，前体溶液从晶片的外边缘向中心分配。在替代实施例中，处理器调节分配臂和前驱泵的运动，以提供均匀分配的前体溶液层。本发明还描述了用于蒸发溶剂和固化薄膜的改进方法。本发明的方法能够生产具有更均匀的膜厚度和均匀性的旋涂薄膜。通过本发明的方法生产的半导体薄膜可用于制造包括层间电介质材料的半导体器件。

28. 发明授权

US06407009B1 Methods of manufacture of uniform spin-on films 有权
标题翻译：均匀旋涂膜的制造方法
公开(公告)号：US06407009B1
公开(公告)日：2002-06-18
申请号：US09190722
申请日：1998-11-12
申请人： Lu You , Dawn Hopper , Richard J. Huang
发明人： Lu You , Dawn Hopper , Richard J. Huang
IPC分类号： H01L2130
CPC分类号： H01L21/02134 , B05D1/005 , H01L21/02282 , H01L21/3124
摘要： This invention describes improved apparatus and methods for spin-on deposition of semiconductor thin films. The improved apparatus provides for controlled temperature, pressure and gas compositions within the deposition chamber. The improved methods comprise dispensing of solutions containing thin film precursor via a moveable dispensing device and the careful regulation of the pattern of deposition of the precursor solution onto the wafer. The invention also comprises the careful regulation of deposition variables including dispensation time, wafer rpm, stop time and rates of wafer rotation. In one embodiment, the precursor solution is dispensed from the outer edge of the wafer toward the center. In alternative embodiments, processors regulate the movement of the dispensing arm and the precursor pump to provide an evenly dispensed layer of precursor solution. The invention also describes improved methods for evaporating solvents and curing thin films. The methods of this invention enable the production of spin-on thin films, which have more even film thickness and uniformity. The semiconductor thin films produced by the methods of this invention are useful for the manufacture of semiconductor devices comprising interlevel dielectric materials.
摘要翻译：本发明描述了用于半导体薄膜的旋涂沉积的改进的装置和方法。改进的装置提供沉积室内的受控温度，压力和气体组成。改进的方法包括通过可移动的分配装置分配含有薄膜前体的溶液，以及仔细调节前体溶液沉积在晶片上的图案。本发明还包括仔细调节沉积变量，包括分配时间，晶片转速，停止时间和晶片旋转速率。在一个实施方案中，前体溶液从晶片的外边缘向中心分配。在替代实施例中，处理器调节分配臂和前驱泵的运动，以提供均匀分配的前体溶液层。本发明还描述了用于蒸发溶剂和固化薄膜的改进方法。本发明的方法能够生产具有更均匀的膜厚度和均匀性的旋涂薄膜。通过本发明的方法生产的半导体薄膜可用于制造包括层间电介质材料的半导体器件。

29. 发明授权

US06388309B1 Apparatus and method for manufacturing semiconductors using low dielectric constant materials 有权
标题翻译：使用低介电常数材料制造半导体的装置和方法
公开(公告)号：US06388309B1
公开(公告)日：2002-05-14
申请号：US09687180
申请日：2000-10-12
申请人： Lu You , Dawn M. Hopper , Richard J. Huang
发明人： Lu You , Dawn M. Hopper , Richard J. Huang
IPC分类号： H01L2358
CPC分类号： H01L21/02118 , H01L21/02134 , H01L21/02282 , H01L21/02362 , H01L21/312 , H01L21/3124 , Y10S438/913
摘要： An ultra-large scale integrated circuit is manufactured by using silicon-based, low dielectric constant materials which are spin-coated, dried, cured, and capped in-situ in chemical vapor deposition equipment. The low dielectric constant material is spun on, processed in chemical vapor deposition equipment, subject to chemical-mechanical polishing, and then processed by a conventional photolithographic process for depositing conductors. The material is then reprocessed for each successive layer of conductor separated by dielectric.
摘要翻译：通过使用硅基低介电常数材料制造超大规模集成电路，其在化学气相沉积设备中原位旋涂，干燥，固化和封盖。将低介电常数材料旋转，在化学气相沉积设备中进行处理，经受化学机械抛光，然后通过用于沉积导体的常规光刻工艺进行处理。然后对由电介质隔开的导体的每个连续层重新处理该材料。

30. 发明授权

US06387825B2 Solution flow-in for uniform deposition of spin-on films 有权
标题翻译：溶液流入用于均匀沉积旋涂膜
公开(公告)号：US06387825B2
公开(公告)日：2002-05-14
申请号：US09191435
申请日：1998-11-12
申请人： Lu You , Dawn Hopper , Richard J. Huang
发明人： Lu You , Dawn Hopper , Richard J. Huang
IPC分类号： H01L2131
CPC分类号： H01L21/02134 , B05D1/005 , H01L21/02282 , H01L21/312 , H01L21/3124
摘要： This invention describes improved apparatus and methods for spin-on deposition of thin films applicable to the manufacture of semiconductor devices. The improved apparatus provides for controlled temperature, pressure and gas compositions within the deposition chamber. The improved methods comprise dispensing of solutions containing thin film precursor via a moveable dispensing device and the careful regulation of the pattern of deposition of the precursor solution onto the wafer. The invention also comprises the careful regulation of deposition variables including dispensation time, wafer rpm, stop time and rates of wafer rotation. In one embodiment, the precursor solution is dispensed from the outer edge of the wafer toward the center. In alternative embodiments, processors regulate the movement of the dispensing arm and the precursor pump to provide an evenly dispensed layer of precursor solution. The invention also describes improved methods for evaporating solvents and curing thin films. The methods of this invention enable the production of spin-on thin films, which have more even film thickness and uniformity. The thin films produced by the methods of this invention are useful for the manufacture of semiconductor devices comprising interlevel dielectric materials.
摘要翻译：本发明描述了适用于制造半导体器件的薄膜的旋涂沉积的改进的装置和方法。改进的装置提供沉积室内的受控温度，压力和气体组成。改进的方法包括通过可移动的分配装置分配含有薄膜前体的溶液，以及仔细调节前体溶液沉积在晶片上的图案。本发明还包括仔细调节沉积变量，包括分配时间，晶片转速，停止时间和晶片旋转速率。在一个实施方案中，前体溶液从晶片的外边缘向中心分配。在替代实施例中，处理器调节分配臂和前驱泵的运动，以提供均匀分配的前体溶液层。本发明还描述了用于蒸发溶剂和固化薄膜的改进方法。本发明的方法能够生产具有更均匀的膜厚度和均匀性的旋涂薄膜。通过本发明的方法生产的薄膜可用于制造包括层间电介质材料的半导体器件。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式