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21. 发明授权

US08094432B2 Multilayer ceramic electronic component and method for manufacturing the same 有权
标题翻译：多层陶瓷电子元件及其制造方法
公开(公告)号：US08094432B2
公开(公告)日：2012-01-10
申请号：US12356648
申请日：2009-01-21
申请人： Akihiro Motoki , Makoto Ogawa , Shunsuke Takeuchi , Kenichi Kawasaki
发明人： Akihiro Motoki , Makoto Ogawa , Shunsuke Takeuchi , Kenichi Kawasaki
IPC分类号： H01G4/06
CPC分类号： H01G4/005 , H01G4/232 , H01G4/30 , H01G13/006
摘要： A method for manufacturing a multilayer ceramic electronic component includes a first substep of depositing precipitates primarily made of a specific metal on an end of each of internal electrodes exposed at a predetermined surface of a laminate and growing the precipitates to coalesce into a continuous plated sublayer, and a second substep of heat-treating the laminate including the plated sublayer at a temperature of at least about 800° C., wherein a plated layer including a plurality of plated sublayers is formed by continuously performing at least two cycles of the first substep and the second substep.
摘要翻译：一种多层陶瓷电子部件的制造方法，其特征在于，在层叠体的规定表面露出的内部电极的一端形成沉积有特定金属的析出物的第一子步骤，使析出物凝集成连续的镀层，以及第二子步骤，其在至少约800℃的温度下对包含所述镀层的层压板进行热处理，其中通过连续地执行所述第一子步骤和所述第一子步骤的至少两个循环来形成包括多个电镀子层的镀层，第二子步。

22. 发明授权

US07765661B2 Method for manufacturing ceramic electronic component and planting bath 有权
标题翻译：制造陶瓷电子元件和种植浴的方法
公开(公告)号：US07765661B2
公开(公告)日：2010-08-03
申请号：US11909736
申请日：2006-02-01
申请人： Akihiro Motoki , Makoto Ogawa , Seiichi Matsumoto , Yoshihiko Takano , Tatsuo Kunishi
发明人： Akihiro Motoki , Makoto Ogawa , Seiichi Matsumoto , Yoshihiko Takano , Tatsuo Kunishi
IPC分类号： H01G7/00 , C25D5/00 , H01G4/008
CPC分类号： C25D5/54 , C25D3/30 , C25D11/34 , H01G4/005 , H01G4/1227 , H01G13/00 , Y10T29/42 , Y10T29/43 , Y10T29/435 , Y10T29/49002 , Y10T29/4902
摘要： A method for manufacturing a ceramic electronic component having excellent solderability is provided. In this method, the elution of barium from the ceramic electronic component and the adhesion of ceramic electronic components in tin plating are reduced. The method for manufacturing a ceramic electronic component includes the steps of providing an electronic component of barium-containing ceramic and forming an electrode on the outer surface of the electronic component, the electrode being electroplated with tin. In this method, a plating bath used in the tin plating has a tin ion concentration A in the range of 0.03 to 0.51 mol/L, a sulfate ion concentration B in the range of 0.005 to 0.31 mol/L, a molar ratio B/A of less than one, and a pH in the range of 6.1 to 10.5.
摘要翻译：提供了具有优异的可焊性的陶瓷电子部件的制造方法。在该方法中，钡从陶瓷电子部件的洗脱以及陶瓷电子部件在镀锡中的粘附性降低。制造陶瓷电子部件的方法包括以下步骤：提供含钡陶瓷的电子部件，并在电子部件的外表面上形成电极，电极用锡电镀。在该方法中，镀锡中使用的镀浴的锡离子浓度A为0.03〜0.51mol / L，硫酸根离子浓度B为0.005〜0.31mol / L，摩尔比B / A小于1，pH范围为6.1至10.5。

23. 发明授权

US07719819B2 Laminated electronic component and method for manufacturing the same 有权
标题翻译：层压电子部件及其制造方法
公开(公告)号：US07719819B2
公开(公告)日：2010-05-18
申请号：US12043225
申请日：2008-03-06
申请人： Akihiro Motoki , Makoto Ogawa , Tatsuo Kunishi , Jun Nishikawa , Yoshihiko Takano , Shigeyuki Kuroda
发明人： Akihiro Motoki , Makoto Ogawa , Tatsuo Kunishi , Jun Nishikawa , Yoshihiko Takano , Shigeyuki Kuroda
IPC分类号： H01G4/06 , H01G7/00
CPC分类号： H01G4/30 , H01G4/0085 , H01G4/012 , H01G4/232 , Y10T29/435
摘要： A method for manufacturing a laminated electronic component is performed such that a water-repellent agent is applied to end surfaces at which ends of internal electrodes are exposed so as to be filled in spaces along interfaces between insulating layers and the internal electrodes. Subsequently, an abrading step is performed such that the internal electrodes are sufficiently exposed at the end surfaces and an excess water-repellent agent is removed therefrom to enable plating films to be directly formed on the end surfaces.
摘要翻译：进行层叠电子部件的制造方法，使得将防水剂施加到内部电极的端部露出的端面，以在绝缘层和内部电极之间的界面填充空间。接着，进行研磨工序，使内部电极在端面充分露出，从其中除去多余的防水剂，使得能够在端面上直接形成镀膜。

24. 发明申请

US20070074214A1 Event processing method in a computer system 审中-公开
标题翻译：计算机系统中的事件处理方法
公开(公告)号：US20070074214A1
公开(公告)日：2007-03-29
申请号：US11519228
申请日：2006-09-12
申请人： Hiroshi Ueno , Satoshi Kamiya , Koichi Sato , Akihiro Motoki , Kiyohisa Ichino
发明人： Hiroshi Ueno , Satoshi Kamiya , Koichi Sato , Akihiro Motoki , Kiyohisa Ichino
IPC分类号： G06F9/46
CPC分类号： G06F9/542 , G06F2209/543
摘要： A computer system includes a central processing unit (CPU), a plurality of dedicated processing units (DPUs) for transferring therebetween event descriptors for allocating CPU processings to the DPUs. The computer system includes a plurality of event controllers each associated a corresponding one of the DPUs or CPU. The event controller receives the event descriptors issued by the DPUs and enters the event descriptors in a representative-vent queue in the order of the priority of the event descriptors.
摘要翻译：计算机系统包括中央处理单元（CPU），用于在其间传送用于将CPU处理分配给DPU的事件描述符的多个专用处理单元（DPU）。计算机系统包括多个事件控制器，每个事件控制器与DPU或CPU中的相应的一个相关联。事件控制器接收由DPU发出的事件描述符，并按照事件描述符的优先级顺序将事件描述符输入到代表排放队列中。

25. 发明申请

US20050171943A1 Method and system for retrieving a data pattern 有权
标题翻译：检索数据模式的方法和系统
公开(公告)号：US20050171943A1
公开(公告)日：2005-08-04
申请号：US11045090
申请日：2005-01-31
申请人： Kiyohisa Ichino , Akihiro Motoki
发明人： Kiyohisa Ichino , Akihiro Motoki
IPC分类号： G06F17/30 , G06F7/00
CPC分类号： G06F17/30985
摘要： A data retrieval system includes a retrieval request block for generating a retrieval key including a current state number and a current character string including N characters latched from an input character string, and a state transition memory operating for retrieval based on a state transition table. The state transition table includes a plurality of input entries each including a combination of a current state number and a character pattern string having N characters, and a plurality of output entries each including combination of a next state number and a pattern number of a character pattern retrieved from the input character string. The state transition memory operates for a plurality of retrievals in parallel retrieval processing.
摘要翻译：数据检索系统包括检索请求块，用于生成包括当前状态号和包括从输入字符串锁存的N个字符的当前字符串的检索关键字，以及基于状态转换表进行检索的状态转换存储器。状态转换表包括多个输入条目，每个输入条目包括当前状态号码和具有N个字符的字符图案串的组合，以及多个输出条目，每个输入条目包括下一个状态号码和字符图案的模式号码的组合从输入字符串中检索。状态转换存储器在并行检索处理中用于多个检索。

26. 发明授权

US06911138B2 Method for plating electrodes of ceramic chip electronic components 有权
标题翻译：陶瓷芯片电子部件电极电镀方法
公开(公告)号：US06911138B2
公开(公告)日：2005-06-28
申请号：US10243183
申请日：2002-09-13
申请人： Akihiro Motoki , Shoichi Higuchi , Yoshihiko Takano , Kunihiko Hamada
发明人： Akihiro Motoki , Shoichi Higuchi , Yoshihiko Takano , Kunihiko Hamada
IPC分类号： C25D3/32 , C25D7/00 , C25D7/12 , C25D17/16 , C25D3/60 , C25D3/30
CPC分类号： C25D7/12 , C25D3/32 , C25D17/16
摘要： A method for plating electrodes of ceramic chip electronic components includes performing electroplating in a plating bath. The plating bath contains tin (II) sulfamate, acting as a tin (II) salt; a complexing agent including at least one selected from the group consisting of citric acid, gluconic acid, pyrophosphoric acid, heptoic acid, malonic acid, malic acid, salts of these acids, and gluconic lactone; and a brightener including at least one surfactant having an HLB value of about 10 or more. The tin plating adhesion of the resulting ceramic chip electronic components can be limited to a certain level.
摘要翻译：陶瓷芯片电子部件的电极电镀方法包括在电镀液中进行电镀。电镀液含有锡（II）氨基磺酸盐，作为锡（II）盐; 包括选自柠檬酸，葡萄糖酸，焦磷酸，庚酸，丙二酸，苹果酸，这些酸的盐和葡萄糖酸内酯中的至少一种的络合剂; 以及包含HLB值为约10以上的至少一种表面活性剂的增白剂。所得到的陶瓷芯片电子部件的镀锡附着力可以限制在一定水平。

27. 发明授权

US09489224B2 Network virtualization system, physical node, and virtual interface identification method in virtual machine 有权
标题翻译：虚拟机中的网络虚拟化系统，物理节点和虚拟接口识别方法
公开(公告)号：US09489224B2
公开(公告)日：2016-11-08
申请号：US13993065
申请日：2011-10-04
申请人： Akihiro Motoki
发明人： Akihiro Motoki
IPC分类号： G06F9/45 , G06F9/445 , G06F9/455 , H04L12/24
CPC分类号： G06F9/45533 , H04L41/0806
摘要： A domain management apparatus instructs physical nodes about the configuration of virtual nodes and virtual links of virtual networks. The physical nodes assign a virtual machine to a virtual node based on the definition of the virtual node contained in an instruction from the domain management apparatus. The physical nodes write a configuration associating virtual interfaces in the virtual node definition with virtual NICs on the virtual machine into a configuration file of the operating system to be started up on the virtual machine before the start-up of the virtual machine and, then, start up the virtual machine. Therefore, it is possible to recognize the correspondence relation between the virtual interface in the virtual node definition and the virtual NIC in the virtual machine without referring to the virtual network assignment result and without waiting for the start-up of the virtual machine.
摘要翻译：域管理装置向物理节点指示虚拟网络的虚拟节点和虚拟链路的配置。物理节点基于来自域管理装置的指令中包含的虚拟节点的定义，将虚拟机分配给虚拟节点。物理节点写入将虚拟节点定义中的虚拟接口与虚拟机上的虚拟NIC相关联的配置，以在虚拟机启动之前在虚拟机上启动的操作系统的配置文件中，启动虚拟机。因此，可以在不参照虚拟网络分配结果的情况下，识别虚拟节点定义中的虚拟接口与虚拟机中的虚拟NIC之间的对应关系，而不用等待虚拟机的启动。

28. 发明授权

US09171671B2 Laminate type electronic component and manufacturing method therefor 有权
标题翻译：层压型电子元件及其制造方法
公开(公告)号：US09171671B2
公开(公告)日：2015-10-27
申请号：US13315311
申请日：2011-12-09
申请人： Akihiro Motoki , Makoto Ogawa
发明人： Akihiro Motoki , Makoto Ogawa
IPC分类号： H01G4/30 , H01G4/06 , H01G4/12 , H01G4/005 , H01G4/008 , H01G4/228 , H01G11/34
CPC分类号： H01G4/12 , H01G4/005 , H01G4/008 , H01G4/228 , H01G4/30 , H01G11/34 , Y02E60/13
摘要： In a method of manufacturing a laminate type electronic component, while the distance between adjacent exposed ends of a plurality of internal electrodes is adjusted preferably to be about 50 μm or less, a plurality of conductive particles composed of Pd, Pt, Cu, Au, or Ag are provided on the surface of a component main body. The conductive particles have an average particle size of about 0.1 nm to about 100 nm, which are distributed in island-shaped configurations over the entire surface of the component main body, while the average distance between the respective conductive particles is adjusted to fall within the range of about 10 nm to about 100 nm. The component main body is subjected to electrolytic plating such that plating growth develops in and around a region including the respective exposed ends of the plurality of internal electrodes.
摘要翻译：在层压型电子部件的制造方法中，将多个内部电极的相邻的露出端之间的距离优选调整为约50μm以下，由Pd，Pt，Cu，Au，或Ag设置在组件主体的表面上。导电性粒子的平均粒径为约0.1nm〜约100nm，分布在成分主体的整个表面上的岛状构型，同时将各导电粒子之间的平均距离调节为范围为约10nm至约100nm。对组件主体进行电镀，使得电镀生长在包括多个内部电极的各个露出端的区域内和周围形成。

29. 发明授权

US09013859B2 Laminated electronic component and manufacturing method therefor 有权
标题翻译：层压电子部件及其制造方法
公开(公告)号：US09013859B2
公开(公告)日：2015-04-21
申请号：US13020886
申请日：2011-02-04
申请人： Masahito Saruban , Makoto Ogawa , Akihiro Motoki , Syunsuke Takeuchi , Kiyoyasu Sakurada
发明人： Masahito Saruban , Makoto Ogawa , Akihiro Motoki , Syunsuke Takeuchi , Kiyoyasu Sakurada
IPC分类号： H01G4/228 , H01G4/06 , H01G4/30 , H01G4/005 , H01G13/00 , H01F17/00 , H01L41/293
CPC分类号： H01G4/30 , H01F17/0013 , H01G4/005 , H01G13/00 , H01L41/293
摘要： A method for manufacturing a laminated electronic component in which, when first plating layers that respectively connect a plurality of internal electrodes to each other and second plating layers that improves the mountability of a laminated electronic component are formed as external terminal electrodes, the entire component main body is treated with a water repellent agent after the formation of the first plating layers, and the water repellent agent on the first plating layers is then removed before the formation of the second plating layers. The gaps between the end edges of the first plating films on the outer surface of the component main body and the outer surface of the component main body are filled with the water repellent agent.
摘要翻译：一种层叠电子部件的制造方法，其中，当分别连接多个内部电极彼此连接的第一镀层和提高层压电子部件的安装性的第二镀层形成为外部端子电极时，整个部件主体在形成第一镀层之后，用防水剂处理体，然后在形成第二镀层之前去除第一镀层上的防水剂。在组件主体的外表面上的第一镀膜的端缘与部件主体的外表面之间的间隙填充有防水剂。

30. 发明授权

US08724291B2 Laminated electronic component and method for manufacturing the same 有权
公开(公告)号：US08724291B2
公开(公告)日：2014-05-13
申请号：US13365280
申请日：2012-02-03
申请人： Kenichi Kawasaki , Shunsuke Takeuchi , Akihiro Motoki , Makoto Ogawa , Toshiyuki Iwanaga
发明人： Kenichi Kawasaki , Shunsuke Takeuchi , Akihiro Motoki , Makoto Ogawa , Toshiyuki Iwanaga
IPC分类号： H01G4/00
CPC分类号： H01G4/005 , H01G4/008 , H01G4/232
摘要： A laminated electronic component includes outer terminal electrodes including lower plating films including metal particles having an average size of 0.5 μm or less, the lower plating films being formed by directly plating an outer surface of an electronic component body such that the lower plating films are electrically connected to exposed portions of inner conductors. The outer terminal electrodes may further include upper plating films formed on the lower plating films, the upper plating films being defined by one or more layers. Metal particles defining the upper plating films may have an average size of 0.5 μm or less. The metal particles defining the lower plating films may be Cu particles.

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