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    • 21. 发明申请
    • Multi-level cell memory device and method thereof
    • 多级单元存储装置及其方法
    • US20080137414A1
    • 2008-06-12
    • US11808173
    • 2007-06-07
    • Sung Chung ParkJun Jin KongYoung Hwan LeeDong Ku Kang
    • Sung Chung ParkJun Jin KongYoung Hwan LeeDong Ku Kang
    • G11C7/10
    • G11C11/5621G11C7/1006G11C29/00
    • A Multi-Level Cell (MLC) memory device and method thereof are provided. The example MLC memory device may be configured to perform data operations, and may include an MLC memory cell, a first coding device performing a first coding function, the first coding function being one of an encoding function and a decoding function, a second coding device performing a second coding function, the second coding function being one of an encoding function and a decoding function and a signal module configured to perform at least one of instructing the MLC memory cell to store data output by the second coding device if the first and second coding functions are encoding functions, and generating a demapped bit stream based on data retrieved from the MLC memory cell if the first and second coding functions are decoding functions.
    • 提供了一种多级单元(MLC)存储器件及其方法。 示例MLC存储器件可以被配置为执行数据操作,并且可以包括MLC存储器单元,执行第一编码功能的第一编码装置,作为编码功能和解码功能之一的第一编码功能,第二编码装置 执行第二编码功能,所述第二编码功能是编码功能和解码功能之一;以及信号模块,被配置为执行指令所述MLC存储器单元存储由所述第二编码装置输出的数据中的至少一个,如果所述第一和第二编码功能 编码功能是编码功能,并且如果第一和第二编码功能是解码功能,则基于从MLC存储器单元检索的数据来生成解映射比特流。
    • 23. 发明申请
    • Multi-level cell memory device and method thereof
    • 多级单元存储装置及其方法
    • US20110213930A1
    • 2011-09-01
    • US13067099
    • 2011-05-09
    • Sung Chung ParkJun Jin KongYoung Hwan LeeDong Ku Kang
    • Sung Chung ParkJun Jin KongYoung Hwan LeeDong Ku Kang
    • G06F12/08
    • G11C11/5621G11C7/1006G11C29/00
    • A Multi-Level Cell (MLC) memory device and method thereof are provided. The example MLC memory device may be configured to perform data operations, and may include an MLC memory cell, a first coding device performing a first coding function, the first coding function being one of an encoding function and a decoding function, a second coding device performing a second coding function, the second coding function being one of an encoding function and a decoding function and a signal module configured to perform at least one of instructing the MLC memory cell to store data output by the second coding device if the first and second coding functions are encoding functions, and generating a demapped bit stream based on data retrieved from the MLC memory cell if the first and second coding functions are decoding functions.
    • 提供了一种多级单元(MLC)存储器件及其方法。 示例MLC存储器件可以被配置为执行数据操作,并且可以包括MLC存储器单元,执行第一编码功能的第一编码装置,作为编码功能和解码功能之一的第一编码功能,第二编码装置 执行第二编码功能,所述第二编码功能是编码功能和解码功能之一;以及信号模块,被配置为执行指令所述MLC存储器单元存储由所述第二编码装置输出的数据中的至少一个,如果所述第一和第二编码功能 编码功能是编码功能,并且如果第一和第二编码功能是解码功能,则基于从MLC存储器单元检索的数据来生成解映射比特流。
    • 26. 发明授权
    • Multi-level cell memory device and method thereof
    • 多级单元存储装置及其方法
    • US08255770B2
    • 2012-08-28
    • US13067099
    • 2011-05-09
    • Sung Chung ParkJun Jin KongYoung Hwan LeeDong Ku Kang
    • Sung Chung ParkJun Jin KongYoung Hwan LeeDong Ku Kang
    • G11C29/00H03M13/00
    • G11C11/5621G11C7/1006G11C29/00
    • A Multi-Level Cell (MLC) memory device and method thereof are provided. The example MLC memory device may be configured to perform data operations, and may include an MLC memory cell, a first coding device performing a first coding function, the first coding function being one of an encoding function and a decoding function, a second coding device performing a second coding function, the second coding function being one of an encoding function and a decoding function and a signal module configured to perform at least one of instructing the MLC memory cell to store data output by the second coding device if the first and second coding functions are encoding functions, and generating a demapped bit stream based on data retrieved from the MLC memory cell if the first and second coding functions are decoding functions.
    • 提供了一种多级单元(MLC)存储器件及其方法。 示例MLC存储器件可以被配置为执行数据操作,并且可以包括MLC存储器单元,执行第一编码功能的第一编码装置,作为编码功能和解码功能之一的第一编码功能,第二编码装置 执行第二编码功能,所述第二编码功能是编码功能和解码功能之一;以及信号模块,被配置为执行指令所述MLC存储器单元存储由所述第二编码装置输出的数据中的至少一个,如果所述第一和第二编码功能 编码功能是编码功能,并且如果第一和第二编码功能是解码功能,则基于从MLC存储器单元检索的数据来生成解映射比特流。