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21. 发明申请

US20140125398A1 Driver Integrated Circuit 有权
标题翻译：驱动器集成电路
公开(公告)号：US20140125398A1
公开(公告)日：2014-05-08
申请号：US14122623
申请日：2012-05-24
申请人： Wen Li , Norio Chujo , Masami Makuuchi , Takehito Kamimura
发明人： Wen Li , Norio Chujo , Masami Makuuchi , Takehito Kamimura
IPC分类号： H03K19/0175
CPC分类号： H03K19/0175 , H01L2224/48137 , H01L2924/181 , H03F1/52 , H03F3/195 , H03F3/211 , H03F3/3022 , H03F2200/189 , H03K19/017509 , H01L2924/00012
摘要： Provided is a configuration of a driver integrated circuit that can output a voltage exceeding the withstand voltage of a process, and that satisfies required apparatus performance (high speed and high voltage). A differential input circuit, a level shift circuit, and an output circuit are manufactured by the same process and divided and disposed on three or more chips with different substrate potentials (sub-potentials). By setting different applied voltages to the substrates of the chips, an output voltage greater than the process withstand voltage can be provided (see FIG. 2).
摘要翻译：提供可以输出超过工艺耐压的电压并满足所需设备性能（高速和高电压）的驱动器集成电路的结构。差分输入电路，电平移位电路和输出电路通过相同的工艺制造并且被分配和布置在具有不同衬底电位（子电位）的三个或更多个芯片上。通过对芯片的基板设置不同的施加电压，可以提供大于工艺耐受电压的输出电压（参见图2）。

22. 发明授权

US08401347B2 Photoelectric composite wiring module and method for manufacturing the same 有权
标题翻译：光电复合布线模块及其制造方法
公开(公告)号：US08401347B2
公开(公告)日：2013-03-19
申请号：US12623686
申请日：2009-11-23
申请人： Naoki Matsushima , Norio Chujo , Yasunobu Matsuoka , Toshiki Sugawara , Madoka Minagawa , Saori Hamamura , Satoshi Kaneko , Tsutomu Kono
发明人： Naoki Matsushima , Norio Chujo , Yasunobu Matsuoka , Toshiki Sugawara , Madoka Minagawa , Saori Hamamura , Satoshi Kaneko , Tsutomu Kono
IPC分类号： G02B6/12
CPC分类号： G02B6/4214 , H05K1/0274 , H05K1/185 , H05K3/4602 , H05K3/4644
摘要： A photoelectric composite wiring module includes a circuit substrate, an optical device, an LSI (device) having a driver and an amplifier for the optical device, and a thin film wiring layer having an electrical wiring. The optical device is connected with the LSI by means of the electrical wiring. The optical device is formed on the circuit substrate and optically coupled to an optical waveguide formed in the circuit substrate. The thin film wiring layer is formed on the optical device to ensure that the optical device is electrically connected with the electrical wiring of the thin film wiring layer. The LSI is mounted on and electrically connected with the thin film wiring layer.
摘要翻译：光电复合布线模块包括电路基板，光学装置，具有用于光学装置的驱动器和放大器的LSI（器件）以及具有电布线的薄膜布线层。光学器件通过电线与LSI连接。光学器件形成在电路基板上，并且光耦合到形成在电路基板中的光波导。在光学器件上形成薄膜布线层，以确保光学器件与薄膜布线层的电气布线电连接。 LSI与薄膜布线层安装在电连接上。

23. 发明申请

US20120075021A1 WIDEBAND LOW NOISE SENSOR AMPLIFIER CIRCUIT 有权
标题翻译：宽带低噪声传感器放大器电路
公开(公告)号：US20120075021A1
公开(公告)日：2012-03-29
申请号：US12892988
申请日：2010-09-29
申请人： Masayoshi Takahashi , Norio Chujo , Masami Makuuchi
发明人： Masayoshi Takahashi , Norio Chujo , Masami Makuuchi
IPC分类号： H03F1/00
CPC分类号： H03F1/08 , H03F3/45098 , H03F2200/213 , H03F2200/261 , H03F2200/411 , H03F2203/45458
摘要： A circuit having a sensor with a stray capacitance value. An output from the sensor is connected to the input of an amplifier while a negative capacitance circuit is electrically connected in parallel with the sensor output. The negative capacitance circuit reduces the effect of the sensor stray capacitance to provide an increased bandwidth and decreased noise on the amplifier output.
摘要翻译：具有具有杂散电容值的传感器的电路。传感器的输出连接到放大器的输入端，而负电容电路与传感器输出端并联电连接。负电容电路降低了传感器杂散电容的影响，从而提高了放大器输出端的带宽和降低的噪声。

24. 发明申请

US20110215830A1 OUTPUT BUFFER CIRCUIT AND DIFFERENTIAL OUTPUT BUFFER CIRCUIT, AND TRANSMISSION METHOD 有权
标题翻译：输出缓冲电路和差分输出缓冲电路及传输方式
公开(公告)号：US20110215830A1
公开(公告)日：2011-09-08
申请号：US13106926
申请日：2011-05-13
申请人： Satoshi MURAOKA , Norio Chujo , Ritsuro Orihashi
发明人： Satoshi MURAOKA , Norio Chujo , Ritsuro Orihashi
IPC分类号： H03K19/003
CPC分类号： H03K19/018521
摘要： An output buffer includes inverters, a delay circuit for delaying an input signal, buffers and switches. The output buffer transmits a logic signal to a transmission path and, in accordance with an amount of signal attenuation in the transmission path, creates a waveform including four or more kinds of signal voltages. The buffers are redundantly connected in parallel, and the number of buffers concurrently turn ON is controlled by respective switches provided in series with output resistors of the buffers. By selecting the buffers of switches which are turned ON, the preemphasis amount and a number of preemphasis taps are adjusted through a selector logic selection signal so that the preemphasis amount is made variable and the ON resistance of the buffers is made constant.
摘要翻译：输出缓冲器包括反相器，用于延迟输入信号的延迟电路，缓冲器和开关。输出缓冲器将逻辑信号发送到传输路径，并且根据传输路径中的信号衰减量产生包括四种或更多种信号电压的波形。缓冲器并联冗余连接，同时导通的缓冲器的数量由与缓冲器的输出电阻器串联提供的相应开关控制。通过选择接通的开关的缓冲器，通过选择器逻辑选择信号调整预加重量和预加重抽头数，使预加重量变为可变，并使缓冲器的导通电阻保持恒定。

25. 发明申请

US20100315166A1 Variable Gain Circuit 有权
标题翻译：可变增益电路
公开(公告)号：US20100315166A1
公开(公告)日：2010-12-16
申请号：US12797121
申请日：2010-06-09
申请人： Takehito KAMIMURA , Norio Chujo
发明人： Takehito KAMIMURA , Norio Chujo
IPC分类号： H03G3/10
CPC分类号： H03G1/0088 , H03F3/72 , H03F2203/7206 , H03G1/0029 , H03G3/3084
摘要： There is provided a variable gain circuit system which is inductorless and capable of achieving a high gain and a wide band by elements for achieving variable gain to prevent decreasing a gain or deteriorating the band. The variable gain circuit includes: transistors; a resistor connected as a load of each transistor; a voltage source applying a bias voltage to each gate of the transistors; a switch selectively connecting the voltage source or a ground potential to each gate of the transistors in accordance with gain setting; and a current source connected to a common input. A drain of each transistor is connected to an input of a circuit in a subsequent stage.
摘要翻译：提供了一种可变增益电路系统，其是无电感的并且能够通过用于实现可变增益的元件实现高增益和宽带，以防止降低增益或使频带恶化。可变增益电路包括：晶体管; 作为每个晶体管的负载连接的电阻器; 对晶体管的每个栅极施加偏置电压的电压源; 开关根据增益设置选择性地将电压源或接地电位连接到晶体管的每个栅极; 以及连接到公共输入的电流源。每个晶体管的漏极在后续阶段连接到电路的输入端。

26. 发明申请

US20100219856A1 OUTPUT BUFFER CIRCUIT AND DIFFERENTIAL OUTPUT BUFFER CIRCUIT, AND TRANSMISSION METHOD 有权
标题翻译：输出缓冲电路和差分输出缓冲电路及传输方式
公开(公告)号：US20100219856A1
公开(公告)日：2010-09-02
申请号：US12716796
申请日：2010-03-03
申请人： Satoshi MURAOKA , Norio Chujo , Ritsuro Orihashi
发明人： Satoshi MURAOKA , Norio Chujo , Ritsuro Orihashi
IPC分类号： H03K19/003 , H03K19/094
CPC分类号： H03K19/018521
摘要： In an output buffer circuit including Inverter 1 to Inverter 3, Delay Circuit 1 to Delay Circuit 3 for delaying an input signal for a specific time, Buffer 1 to Buffer 3, and a function for transmitting a logic signal to a transmission path and in accordance with an amount of signal attenuation in the transmission path, creating at a transmission side a waveform including four or more kinds of signal voltages, the preemphasis amount is made variable and the ON resistance Rs of the buffer is made constant. Selector circuit 1 to Selector circuit 3 are situated before the buffers, the inverter, capable of selecting through selector logic a signal to be inputted to the buffer, inverts a data signal, and the preemphasis amount and the number of preemphasis taps are adjusted through a selection signal for the selector logic.
摘要翻译：在包括变频器1至变频器3的输出缓冲电路中，延迟电路1至延迟电路3用于将输入信号延迟特定时间，缓冲器1至缓冲器3，以及用于将逻辑信号发送到传输路径的功能在传输路径中具有一定量的信号衰减，在发送侧产生包括四种或更多种信号电压的波形，使预加重量变为可变，并使缓冲器的导通电阻Rs保持恒定。选择器电路1至选择器电路3位于缓冲器之前，反相器能够通过选择器逻辑选择要输入到缓冲器的信号，反转数据信号，并且预加重量和预加重数量通过一个选择器逻辑的选择信号。

27. 发明申请

US20080231330A1 RAMP GENERATOR AND CIRCUIT PATTERN INSPECTION APPARATUS USING THE SAME RAMP GENERATOR 有权
标题翻译：使用相同RAMP发电机的RAMP发电机和电路图案检查装置
公开(公告)号：US20080231330A1
公开(公告)日：2008-09-25
申请号：US12044108
申请日：2008-03-07
申请人： Masayoshi Takahashi , Kengo Imagawa , Norio Chujo
发明人： Masayoshi Takahashi , Kengo Imagawa , Norio Chujo
IPC分类号： H03K4/06
CPC分类号： H03K4/06 , H01J37/1477 , H01J37/28 , H03K3/0231
摘要： The present invention provides a ramp generator capable of appropriately setting a rise starting point of an output voltage of a ramp waveform and an output voltage at the time of stable output. A current adjustment unit including a differential pair of transistors and an amplifier constitute a feedback circuit. By controlling the charging/discharging of an integration capacitor by ON/OFF of a discharge current source connected to a common emitter terminal of the current adjustment unit, an output of the ramp waveform outputted from an output terminal disposed at the connection end of the integration capacitor is controlled.
摘要翻译：本发明提供一种斜坡发生器，其能够适当地设定稳定输出时的斜坡波形的输出电压的上升起点和输出电压。包括差分对晶体管和放大器的电流调节单元构成反馈电路。通过连接到电流调节单元的公共发射极端子的放电电流源的ON / OFF来控制积分电容器的充电/放电，从设置在集成连接端的输出端子输出的斜坡波形的输出电容器被控制。

28. 发明申请

US20080159460A1 ADJUSTMENT METHOD, CIRCUIT, RECEIVER CIRCUIT AND TRANSMISSION EQUIPMENT OF WAVEFORM EQUALIZATION COEFFICIENT 有权
标题翻译：调整方法，电路，接收机电路和波形均衡系统的传输设备
公开(公告)号：US20080159460A1
公开(公告)日：2008-07-03
申请号：US11965783
申请日：2007-12-28
申请人： Hisaaki Kanai , Norio Chujo , Masayoshi Yagyu
发明人： Hisaaki Kanai , Norio Chujo , Masayoshi Yagyu
IPC分类号： H03D3/24
CPC分类号： H04L25/03885
摘要： In an adjustment method of waveform equalization coefficient, one of jitter and amplitude is measured only in a case of an arbitrary signal sequence and a waveform equalization coefficient is adjusted. Particularly, using a signal of received signals other than a 010 signal or a 101 signal, code inversion time is measured. Since the code inversion time in a case where such signals are used becomes steeper in comparison with that in the conventional technique, adjustment time of the waveform equalization coefficient can be reduced.
摘要翻译：在波形均衡系数的调整方法中，仅在任意信号序列的情况下测量抖动和幅度之一并且调整波形均衡系数。特别地，使用除010信号或101信号之外的接收信号的信号，测量码反转时间。由于在使用这种信号的情况下的代码反转时间与传统技术相比变得更陡峭，所以可以减小波形均衡系数的调整时间。

29. 发明申请

US20080029763A1 Transmission Circuit, Connecting Sheet, Probe Sheet, Probe Card, Semiconductor Inspection System and Method of Manufacturing Semiconductor Device 审中-公开
标题翻译：传输电路，连接片，探头片，探针卡，半导体检测系统及制造半导体器件的方法
公开(公告)号：US20080029763A1
公开(公告)日：2008-02-07
申请号：US11740301
申请日：2007-04-26
申请人： Susumu Kasukabe , Terutaka Mori , Yasunori Narizuka , Norio Chujo
发明人： Susumu Kasukabe , Terutaka Mori , Yasunori Narizuka , Norio Chujo
IPC分类号： H01L23/48 , G01R31/26 , H01L23/58 , H01L29/40
CPC分类号： G01R31/31905 , G01R1/0735 , G01R31/2874 , G01R31/2879 , G01R31/2889 , H01L2924/0002 , H01P3/081 , H01L2924/00
摘要： A probe sheet or a connecting sheet with good transmission characteristics and flexibility comprising contact terminals capable of contacting at a plurality of points and in high density, without applying damages on an electrode pad which is a contact subject is provided. Further, a high-speed transmission circuit capable of designing signal wirings with aligned impedance to have wide width even with a thin insulating film is achieved to provide a probe sheet or a connecting sheet with reduced loss of high-speed transmission signals. Moreover, the transmission circuit is applied to a probe card using a probe sheet, an inspecting method of (a method of manufacturing) a semiconductor device using the same, and a connecting sheet having an excellent high-frequency characteristic.
摘要翻译：提供了具有良好传输特性和柔性的探针片或连接片，包括能够在多个点和高密度下接触的接触端子，而不对作为接触物体的电极焊盘施加损伤。此外，实现了即使使用薄绝缘膜，能够设计具有均匀阻抗的宽度宽的宽度的高速传输电路，以提供具有降低的高速传输信号损失的探针片或连接片。此外，使用探针片将传输电路应用到探针卡，使用其的制造半导体器件的制造方法的检查方法以及具有优异的高频特性的连接片。

30. 外观设计

USD704645S1 Housing for a connector 有权
公开(公告)号：USD704645S1
公开(公告)日：2014-05-13
申请号：US29417811
申请日：2012-04-09
申请人： Rika Nomura , Koji Nakagawa , Norio Chujo , Yuichi Koreeda
设计人： Rika Nomura , Koji Nakagawa , Norio Chujo , Yuichi Koreeda

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