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21. 发明授权

US06253224B1 Method and system for providing a hardware machine function in a protected virtual machine 失效
标题翻译：在受保护虚拟机中提供硬件机器功能的方法和系统
公开(公告)号：US06253224B1
公开(公告)日：2001-06-26
申请号：US09046912
申请日：1998-03-24
申请人： Frank W. Brice, Jr. , Eugene P. Hefferon , Casper A. Scalzi , Richard P. Tarcza
发明人： Frank W. Brice, Jr. , Eugene P. Hefferon , Casper A. Scalzi , Richard P. Tarcza
IPC分类号： G06F1700
CPC分类号： G06F9/45558 , G06F2009/45562
摘要： This invention describes a method and system for virtualizing an internal capability of a computing system; specifically, the invention describes a method and system for establishing a virtual machine containing a programmed hardware-machine function that is normally executed natively as proprietary internal code in its own hardware environment, a Central Electronics Complex (CEC) or logical partition of a CEC. The code resides in a separate hardware domain of the CEC called the Service Element (SE). The IBM VM/ESA (VM) operating system requests the SE to transfer a copy of the code into a virtual machine that VM has initialized, where the machine function is provided (in the current embodiment) as an isolated and encapsulated part of a virtual Parallel Sysplex system comprising multiple virtual CECs in a testing environment.
摘要翻译：本发明描述了一种用于虚拟化计算系统的内部能力的方法和系统; 具体地说，本发明描述了一种用于建立虚拟机的方法和系统，该虚拟机包含通常在其自己的硬件环境中作为专用内部代码，中央电子综合体（CEC）或CEC的逻辑分区作为本地执行的编程的硬件机器功能。代码驻留在CEC的单独硬件域中，称为服务元素（SE）。 IBM VM / ESA（VM）操作系统请求SE将代码的副本传送到虚拟机初始化的虚拟机中，其中提供机器功能（在当前实施例中）作为虚拟机的隔离和封装部分并行Sysplex系统在测试环境中包含多个虚拟CEC。

22. 发明授权

US5987495A Method and apparatus for fully restoring a program context following an interrupt 失效
公开(公告)号：US5987495A
公开(公告)日：1999-11-16
申请号：US966374
申请日：1997-11-07
申请人： Donald F. Ault , Kenneth E. Plambeck , Casper A. Scalzi
发明人： Donald F. Ault , Kenneth E. Plambeck , Casper A. Scalzi
IPC分类号： G06F9/46
CPC分类号： G06F9/463
摘要： A method and apparatus for fully restoring the context of a user program, including program status word (PSW) and CPU register contents, following an asynchronous interrupt. Upon the occurrence of an asynchronous interrupt event, control is transferred from the normally executing part of the user program to an interrupt handler of the operating system kernel. The kernel interrupt handler saves the contents of the CPU registers and PSW as they existed at the time of the interrupt in a save area associated with the user program before transferring control to a signal catcher routine of the user program. When it has finished handling the interrupt, the signal catcher routine restores the previous state of program execution as it existed before the interrupt by storing the address of the save area in a selected register (which may be a general register/access register pair), restoring the contents of the registers other than the selected register containing the address of the save area, and then restoring the contents of the PSW and selected register by using a new Resume Program (RP) instruction. The RP instruction contains an operand field specifying through the selected register the base address of the save area together with offset fields specifying the offsets of the saved contents of the PSW and selected register relative to the beginning of the save area. Upon decoding an RP instruction, the CPU executing the instruction adds the displacement to the base address contained in the specified register to form the beginning address of the save area, to which it adds the specified offsets to access the saved PSW and selected register contents. The current PSW and selected register contents are then restored with the saved contents to fully restore the previous program context and return control to the instruction being executed at the point of interrupt. To ensure system integrity, only those fields of the PSW are restored that could have otherwise been restored by a program operating in problem state.

23. 发明授权

US5423013A System for addressing a very large memory with real or virtual addresses using address mode registers 失效
标题翻译：使用地址模式寄存器寻址具有实际或虚拟地址的非常大的存储器的系统
公开(公告)号：US5423013A
公开(公告)日：1995-06-06
申请号：US754810
申请日：1991-09-04
申请人： Richard I. Baum , Brent A. Carlson , Moon J. Kim , Michael G. Mall , Casper A. Scalzi , Bhaskar Sinha
发明人： Richard I. Baum , Brent A. Carlson , Moon J. Kim , Michael G. Mall , Casper A. Scalzi , Bhaskar Sinha
IPC分类号： G06F9/32 , G06F9/355 , G06F12/02 , G06F12/06 , G06F12/10 , G06F12/08
CPC分类号： G06F9/342 , G06F12/0292 , G06F12/0623 , G06F9/32 , G06F2212/206
摘要： Allows instructions and data to be located in any one or more of plural sections of a large-size real memory of a data processing system. Any memory section is located by concatenating a conventional small real/absolute address with an address extender used with conventional small-size memory. A Central Processor Extended Address Mode (CPEAM) register content indicates the location of extenders in an AR(s), ASTE(s), STE(s) or PTE(s) for use by a central processor or I/O operations. An Input-Output Extended Address Mode (IOEAM) register content indicates the location of the extenders in ORB(s), CCW(s) or IDAW(s) for use by I/O operations. A compatible mode sets the content to zero for either or both of the CPEAM and IOEAM if either or both is not to be used.
摘要翻译：允许指令和数据位于数据处理系统的大尺寸实际存储器的多个部分中的任何一个或多个中。任何存储器部分通过将传统的小实际/绝对地址与传统的小尺寸存储器使用的地址扩展器连接来定位。中央处理器扩展地址模式（CPEAM）寄存器内容指示AR（s），ASTE，STE（s）或PTE的扩展器的位置，供中央处理器或I / O操作使用。输入输出扩展地址模式（IOEAM）寄存器内容指示扩展器在ORB（s），CCW（s）或IDAW中的位置，供I / O操作使用。如果不使用任何一个或两个，则兼容模式将CPEAM和IOEAM中的一个或两个设置为零。

24. 发明授权

US4843541A Logical resource partitioning of a data processing system 失效
标题翻译：数据处理系统的逻辑资源划分
公开(公告)号：US4843541A
公开(公告)日：1989-06-27
申请号：US79314
申请日：1987-07-29
申请人： George H. Bean , Terry L. Borden , Mark S. Farrell , Peter H. Gum , Roger E. Hough , Francis E. Johnson , Donald W. McCauley , Mark E. Rakhmilevich , John C. Rathjen , Casper A. Scalzi , John F. Scanlon , Leslie W. Wyman
发明人： George H. Bean , Terry L. Borden , Mark S. Farrell , Peter H. Gum , Roger E. Hough , Francis E. Johnson , Donald W. McCauley , Mark E. Rakhmilevich , John C. Rathjen , Casper A. Scalzi , John F. Scanlon , Leslie W. Wyman
IPC分类号： G06F9/46 , G06F9/48 , G06F9/50 , G06F12/10
CPC分类号： G06F9/4843 , G06F9/5077
摘要： The embodiment discloses a method and means for partitioning the resources in a data processing system into a plurality of logical partitions. Host control code may be embodied in programming, microcode, or by special hardware to enable highly efficient operation of a plurality of preferred guest programming systems in the different partitions of the system. The main storage, expanded storage, the channel, and subchannel resources of a system are assigned to the different logical partitions in the system to enable a plurality of preferred guest programming systems to run simultaneously in the different partitions. This invention automatically relocates the absolute addresses of the I/O channel and subchannel resources in the system to their assigned partitions. Also the absolute and virtual addresses of the different guest programming systems are relocated into, as well as page addresses for any expanded storage, their assigned partitions. The guest programming systems generally will be different operating systems. The logical CPU(s) of the guests are dispatched on one or plural real CPUs in the system using the S/370XA SIE (start interpretive execution) instruction. Special operations are provided, including the CPU alerting of other guests in different partitions using I/O interruption signalling. Interception is provided to handle special circumstances.

25. 发明授权

US5495614A Interface control process between using programs and shared hardware facilities 失效
标题翻译：使用程序和共享硬件设施之间的接口控制过程
公开(公告)号：US5495614A
公开(公告)日：1996-02-27
申请号：US355756
申请日：1994-12-14
申请人： Glen A. Brent , Thomas J. Dewkett , Casper A. Scalzi
发明人： Glen A. Brent , Thomas J. Dewkett , Casper A. Scalzi
IPC分类号： G06F13/10 , G06F9/00
CPC分类号： G06F13/102
摘要： A control process which enables a non-supervisory "using program" (e.g. application programs) to directly interface one or more shared asynchronous hardware facilities in a computer system. Any using program may request the operating system (OS) to set up a "special environment" with an AHF during which the using program can directly issue requests to the AHF for its services. The OS sets up a session for the using program having the "special environment", which specifies restrictions on storage accesses by the AHF for accesses made on behalf of the using program--to insure system data integrity. These restrictions are not changeable by the using program. The "special environment" exists until the session is ended by the using program or by a terminating condition. The "special environment" is tailored to be different among the different using program concurrently using the same AHF, so that the "special environment" of one using program cannot interfere with the "special environment" of another using program. During a session, work requests for any using program are communicated directly to the AHF from the using program, and completion of any work request is communicated directly by the AHF to the using program without any interruption of the using program or OS involvement.
摘要翻译：能够使非监督“使用程序”（例如应用程序）直接接入计算机系统中的一个或多个共享异步硬件设施的控制过程。任何使用程序可以请求操作系统（OS）与AHF建立“特殊环境”，在此期间，使用程序可以直接向AHF发送其服务请求。操作系统为具有“特殊环境”的使用程序设置会话，该特定环境指定AHF对代表使用程序进行访问的存储访问的限制，以确保系统数据完整性。使用程序不能更改这些限制。存在“特殊环境”，直到会话由使用程序或终止条件结束。 “特殊环境”在不同的使用程序中使用相同的AHF进行了不同的定制，使得一个使用程序的“特殊环境”不能干扰另一个使用程序的“特殊环境”。在会议期间，任何使用程序的工作请求都从使用程序直接发送到AHF，AHF直接将任务完成任务发送到使用程序，而不会中断使用程序或操作系统的参与。

26. 发明授权

US5361356A Storage isolation with subspace-group facility 失效
标题翻译：具有子空间组设备的存储隔离
公开(公告)号：US5361356A
公开(公告)日：1994-11-01
申请号：US847521
申请日：1992-03-06
申请人： Carl E. Clark , Jeffrey A. Frey , Kenneth E. Plambeck , Casper A. Scalzi , Bhaskar Sinha
发明人： Carl E. Clark , Jeffrey A. Frey , Kenneth E. Plambeck , Casper A. Scalzi , Bhaskar Sinha
IPC分类号： G06F12/10 , G06F9/30 , G06F9/32 , G06F9/38 , G06F9/46 , G06F9/40
CPC分类号： G06F9/30054 , G06F9/30003 , G06F9/3851 , G06F9/468
摘要： A Branch in Subspace Group (BSG) instruction is executed in problem state (for example by an application program) for providing a fast instruction branch between address spaces within a restricted group of address spaces called a subspace group. The subspace group contains two types of address spaces: a base space and any number of subspaces. The subspace group is set up in a control table associated with each dispatchable unit (DU). This DU control table contains: an identifier of a base space, an identifier of an access list that contains identifiers of all subspaces in the subspace group, an indicator of whether CPU control was last given to a subspace or to the base space, and an identifier of a last entered subspace in the group. The BSG instruction has an operand defining a general register containing the target virtual address and an associated access register containing an access-list-entry token (ALET) defining the target address space. The ALET indexes to a target subspace identifier in the access list, and then the associated virtual address locates the target instruction in the identified target address space. BSG instruction execution controls restrict the BSG branching only to an instruction in the subspace group.
摘要翻译：子空间组（BSG）中的分支在问题状态（例如由应用程序）执行，用于在被称为子空间组的受限制的一组地址空间内的地址空间之间提供快速指令分支。子空间组包含两种类型的地址空间：基本空间和任何数量的子空间。子空间组设置在与每个可调度单元（DU）相关联的控制表中。该DU控制表包含：基本空间的标识符，包含子空间组中所有子空间的标识符的访问列表的标识符，CPU控制是否被最后给予子空间或基本空间的指示符，以及组中最后输入的子空间的标识符。 BSG指令具有定义包含目标虚拟地址的通用寄存器的操作数和包含定义目标地址空间的访问列表入口令牌（ALET）的关联访问寄存器。 ALET索引到访问列表中的目标子空间标识符，然后相关联的虚拟地址将目标指令定位在所识别的目标地址空间中。 BSG指令执行控制将BSG分支限制到子空间组中的指令。

27. 发明授权

US5222215A CPU expansive gradation of I/O interruption subclass recognition 失效
标题翻译： CPU扩展I / O中断SUBCLASS识别
公开(公告)号：US5222215A
公开(公告)日：1993-06-22
申请号：US752149
申请日：1991-08-29
申请人： Norman C. Chou , Peter H. Gum , Roger E. Hough , Moon J. Kim , James C. Mazurowski , Donald W. McCauley , Casper A. Scalzi , John F. Scanlon , Leslie W. Wyman
发明人： Norman C. Chou , Peter H. Gum , Roger E. Hough , Moon J. Kim , James C. Mazurowski , Donald W. McCauley , Casper A. Scalzi , John F. Scanlon , Leslie W. Wyman
IPC分类号： G06F9/46 , G06F9/48
CPC分类号： G06F9/4812
摘要： A CPU interface recognizing a large very number of I/O interruption queues in a logically partitioned data processing system. Different partitions may contain different guest operating systems. The CPU interface controls how plural CPUs respond to I/O interruptions put on numerous hardware-controlled queues. A host hypervisor program dispatches the guest operating systems. The guests use the I/O interruptions in controlling the dispatching of their programs on the CPUs in a system. The invention allows the number of guest partitions in the system to exceed the number of I/O interruption subclasses (ISCs) architected in the system, and enables the dispatching controls of each guest operating system to be sensitive to different priorities for plural programs operating under a respective guest. The invention provides CPU controls that support alerting the host to enabled I/O interruptions, and provides CPU controlled pass-through for enabling direct guest handling of the guests I/O interruptions.

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