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    • 22. 发明授权
    • High performance flash memory devices (FMD)
    • 高性能闪存设备(FMD)
    • US07827348B2
    • 2010-11-02
    • US12017249
    • 2008-01-21
    • Charles C. LeeI-Kang YuDavid Q. ChowAbraham Chih-Kang MaMing-Shiang Shen
    • Charles C. LeeI-Kang YuDavid Q. ChowAbraham Chih-Kang MaMing-Shiang Shen
    • G06F12/00
    • G06F11/1068G11C5/04
    • High performance flash memory devices (FMD) are described. According to one exemplary embodiment of the invention, a high performance FMD includes an I/O interface, a FMD controller, and at least one non-volatile memory module along with corresponding at least one channel controller. The I/O interface is configured to connect the high performance FMD to a host computing device The FMD contoller is configured to control data transfer (e.g., data reading, data writing/programming, and data erasing) operations between the host computing device and the non-volatile memory module. The at least one non-volatile memory module, comprising one or more non-volatile memory chips, is configured as a secondary storage for the host computing device. The at least one channel controller is configured to ensure proper and efficient data transfer between a set of data buffers located in the FMD controller and the at least one non-volatile memory module.
    • 描述了高性能闪存设备(FMD)。 根据本发明的一个示例性实施例,高性能FMD包括I / O接口,FMD控制器以及至少一个非易失性存储器模块以及对应的至少一个通道控制器。 I / O接口被配置为将高性能FMD连接到主机计算设备FMD控制器被配置为控制主计算设备和主计算设备之间的数据传输(例如,数据读取,数据写入/编程和数据擦除)操作 非易失性内存模块。 包括一个或多个非易失性存储器芯片的至少一个非易失性存储器模块被配置为主计算设备的辅助存储器。 至少一个通道控制器被配置为确保位于FMD控制器和至少一个非易失性存储器模块中的一组数据缓冲器之间的适当和有效的数据传输。
    • 24. 发明授权
    • Flash memory controller for electronic data flash card
    • 闪存控制器,用于电子数据闪存卡
    • US07702831B2
    • 2010-04-20
    • US11466759
    • 2006-08-23
    • Abraham C. MaCharles C. LeeI-Kang YuEdward W. LeeMing-Shiang Shen
    • Abraham C. MaCharles C. LeeI-Kang YuEdward W. LeeMing-Shiang Shen
    • G06F13/12
    • G06F12/0246G06F12/1416G06F21/32G06F21/78G06F21/79G06K9/00087G06K19/07G06K19/07354G07C9/00087
    • An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.
    • 电子数据闪存卡可由主机访问,并且包括连接到存储数据文件的闪存设备的处理单元,以及被激活以便与主计算机建立通信的输入 - 输出接口电路。 在一个实施例中,电子数据闪存卡使用USB输入/输出接口电路与主计算机进行通信。 闪速存储器控制器包括用于将由主计算机发送的逻辑地址转换成与闪存器件的扇区相关联的物理地址的索引。 该索引由参考来自各种查找表中的值和存储在闪存设备中的有效数据的仲裁逻辑控制。 闪存控制器还包括先进先出单元(FIFO),用于在后台进程中回收闪速存储器件的过时扇区,使得它们可用于重新编程。
    • 26. 发明申请
    • Hybrid 2-Level Mapping Tables for Hybrid Block- and Page-Mode Flash-Memory System
    • 用于混合块和页模式闪存系统的混合二级映射表
    • US20090193184A1
    • 2009-07-30
    • US12418550
    • 2009-04-03
    • Frank YuCharles C. LeeAbraham C. MaMyeongjin Shin
    • Frank YuCharles C. LeeAbraham C. MaMyeongjin Shin
    • G06F12/02G06F12/00
    • G06F12/0246G06F2212/7203G06F2212/7208G11C11/5628G11C11/5678G11C13/00G11C13/0004G11C2211/5641
    • A hybrid solid-state disk (SSD) has multi-level-cell (MLC) or single-level-cell (SLC) flash memory, or both. SLC flash may be emulated by MLC that uses fewer cell states. A NVM controller converts logical block addresses (LBA) to physical block addresses (PBA). Most data is block-mapped and stored in MLC flash, but some critical or high-frequency data is page-mapped to reduce block-relocation copying. A hybrid mapping table has a first-level and a second level. Only the first level is used for block-mapped data, but both levels are used for page-mapped data. The first level contains a block-page bit that indicates if the data is block-mapped or page-mapped. A PBA field in the first-level table maps block-mapped data, while a virtual field points to the second-level table where the PBA and page number is stored for page-mapped data. Page-mapped data is identified by a frequency counter or sector count. SRAM space is reduced.
    • 混合固态盘(SSD)具有多级单元(MLC)或单级单元(SLC)闪存,或两者兼有。 SLC闪存可能由使用较少单元状态的MLC仿真。 NVM控制器将逻辑块地址(LBA)转换为物理块地址(PBA)。 大多数数据被块映射并存储在MLC闪存中,但是一些关键或高频数据被页映射以减少块重定位复制。 混合映射表具有第一级和第二级。 只有第一级用于块映射数据,但是这两个级别都用于页映射数据。 第一级包含一个块页位,指示数据是块映射还是页映射。 第一级表中的PBA字段映射块映射数据,而虚拟字段指向存储页面映射数据的PBA和页码的二级表。 页面映射数据由频率计数器或扇区计数来标识。 SRAM空间减少。
    • 27. 发明申请
    • Non-Volatile Memory Based Computer Systems and Methods Thereof
    • 基于非易失性存储器的计算机系统及其方法
    • US20080195798A1
    • 2008-08-14
    • US11932941
    • 2007-10-31
    • Charles C. LeeDavid Q. ChowAbraham Chih-Kang MaI-Kang YuMing-Shiang Shen
    • Charles C. LeeDavid Q. ChowAbraham Chih-Kang MaI-Kang YuMing-Shiang Shen
    • G06F12/02G06F12/00G06F12/08
    • G06F12/1416G06F3/0664G06F3/0688G06K19/07G06K19/07354G07C9/00087
    • Non-volatile memory based computer systems and methods are described. According to one aspect of the invention, at least one non-volatile memory module is coupled to a computer system as main storage. The non-volatile memory module is controlled by a northbridge controller configured to control the non-volatile memory as main memory. The page size of the at least one non-volatile memory module is configured to be the size of one of the cache lines associated with a microprocessor of the computer system. According to another aspect, at least one non-volatile memory module is coupled to a computer system as data read/write buffer of one or more hard disk drives. The non-volatile memory module is controlled by a southbridge controller configured to control the non-volatile memory as an input/out device. The page size of the at least one non-volatile memory module is configured in proportion to characteristics of the hard disk drives.
    • 描述了基于非易失性存储器的计算机系统和方法。 根据本发明的一个方面,至少一个非易失性存储器模块耦合到作为主存储器的计算机系统。 非易失性存储器模块由配置成将非易失性存储器控制为主存储器的北桥控制器来控制。 至少一个非易失性存储器模块的页面大小被配置为与计算机系统的微处理器相关联的高速缓存行之一的大小。 根据另一方面,至少一个非易失性存储器模块作为一个或多个硬盘驱动器的数据读/写缓冲器耦合到计算机系统。 非易失性存储器模块由配置成将非易失性存储器控制为输入/输出设备的南桥控制器来控制。 至少一个非易失性存储器模块的页面大小被配置成与硬盘驱动器的特性成比例。