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    • 4. 发明授权
    • Extended universal serial bus (USB) card reader
    • 扩展通用串行总线(USB)读卡器
    • US07850082B1
    • 2010-12-14
    • US11932118
    • 2007-10-31
    • David Q. ChowCharles C. LeeFrank I-Kang YuMing-Shiang Shen
    • David Q. ChowCharles C. LeeFrank I-Kang YuMing-Shiang Shen
    • G06K7/08
    • G06F13/385G06F2213/0042G06F2213/3804
    • An extended universal serial bus (USB) card reader device is described herein. In one embodiment, a card reader includes a first extended USB (EUSB) connector to be coupled to an external host system, multiple flash memory card sockets capable of receiving multiple flash memory cards inserted therein, multiple flash controllers coupled to the plurality of flash memory card sockets respectively. The card reader further includes a memory for storing executable code, a processor coupled to each of the flash controllers for executing the executable code to control each of the plurality of flash controllers in order to access the corresponding flash memory card inserted therein. The card reader further includes a second EUSB connector to be coupled to an external EUSB device using the extended USB protocols, which is one of an EUSB slave device and an EUSB hub device. Other methods and apparatuses are also described.
    • 本文描述了扩展的通用串行总线(USB)读卡器设备。 在一个实施例中,读卡器包括要耦合到外部主机系统的第一扩展USB(EUSB)连接器,能够接收插入其中的多个闪存卡的多个闪存卡插槽,耦合到多个闪存的多个闪存控制器 卡插座。 读卡器还包括用于存储可执行代码的存储器,耦合到每个闪存控制器的处理器,用于执行可执行代码以控制多个闪存控制器中的每一个以便访问插入其中的相应闪存卡。 读卡器还包括使用作为EUSB从设备和EUSB集线器设备之一的扩展USB协议耦合到外部EUSB设备的第二EUSB连接器。 还描述了其它方法和装置。
    • 8. 发明授权
    • SRAM cache and flash micro-controller with differential packet interface
    • 具有差分数据包接口的SRAM缓存和闪存微控制器
    • US07707354B2
    • 2010-04-27
    • US11876251
    • 2007-10-22
    • Charles C. LeeDavid Q. ChowAbraham C. MaFrank YuMing-Shiang Shen
    • Charles C. LeeDavid Q. ChowAbraham C. MaFrank YuMing-Shiang Shen
    • G06F12/00
    • G06F12/0866G06F2212/2022G06F2212/2515
    • A flash microcontroller has a Static Random-Access-Memory (SRAM) buffer that stores several blocks of boot code read from a flash memory. The SRAM buffer also operates as a cache of flash data after booting is complete. Cache read and write hits use the SRAM cache rather than flash memory, while old cache lines and read misses access the flash memory. Both the external host and the microcontroller are booted from boot code buffered in the SRAM buffer. A boot-loader state machine reads the flash ID and programs flash parameter registers with timing parameters for the flash memory. The flash microcontroller uses a differential interface to the external host, with a differential transceiver and a differential serial interface. Frame, packet, and encoded clock processing is also performed by the serial interface.
    • 闪存微控制器具有静态随机存取存储器(SRAM)缓冲器,其存储从闪存读取的几个引导代码块。 引导完成后,SRAM缓冲区还可以作为闪存数据缓存。 缓存读取和写入命中使用SRAM缓存而不是闪存,而旧的缓存行和读取未命中访问闪存。 外部主机和微控制器均由缓冲在SRAM缓冲区中的引导代码引导。 引导加载器状态机读取闪存ID,并使用Flash存储器的时序参数对闪存参数寄存器进行编程。 闪存单片机使用与外部主机的差分接口,具有差分收发器和差分串行接口。 帧,分组和编码时钟处理也由串行接口执行。