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21. 发明申请

US20100131720A1 MANAGEMENT OF OWNERSHIP CONTROL AND DATA MOVEMENT IN SHARED-MEMORY SYSTEMS 有权
标题翻译：在共享系统中的所有权控制和数据移动的管理
公开(公告)号：US20100131720A1
公开(公告)日：2010-05-27
申请号：US12324628
申请日：2008-11-26
申请人： David T. Harper, III , Charles David Callahan, II
发明人： David T. Harper, III , Charles David Callahan, II
IPC分类号： G06F12/00
CPC分类号： G06F9/526 , G06F3/067 , G06F12/0813
摘要： A method to exchange data in a shared memory system includes the use of a buffer in communication with a producer processor and a consumer processor. The cache data is temporarily stored in the buffer. The method includes for the consumer and the producer to indicate intent to acquire ownership of the buffer. In response to the indication of intent, the producer, consumer, buffer are prepared for the access. If the consumer intends to acquire the buffer, the producer places the cache data into the buffer. If the producer intends to acquire the buffer, the consumer removes the cache data from the buffer. The access to the buffer, however, is delayed until the producer, consumer, and the buffer are prepared.
摘要翻译：在共享存储器系统中交换数据的方法包括使用与生产者处理器和消费者处理器进行通信的缓冲器。高速缓存数据临时存储在缓冲区中。该方法包括为消费者和生产者指示获取缓冲器所有权的意图。响应于意图的指示，生产者，消费者，缓冲区准备进行访问。如果消费者想要获取缓冲区，生产者将缓存数据放入缓冲区。如果生产者打算获取缓冲区，消费者将从缓冲区中删除缓存数据。然而，缓冲区的访问被延迟，直到生产者，消费者和缓冲区被准备好。

22. 发明授权

US07584332B2 Computer systems with lightweight multi-threaded architectures 有权
标题翻译：具有轻量级多线程架构的计算机系统
公开(公告)号：US07584332B2
公开(公告)日：2009-09-01
申请号：US11675549
申请日：2007-02-15
申请人： Peter M. Kogge , Jay B. Brockman , David Tennyson Harper, III , Burton Smith , Charles David Callahan, II
发明人： Peter M. Kogge , Jay B. Brockman , David Tennyson Harper, III , Burton Smith , Charles David Callahan, II
IPC分类号： G06F12/00
CPC分类号： G06F9/547 , G06F9/4843 , G06F9/5044
摘要： Embodiments of the present invention provide a class of computer architectures generally referred to as lightweight multi-threaded architectures (LIMA). Other embodiments may be described and claimed.
摘要翻译：本发明的实施例提供了一类通常称为轻量级多线程架构（LIMA）的计算机体系结构。可以描述和要求保护其他实施例。

23. 发明申请

US20110314244A1 COMPOSITION OF LOCKS IN SOFTWARE TRANSACTIONAL MEMORY 有权
标题翻译：软件交易记忆中的锁定组成
公开(公告)号：US20110314244A1
公开(公告)日：2011-12-22
申请号：US12819499
申请日：2010-06-21
申请人： Sukhdeep S. Sodhi , Yosseff Levanoni , David L. Detlefs , Lingli Zhang , Weirong Zhu , Dana Groff , Michael M. Magruder , Charles David Callahan, II
发明人： Sukhdeep S. Sodhi , Yosseff Levanoni , David L. Detlefs , Lingli Zhang , Weirong Zhu , Dana Groff , Michael M. Magruder , Charles David Callahan, II
IPC分类号： G06F12/02 , G06F12/14
CPC分类号： G06F9/467 , G06F9/528
摘要： A software transactional memory (STM) system allows the composition of traditional lock based synchronization with transactions in STM code. The STM system acquires each traditional lock the first time that a corresponding traditional lock acquire is encountered inside a transaction and defers all traditional lock releases until a top level transaction in a transaction nest commits or aborts. The STM system maintains state information associated with traditional lock operations in transactions and uses the state information to eliminate deferred traditional lock operations that are redundant. The STM system integrates with systems that implement garbage collection.
摘要翻译：软件事务存储器（STM）系统允许以STM代码的事务组合传统的基于锁的同步。 STM系统首次在交易中遇到相应的传统锁获取时，获取每个传统锁，并延迟所有传统的锁定版本，直到事务嵌套中的顶级事务提交或中止。 STM系统维护与事务中的传统锁定操作相关联的状态信息，并使用状态信息来消除冗余的延迟传统锁定操作。 STM系统与实施垃圾收集的系统集成。

24. 发明授权

US07739667B2 Parallelism performance analysis based on execution trace information 有权
标题翻译：基于执行跟踪信息的并行性能分析
公开(公告)号：US07739667B2
公开(公告)日：2010-06-15
申请号：US11254232
申请日：2005-10-19
申请人： Charles David Callahan, II , Keith Arnett Shields , Preston Pengra Briggs, III
发明人： Charles David Callahan, II , Keith Arnett Shields , Preston Pengra Briggs, III
IPC分类号： G06F9/44 , G06F9/445
CPC分类号： G06F11/3636 , G06F11/323 , G06F11/3404 , G06F11/3409 , G06F11/3466 , G06F11/3664 , G06F2201/86 , G06F2201/88
摘要： A system for conducting performance analysis for executing tasks. The analysis involves generating a variety of trace information related to performance measures, including parallelism-related information, during execution of the task. In order to generate the trace information, target source code of interest is compiled in such a manner that executing the resulting executable code will generate execution trace information composed of a series of events. Each event stores trace information related to a variety of performance measures for the one or more processors and protection domains used. After the execution trace information has been generated, the system can use that trace information and a trace information description file to produce useful performance measure information. The trace information description file contains information that describes the types of execution events as well as the structure of the stored information. The system uses the trace information description file to organize the information in the trace information file, extracts a variety of types of performance measure information from the organized trace information, and formats the extracted information for display. The system can use default or user-defined functions to extract and format trace information for display. After the system displays one or more types of performance measure information, a user of the system can then interact with the system in a variety of ways to obtain other useful performance analysis information.
摘要翻译：执行任务执行性能分析的系统。分析涉及在执行任务期间生成与性能测量相关的各种跟踪信息，包括并行性相关信息。为了生成跟踪信息，以这样一种方式编译感兴趣的目标源代码，即执行所得到的可执行代码将生成由一系列事件组成的执行跟踪信息。每个事件存储与使用的一个或多个处理器和保护域的各种性能测量相关的跟踪信息。在生成执行跟踪信息之后，系统可以使用跟踪信息和跟踪信息描述文件来产生有用的性能测量信息。跟踪信息描述文件包含描述执行事件的类型以及存储信息的结构的信息。系统使用跟踪信息描述文件组织跟踪信息文件中的信息，从有组织的跟踪信息中提取各种类型的性能测量信息，并格式化提取的信息进行显示。系统可以使用默认或用户定义的函数来提取和格式化跟踪信息进行显示。在系统显示一种或多种类型的性能测量信息之后，系统的用户然后可以以各种方式与系统交互以获得其他有用的性能分析信息。

25. 发明授权

US06961925B2 Parallelism performance analysis based on execution trace information 失效
标题翻译：基于执行跟踪信息的并行性能分析
公开(公告)号：US06961925B2
公开(公告)日：2005-11-01
申请号：US09825434
申请日：2001-04-03
申请人： Charles David Callahan, II , Keith Arnett Shields , Preston Pengra Briggs, III
发明人： Charles David Callahan, II , Keith Arnett Shields , Preston Pengra Briggs, III
IPC分类号： G06F11/32 , G06F11/34 , G06F9/44 , G06F9/45
CPC分类号： G06F11/3636 , G06F11/323 , G06F11/3404 , G06F11/3409 , G06F11/3466 , G06F11/3664 , G06F2201/86 , G06F2201/88
摘要： A system for conducting performance analysis for executing tasks. The analysis involves generating a variety of trace information related to performance measures, including parallelism-related information, during execution of the task. In order to generate the trace information, target source code of interest is compiled in such a manner that executing the resulting executable code will generate execution trace information composed of a series of events. Each event stores trace information related to a variety of performance measures for the one or more processors and protection domains used. After the execution trace information has been generated, the system can use that trace information and a trace information description file to produce useful performance measure information. The trace information description file contains information that describes the types of execution events as well as the structure of the stored information. The system uses the trace information description file to organize the information in the trace information file, extracts a variety of types of performance measure information from the organized trace information, and formats the extracted information for display. The system can use default or user-defined functions to extract and format trace information for display. After the system displays one or more types of performance measure information, a user of the system can then interact with the system in a variety of ways to obtain other useful performance analysis information.
摘要翻译：执行任务执行性能分析的系统。分析涉及在执行任务期间生成与性能测量相关的各种跟踪信息，包括并行性相关信息。为了生成跟踪信息，以这样一种方式编译感兴趣的目标源代码，即执行所得到的可执行代码将生成由一系列事件组成的执行跟踪信息。每个事件存储与使用的一个或多个处理器和保护域的各种性能测量相关的跟踪信息。在生成执行跟踪信息之后，系统可以使用跟踪信息和跟踪信息描述文件来产生有用的性能测量信息。跟踪信息描述文件包含描述执行事件的类型以及存储信息的结构的信息。系统使用跟踪信息描述文件组织跟踪信息文件中的信息，从有组织的跟踪信息中提取各种类型的性能测量信息，并格式化提取的信息进行显示。系统可以使用默认或用户定义的函数来提取和格式化跟踪信息进行显示。在系统显示一种或多种类型的性能测量信息之后，系统的用户然后可以以各种方式与系统交互以获得其他有用的性能分析信息。

26. 发明授权

US06230313B1 Parallelism performance analysis based on execution trace information 失效
标题翻译：基于执行跟踪信息的并行性能分析
公开(公告)号：US06230313B1
公开(公告)日：2001-05-08
申请号：US09221005
申请日：1998-12-23
申请人： Charles David Callahan, II , Keith Arnett Shields , Preston Pengra Briggs, III
发明人： Charles David Callahan, II , Keith Arnett Shields , Preston Pengra Briggs, III
IPC分类号： G06F945
CPC分类号： G06F11/3636 , G06F11/323 , G06F11/3404 , G06F11/3409 , G06F11/3466 , G06F11/3664 , G06F2201/86 , G06F2201/88
摘要： A system for conducting performance analysis for executing tasks. The analysis involves generating a variety of trace information related to performance measures, including parallelism-related information, during execution of the task. In order to generate the trace information, target source code of interest is compiled in such a manner that executing the resulting executable code will generate execution trace information composed of a series of events. Each event stores trace information related to a variety of performance measures for the one or more processors and protection domains used. After the execution trace information has been generated, the system can use that trace information and a trace information description file to produce useful performance measure information. The trace information description file contains information that describes the types of execution events as well as the structure of the stored information. The system uses the trace information description file to organize the information in the trace information file, extracts a variety of types of performance measure information from the organized trace information, and formats the extracted information for display. The system can use default or user-defined functions to extract and format trace information for display. After the system displays one or more types of performance measure information, a user of the system can then interact with the system in a variety of ways to obtain other useful performance analysis information.
摘要翻译：执行任务执行性能分析的系统。分析涉及在执行任务期间生成与性能测量相关的各种跟踪信息，包括并行性相关信息。为了生成跟踪信息，以这样一种方式编译感兴趣的目标源代码，即执行所得到的可执行代码将生成由一系列事件组成的执行跟踪信息。每个事件存储与使用的一个或多个处理器和保护域的各种性能测量相关的跟踪信息。在生成执行跟踪信息之后，系统可以使用跟踪信息和跟踪信息描述文件来产生有用的性能测量信息。跟踪信息描述文件包含描述执行事件的类型以及存储信息的结构的信息。系统使用跟踪信息描述文件组织跟踪信息文件中的信息，从有组织的跟踪信息中提取各种类型的性能测量信息，并格式化提取的信息进行显示。系统可以使用默认或用户定义的函数来提取和格式化跟踪信息进行显示。在系统显示一种或多种类型的性能测量信息之后，系统的用户然后可以以各种方式与系统交互以获得其他有用的性能分析信息。

27. 发明授权

US08719515B2 Composition of locks in software transactional memory 有权
标题翻译：软件交易记忆中锁的组成
公开(公告)号：US08719515B2
公开(公告)日：2014-05-06
申请号：US12819499
申请日：2010-06-21
申请人： Sukhdeep S. Sodhi , Yosseff Levanoni , David L. Detlefs , Lingli Zhang , Weirong Zhu , Dana Groff , Michael M. Magruder , Charles David Callahan, II
发明人： Sukhdeep S. Sodhi , Yosseff Levanoni , David L. Detlefs , Lingli Zhang , Weirong Zhu , Dana Groff , Michael M. Magruder , Charles David Callahan, II
IPC分类号： G06F13/00
CPC分类号： G06F9/467 , G06F9/528
摘要： A software transactional memory (STM) system allows the composition of traditional lock based synchronization with transactions in STM code. The STM system acquires each traditional lock the first time that a corresponding traditional lock acquire is encountered inside a transaction and defers all traditional lock releases until a top level transaction in a transaction nest commits or aborts. The STM system maintains state information associated with traditional lock operations in transactions and uses the state information to eliminate deferred traditional lock operations that are redundant. The STM system integrates with systems that implement garbage collection.
摘要翻译：软件事务存储器（STM）系统允许以STM代码的事务组合传统的基于锁的同步。 STM系统首次在交易中遇到相应的传统锁获取时，获取每个传统锁，并延迟所有传统的锁定版本，直到事务嵌套中的顶级事务提交或中止。 STM系统维护与事务中的传统锁定操作相关的状态信息，并使用状态信息来消除冗余的延迟传统锁定操作。 STM系统与实施垃圾收集的系统集成。

28. 发明申请

US20110314444A1 Compiler-Generated Invocation Stubs for Data Parallel Programming Model 有权
标题翻译：用于数据并行编程模型的编译器生成的调用存根
公开(公告)号：US20110314444A1
公开(公告)日：2011-12-22
申请号：US12819108
申请日：2010-06-18
申请人： Lingli Zhang , Weirong Zhu , Yosseff Levanoni , Paul F. Ringseth , Charles David Callahan, II
发明人： Lingli Zhang , Weirong Zhu , Yosseff Levanoni , Paul F. Ringseth , Charles David Callahan, II
IPC分类号： G06F9/44
CPC分类号： G06F8/45
摘要： Described herein are techniques for generating invocation stubs for a data parallel programming model so that a data parallel program written in a statically-compiled high-level programming language may be more declarative, reusable, and portable than traditional approaches. With some of the described techniques, invocation stubs are generated by a compiler and those stubs bridge a logical arrangement of data parallel computations to the actual physical arrangement of a target data parallel hardware for that data parallel computation.
摘要翻译：这里描述的是用于生成用于数据并行编程模型的调用存根的技术，使得以静态编译的高级编程语言编写的数据并行程序可以比传统方法更具声明性，可重复使用和便携式。利用一些所描述的技术，调用存根由编译器生成，并且这些存根将数据并行计算的逻辑排列与用于该数据并行计算的目标数据并行硬件的实际物理排列相结合。

29. 发明申请

US20110314256A1 Data Parallel Programming Model 审中-公开
标题翻译：数据并行编程模型
公开(公告)号：US20110314256A1
公开(公告)日：2011-12-22
申请号：US12819097
申请日：2010-06-18
申请人： Charles David Callahan, II , Paul F. Ringseth , Yosseff Levanoni , Weirong Zhu , Lingli Zhang
发明人： Charles David Callahan, II , Paul F. Ringseth , Yosseff Levanoni , Weirong Zhu , Lingli Zhang
IPC分类号： G06F15/76 , G06F9/02 , G06F9/30
CPC分类号： G06F8/45
摘要： Described herein are techniques for enabling a programmer to express a call for a data parallel call-site function in a way that is accessible and usable to the typical programmer. With some of the described techniques, an executable program is generated based upon expressions of those data parallel tasks. During execution of the executable program, data is exchanged between non-data parallel (non-DP) capable hardware and DP capable hardware for the invocation of data parallel functions.
摘要翻译：这里描述的是使得程序员能够以对于典型编程器可访问和可使用的方式来表达对数据并行调用位置功能的调用的技术。利用所描述的一些技术，基于这些数据并行任务的表达来生成可执行程序。在执行可执行程序期间，数据在非数据并行（非DP）功能硬件和DP功能硬件之间交换，用于调用数据并行功能。

30. 发明申请

US20090320027A1 FENCE ELISION FOR WORK STEALING 有权
标题翻译：工作腐败的法律评估
公开(公告)号：US20090320027A1
公开(公告)日：2009-12-24
申请号：US12141107
申请日：2008-06-18
申请人： Paul F. Ringseth , Bill Messmer , Charles David Callahan, II , Stephen Toub
发明人： Paul F. Ringseth , Bill Messmer , Charles David Callahan, II , Stephen Toub
IPC分类号： G06F9/46
CPC分类号： G06F9/4881 , G06F9/52 , G06F9/522 , G06F2209/483
摘要： Methods and systems for statistically eliding fences in a work stealing algorithm are disclosed. A data structure comprising a head pointer, tail pointer, barrier pointer and an advertising flag allows for dynamic load-balancing across processing resources in computer applications.
摘要翻译：公开了在工作窃取算法中用于统计学检测围栏的方法和系统。包括头指针，尾指针，屏障指针和广告标志的数据结构允许跨计算机应用中的处理资源之间的动态负载平衡。

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