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21. 发明申请

US20080130609A1 Data transmission system for dynamically adjusting PDU length, method thereof, and computer-readable recording medium 有权
标题翻译：用于动态调整PDU长度的数据传输系统，其方法和计算机可读记录介质
公开(公告)号：US20080130609A1
公开(公告)日：2008-06-05
申请号：US11715996
申请日：2007-03-09
申请人： Kun-Hung Lee , Wei-Cheng Wu
发明人： Kun-Hung Lee , Wei-Cheng Wu
IPC分类号： H04B7/216
CPC分类号： H04B7/2656
摘要： A data transmission system for dynamically adjusting a protocol data unit (PDU) length and a method thereof are provided. The data transmission system at least includes a transmitting terminal and a receiving terminal. After a connection is established between the transmitting terminal and the receiving terminal, data is transmitted through a predetermined first data message PDU. When the receiving terminal found that an error rate of the PDU is excessively high, a second data message PDU length is calculated, and the transmitting terminal is informed to use the most appropriate PDU length to transmit data. The data transmission system dynamically adjusts the PDU length to achieve the effect of enhancing the data transmission capacity, so as to solve the problems concerning power consumption and interference between users caused by the process of enhancing the data transmission capacity by way of increasing the transmission power.
摘要翻译：提供了用于动态调整协议数据单元（PDU）长度的数据传输系统及其方法。数据传输系统至少包括发送终端和接收终端。在发送终端和接收终端之间建立连接之后，通过预定的第一数据消息PDU发送数据。当接收终端发现PDU的错误率过高时，计算第二数据消息PDU长度，并且通知发送终端使用最合适的PDU长度来发送数据。数据传输系统动态调整PDU长度，达到提高数据传输容量的效果，解决了通过增加传输功率提高数据传输容量的过程引起的功耗和用户干扰问题。

22. 发明授权

US09553053B2 Bump structure for yield improvement 有权
标题翻译：膨胀结构用于产量提高
公开(公告)号：US09553053B2
公开(公告)日：2017-01-24
申请号：US13558082
申请日：2012-07-25
申请人： Tzu-Wei Chiu , Tzu-Yu Wang , Shang-Yun Hou , Shin-Puu Jeng , Hsien-Wei Chen , Hung-An Teng , Wei-Cheng Wu
发明人： Tzu-Wei Chiu , Tzu-Yu Wang , Shang-Yun Hou , Shin-Puu Jeng , Hsien-Wei Chen , Hung-An Teng , Wei-Cheng Wu
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40 , H01L23/00 , H01L23/31
CPC分类号： H01L24/81 , B23K1/0016 , C23C14/165 , C23C14/34 , C23C18/32 , C23C18/42 , H01L23/3192 , H01L23/562 , H01L24/11 , H01L24/13 , H01L24/16 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05572 , H01L2224/05582 , H01L2224/05647 , H01L2224/05666 , H01L2224/10125 , H01L2224/114 , H01L2224/1145 , H01L2224/1146 , H01L2224/1147 , H01L2224/119 , H01L2224/11903 , H01L2224/13005 , H01L2224/13012 , H01L2224/13019 , H01L2224/13022 , H01L2224/13076 , H01L2224/13082 , H01L2224/131 , H01L2224/13147 , H01L2224/13166 , H01L2224/13562 , H01L2224/13564 , H01L2224/13583 , H01L2224/13644 , H01L2224/13655 , H01L2224/13664 , H01L2224/16058 , H01L2224/16059 , H01L2224/16145 , H01L2224/16148 , H01L2224/8112 , H01L2224/81141 , H01L2224/81193 , H01L2224/81345 , H01L2224/81365 , H01L2224/81815 , H01L2224/94 , H01L2225/06513 , H01L2225/06593 , H01L2924/00014 , H01L2924/014 , H01L2924/13091 , H01L2224/81 , H01L2924/00012 , H01L2924/207 , H01L2924/206 , H01L2224/05552 , H01L2924/00
摘要： A bump structure for electrically coupling semiconductor components is provided. The bump structure includes a first bump on a first semiconductor component and a second bump on a second semiconductor component. The first bump has a first non-flat portion (e.g., a convex projection) and the second bump has a second non-flat portion (e.g., a concave recess). The bump structure also includes a solder joint formed between the first and second non-flat portions to electrically couple the semiconductor components.
摘要翻译：提供了用于电耦合半导体部件的凸块结构。凸块结构包括在第一半导体部件上的第一凸块和第二半导体部件上的第二凸块。第一凸起具有第一非平坦部分（例如，凸起的凸起），并且第二凸起具有第二非平坦部分（例如，凹形凹部）。凸起结构还包括形成在第一和第二非平坦部分之间的焊接接头以电耦合半导体部件。

23. 发明授权

US08896089B2 Interposers for semiconductor devices and methods of manufacture thereof 有权
标题翻译：半导体器件用插入件及其制造方法
公开(公告)号：US08896089B2
公开(公告)日：2014-11-25
申请号：US13292792
申请日：2011-11-09
申请人： Tzu-Wei Chiu , Tzu-Yu Wang , Wei-Cheng Wu , Chun-Yi Liu , Hsien-Pin Hu , Shang-Yun Hou
发明人： Tzu-Wei Chiu , Tzu-Yu Wang , Wei-Cheng Wu , Chun-Yi Liu , Hsien-Pin Hu , Shang-Yun Hou
IPC分类号： H01L23/52 , H01L21/82 , H01L23/498 , H01L23/538 , H01L23/00 , H01L23/525 , H01L23/48 , H01L23/31
CPC分类号： H01L23/49827 , H01L23/3128 , H01L23/481 , H01L23/525 , H01L23/5256 , H01L23/5382 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/81 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13169 , H01L2224/13184 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/81192 , H01L2924/00011 , H01L2924/01322 , H01L2924/12042 , H01L2924/15311 , H01L2924/157 , H01L2924/00 , H01L2224/81805
摘要： Interposers for semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, an interposer includes a substrate, a contact pad disposed on the substrate, and a first through-via in the substrate coupled to the contact pad. A first fuse is coupled to the first through-via. A second through-via in the substrate is coupled to the contact pad, and a second fuse is coupled to the second through-via.
摘要翻译：公开了半导体器件用插入件及其制造方法。在一个实施例中，插入器包括衬底，设置在衬底上的接触焊盘以及耦合到接触焊盘的衬底中的第一通孔。第一保险丝耦合到第一通孔。衬底中的第二通孔耦合到接触焊盘，并且第二保险丝耦合到第二通孔。

24. 发明授权

US08829887B2 Pulse type layer-ID detector for 3D-IC and method of the same 有权
标题翻译：用于3D-IC的脉冲型层ID检测器及其方法
公开(公告)号：US08829887B2
公开(公告)日：2014-09-09
申请号：US12896429
申请日：2010-10-01
申请人： Ming-Pin Chen , Meng-Fan Chang , Wei-Cheng Wu
发明人： Ming-Pin Chen , Meng-Fan Chang , Wei-Cheng Wu
IPC分类号： G01R31/28
CPC分类号： H03K21/023 , H03K21/026 , H03K21/38
摘要： A 3D-IC detector for each layer of a stacked device comprises a pulse generator to receive an initial signal and generate a pulse-in signal to a next stage detector. A latch is coupled to the pulse generator to receive an output signal from the pulse generator and generate a layer identifying signal. A counter is coupled to previous stage detector and the initial signal to perform a counting operation; and an adder coupled to the counter to add a number to a counting output from the counter and input added signal to the pulse generator.
摘要翻译：用于层叠器件的每层的3D-IC检测器包括用于接收初始信号并向下一级检测器产生脉冲信号的脉冲发生器。锁存器耦合到脉冲发生器以接收来自脉冲发生器的输出信号并产生层识别信号。计数器耦合到前一级检测器和初始信号以执行计数操作; 以及加法器，其耦合到计数器以向计数器的计数输出添加数字，并将附加的信号输入到脉冲发生器。

25. 发明授权

US08797057B2 Testing of semiconductor chips with microbumps 有权
标题翻译：用微胶囊测试半导体芯片
公开(公告)号：US08797057B2
公开(公告)日：2014-08-05
申请号：US13025931
申请日：2011-02-11
申请人： Wei-Cheng Wu , Hsien-Pin Hu , Shang-Yun Hou , Shin-Puu Jeng , Chen-Hua Yu , Chao-Hsiang Yang
发明人： Wei-Cheng Wu , Hsien-Pin Hu , Shang-Yun Hou , Shin-Puu Jeng , Chen-Hua Yu , Chao-Hsiang Yang
IPC分类号： G01R31/00
CPC分类号： G01R31/2896 , G01R1/0416 , G01R31/2601 , G01R31/2884 , G01R31/2886 , G01R31/2889 , G01R31/2893 , H01L22/32 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L2224/02377 , H01L2224/0392 , H01L2224/0401 , H01L2224/05027 , H01L2224/05147 , H01L2224/05552 , H01L2224/05568 , H01L2224/05655 , H01L2224/0614 , H01L2224/0616 , H01L2224/1146 , H01L2224/1147 , H01L2224/11849 , H01L2224/13005 , H01L2224/13083 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/14131 , H01L2224/16238 , H01L2924/20752 , H01L2924/00012 , H01L2924/00014 , H01L2924/01047 , H01L2924/014
摘要： Test structures for performing electrical tests of devices under one or more microbumps are provided. Each test structure includes at least one microbump pad and a test pad. The microbump pad is a part of a metal pad connected to an interconnect for a device. A width of the microbump pad is equal to or less than about 50 μm. The test pad is connected to the at least one microbump pad. The test pad has a size large enough to allow circuit probing of the device. The test pad is another part of the metal pad. A width of the test pad is greater than the at least one microbump pad.
摘要翻译：提供用于对一个或多个微丸下的装置进行电测试的测试结构。每个测试结构包括至少一个微型块和测试垫。微型焊盘是与设备的互连件连接的金属焊盘的一部分。微型焊盘的宽度等于或小于约50μm。测试垫连接到至少一个微型块。测试垫的尺寸足够大以允许设备的电路探测。测试垫是金属垫的另一部分。测试垫的宽度大于至少一个微小块垫。

26. 发明申请

US20130148402A1 CONTROL SCHEME FOR 3D MEMORY IC 有权
标题翻译： 3D存储IC控制方案
公开(公告)号：US20130148402A1
公开(公告)日：2013-06-13
申请号：US13524980
申请日：2012-06-15
申请人： Meng-Fan CHANG , Wei-Cheng Wu , Tsung-Hsien Huang , Chien-Yuan Chen
发明人： Meng-Fan CHANG , Wei-Cheng Wu , Tsung-Hsien Huang , Chien-Yuan Chen
IPC分类号： G11C5/06
CPC分类号： G11C29/023 , G11C8/08 , G11C11/417 , G11C29/028 , G11C29/04 , G11C29/26 , G11C2029/1202 , G11C2029/1206 , G11C2029/2602
摘要： The present invention discloses a control scheme for 3D memory IC that includes a master chip and at least one slave chip. The master chip includes a main memory core, a first local timer, an I/O buffer, a first pad and a second pad. The at least one slave chip is stacked with the master chip. Each of the slave chip includes a slave memory core, a second local timer and a third pad. A first TSV is coupled to the first pad and the third pad. A logic control circuit layer includes a logic control circuit and a fourth pad, and the logic control circuit is coupled to the fourth pad. A second TSV is coupled to the second pad and the fourth pad.
摘要翻译：本发明公开了一种包括主芯片和至少一个从芯片的3D存储器IC的控制方案。主芯片包括主存储器核心，第一本地定时器，I / O缓冲器，第一焊盘和第二焊盘。至少一个从芯片与主芯片堆叠。每个从芯片包括从存储器核心，第二本地定时器和第三焊盘。第一TSV耦合到第一焊盘和第三焊盘。逻辑控制电路层包括逻辑控制电路和第四焊盘，逻辑控制电路耦合到第四焊盘。第二TSV耦合到第二焊盘和第四焊盘。

27. 发明授权

US08283781B2 Semiconductor device having pad structure with stress buffer layer 有权
标题翻译：具有应力缓冲层的衬垫结构的半导体器件
公开(公告)号：US08283781B2
公开(公告)日：2012-10-09
申请号：US12879512
申请日：2010-09-10
申请人： Wei-Cheng Wu , Shang-Yun Hou , Shin-Puu Jeng , Tzuan-Horng Liu , Tzu-Wei Chiu , Chao-Wen Shih
发明人： Wei-Cheng Wu , Shang-Yun Hou , Shin-Puu Jeng , Tzuan-Horng Liu , Tzu-Wei Chiu , Chao-Wen Shih
IPC分类号： H01L29/40
CPC分类号： H01L24/11 , H01L23/3114 , H01L23/3157 , H01L23/525 , H01L24/03 , H01L24/05 , H01L24/13 , H01L2224/02126 , H01L2224/0235 , H01L2224/0345 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05005 , H01L2224/05008 , H01L2224/05012 , H01L2224/05014 , H01L2224/05015 , H01L2224/05018 , H01L2224/05022 , H01L2224/05027 , H01L2224/05166 , H01L2224/05181 , H01L2224/05187 , H01L2224/05541 , H01L2224/05558 , H01L2224/05559 , H01L2224/05562 , H01L2224/05572 , H01L2224/05573 , H01L2224/05582 , H01L2224/05647 , H01L2224/05666 , H01L2224/05681 , H01L2224/05687 , H01L2224/06131 , H01L2224/10126 , H01L2224/1132 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/11849 , H01L2224/11912 , H01L2224/1308 , H01L2224/13083 , H01L2224/13109 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/94 , H01L2924/00014 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01038 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/35 , H01L2924/3512 , H01L2924/35121 , H01L2224/03 , H01L2224/11 , H01L2924/04941 , H01L2924/04953 , H01L2924/01028 , H01L2924/01022 , H01L2924/01083 , H01L2924/01051 , H01L2924/00 , H01L2224/05552
摘要： A semiconductor device has a pad structure with a ring-shaped stress buffer layer between a metal pad and an under-bump metallization (UBM) layer. The stress buffer layer is formed of a dielectric layer with a dielectric constant less than 3.5, a polymer layer, or an aluminum layer. The stress buffer layer is a circular ring, a square ring, an octagonal ring, or any other geometric ring.
摘要翻译：半导体器件具有在金属焊盘和凸块下金属化（UBM）层之间具有环形应力缓冲层的焊盘结构。应力缓冲层由介电常数小于3.5的介质层，聚合物层或铝层形成。应力缓冲层是圆形环，方形环，八角形环或任何其它几何环。

28. 发明授权

US08193639B2 Dummy metal design for packaging structures 有权
标题翻译：用于包装结构的虚拟金属设计
公开(公告)号：US08193639B2
公开(公告)日：2012-06-05
申请号：US12750468
申请日：2010-03-30
申请人： Tzuan-Horng Liu , Shang-Yun Hou , Shin-Puu Jeng , Wei-Cheng Wu , Hsiu-Ping Wei , Chih-Hua Chen , Chen-Cheng Kuo , Chen-Shien Chen , Ming Hung Tseng
发明人： Tzuan-Horng Liu , Shang-Yun Hou , Shin-Puu Jeng , Wei-Cheng Wu , Hsiu-Ping Wei , Chih-Hua Chen , Chen-Cheng Kuo , Chen-Shien Chen , Ming Hung Tseng
IPC分类号： H01L23/485
CPC分类号： H01L23/585 , H01L23/552 , H01L23/562 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/05012 , H01L2224/05572 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/1147 , H01L2224/11912 , H01L2224/13022 , H01L2224/13147 , H01L2224/13655 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2224/05552 , H01L2924/00
摘要： An integrated circuit structure includes a semiconductor chip, a metal pad at a major surface of the semiconductor chip, and an under-bump metallurgy (UBM) over and contacting the metal pad. A metal bump is formed over and electrically connected to the UBM. A dummy pattern is formed at a same level, and formed of a same metallic material, as the metal pad.
摘要翻译：集成电路结构包括半导体芯片，在半导体芯片的主表面处的金属焊盘和在凸块下金属（UBM）上并与金属焊盘接触的集成电路结构。金属凸块形成在UBM上并与UBM电连接。在同一水平上形成虚拟图案，并由与金属垫相同的金属材料形成。

29. 发明申请

US20100002894A1 MEMS device and method of making the same 有权
标题翻译： MEMS器件及其制作方法
公开(公告)号：US20100002894A1
公开(公告)日：2010-01-07
申请号：US12168057
申请日：2008-07-03
申请人： Bang-Chiang Lan , Li-Hsun Ho , Wei-Cheng Wu , Hui-Min Wu , Min Chen , Chien-Hsin Huang , Ming-I Wang
发明人： Bang-Chiang Lan , Li-Hsun Ho , Wei-Cheng Wu , Hui-Min Wu , Min Chen , Chien-Hsin Huang , Ming-I Wang
IPC分类号： H04R7/02 , B81C5/00 , H05K5/02
CPC分类号： H04R31/00 , H04R2201/003 , Y10T29/49005
摘要： A MEMS device includes a vent hole structure and a MEMS structure disposed on a same side of a substrate. The vent hole structure adjoins the MEMS structure with an etch stop structure therebetween. The MEMS structure includes a chamber, the vent hole structure includes a metal layer having at least a hole thereon as a vent hole to connect the chamber of the MEMS structure through the etch stop structure. Accordingly, the MEMS device has a lateral vent hole. Furthermore, as the vent hole structure and the MEMS structure are disposed on the same side of the substrate, the manufacturing process is convenient and timesaving.
摘要翻译： MEMS器件包括设置在基板的同一侧上的通气孔结构和MEMS结构。通气孔结构与MEMS结构相邻，其间具有蚀刻停止结构。 MEMS结构包括腔室，通气孔结构包括金属层，其上具有至少一个孔，作为通气孔，以通过蚀刻停止结构连接MEMS结构的室。因此，MEMS器件具有侧向通气孔。此外，由于通气孔结构和MEMS结构设置在基板的同一侧，所以制造过程方便且节省时间。

30. 发明授权

US09392266B2 Three-dimensional display device 有权
标题翻译：三维显示设备
公开(公告)号：US09392266B2
公开(公告)日：2016-07-12
申请号：US13526503
申请日：2012-06-18
申请人： Wei-Cheng Wu , Kuo-Sen Kung , Chun-Hao Tu , Ren-Hong Jhan , Fang-Hui Chan , Jen-Pei Tseng , Yu-Jung Liu , Jiun-Jye Chang
发明人： Wei-Cheng Wu , Kuo-Sen Kung , Chun-Hao Tu , Ren-Hong Jhan , Fang-Hui Chan , Jen-Pei Tseng , Yu-Jung Liu , Jiun-Jye Chang
IPC分类号： H04N13/04 , H04N13/00 , G02B27/22
CPC分类号： H04N13/312 , G02B27/22 , G02B27/2214 , G02B27/2228 , H04N13/00 , H04N13/10 , H04N13/30
摘要： A three-dimensional display device includes a display panel and a barrier structure. The barrier structure is located at one side of the display panel. Besides, the barrier structure includes a plurality of barrier patterns and a plurality of transparent slits. The barrier patterns and the transparent slits are arranged alternately. In particular, the barrier patterns include a photoelectric conversion structure.
摘要翻译：三维显示装置包括显示面板和屏障结构。屏障结构位于显示面板的一侧。此外，阻挡结构包括多个阻挡图案和多个透明狭缝。阻挡图案和透明狭缝交替布置。特别地，阻挡图案包括光电转换结构。

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