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21. 发明申请

US20070260944A1 Decoding LDPC (Low Density Parity Check) code and graphs using multiplication (or addition in log-domain) on both sides of bipartite graph 有权
公开(公告)号：US20070260944A1
公开(公告)日：2007-11-08
申请号：US11807388
申请日：2007-05-29
申请人： Kelly Cameron , Ba-Zhong Shen , Hau Tran
发明人： Kelly Cameron , Ba-Zhong Shen , Hau Tran
IPC分类号： G06K5/04
CPC分类号： H03M13/1125 , H03M13/1111 , H03M13/1117 , H03M13/112 , H03M13/1134 , H03M13/255 , H03M13/6583
摘要： Decoding LDPC (Low Density Parity Check) code and graphs using multiplication (or addition in log-domain) on both sides of bipartite graph. A means for decoding LDPC coded signals is presented whereby edge messages may be updated using only multiplication (or log domain addition). By appropriate modification of the various calculations that need to be performed when updating edge messages, the calculations may be reduced to only performing product of terms functions. When implementing such functionality in hardware within a communication device that is operable to decode LDPC coded signals, this reduction in processing complexity greatly eases the actual hardware's complexity as well. A significant savings in processing resources, memory, memory management concerns, and other performance driving parameters may be made.

22. 发明申请

US20070162818A1 Bandwidth efficient coded modulation scheme based on MLC (multi-level code) signals having multiple maps 有权
标题翻译：基于具有多个映射的MLC（多级代码）信号的带宽高效编码调制方案
公开(公告)号：US20070162818A1
公开(公告)日：2007-07-12
申请号：US11701155
申请日：2007-02-01
申请人： Ba-Zhong Shen , Hau Tran , Kelly Cameron
发明人： Ba-Zhong Shen , Hau Tran , Kelly Cameron
IPC分类号： H03M13/00
CPC分类号： H04L1/005 , H03M5/20 , H03M13/1102 , H03M13/1105 , H03M13/1111 , H03M13/1148 , H03M13/1177 , H03M13/255 , H03M13/256 , H03M13/258 , H03M13/2957 , H03M13/4161 , H03M13/45 , H03M13/6561 , H04L1/0041 , H04L1/0058 , H04L1/006 , H04L1/0071 , H04L27/18 , H04L27/183 , H04L27/186 , H04L27/2053
摘要： Bandwidth efficient coded modulation scheme based on MLC (Multi-Level Code) signals having multiple maps. The use of multiple maps is adapted to various types of coded signals including multi-level LDPC coded modulation signals and other MLC signals to provide for a significant performance gain in the continual effort trying to reach towards Shannon's limit. In the instance of LDPC coded signals, various level LDPC codewords are generated from individual corresponding LDPC encoders. These various level LDPC codewords are arranged into a number of sub-blocks. Encoded bits from multiple level LDPC codewords within each of the sub-blocks are arranged to form symbols that are mapped according to at least two modulations. Each modulation includes a constellation shape and a corresponding mapping. This use of multiple mappings provides for improved performance when compared to encoders that employ only a single mapping.
摘要翻译：基于具有多个映射的MLC（多级代码）信号的带宽高效编码调制方案。多个地图的使用适用于各种类型的编码信号，包括多级LDPC编码调制信号和其他MLC信号，以便在试图达到香农限制的持续努力中提供显着的性能增益。在LDPC编码信号的情况下，从各自对应的LDPC编码器生成各种级别的LDPC码字。这些各种级别的LDPC码字被排列成多个子块。每个子块内的多级LDPC码字的编码比特被排列成根据至少两个调制映射的符号。每个调制包括星座形状和相应的映射。与仅使用单个映射的编码器相比，使用多个映射提供了改进的性能。

23. 发明申请

US20070157062A1 Implementation of LDPC (Low Density Parity Check) decoder by sweeping through sub-matrices 失效
标题翻译：通过扫描子矩阵实现LDPC（低密度奇偶校验）解码器
公开(公告)号：US20070157062A1
公开(公告)日：2007-07-05
申请号：US11360268
申请日：2006-02-23
申请人： Tak Lee , Hau Tran , Ba-Zhong Shen , Kelly Cameron
发明人： Tak Lee , Hau Tran , Ba-Zhong Shen , Kelly Cameron
IPC分类号： H03M13/00
CPC分类号： H03M13/116 , H03M13/1137 , H03M13/255 , H03M13/27 , H03M13/6362 , H03M13/6566
摘要： Implementation of LDPC (Low Density Parity Check) decoder by sweeping through sub-matrices. A novel approach is presented by which an LDPC coded signal is decoded processing the columns and rows of the individual sub-matrices of the low density parity check matrix corresponding to the LDPC code. The low density parity check matrix can partitioned into rows and columns according to each of the sub-matrices of it, and each of those sub-matrices also includes corresponding rows and columns. For example, when performing bit node processing, the same columns of at 1 or more sub-matrices can be processed together (e.g., all 1st columns in 1 or more sub-matrices, all 2nd columns in 1 or more sub-matrices, etc.). Analogously, when performing check node processing, the same rows of 1 or more sub-matrices can be processed together (e.g., all 1st rows in 1 or more sub-matrices, all 2nd rows in 1 or more sub-matrices, etc.).
摘要翻译：通过扫描子矩阵实现LDPC（低密度奇偶校验）解码器。提出了一种解码处理与LDPC码对应的低密度奇偶校验矩阵的各个子矩阵的列和行的LDPC编码信号的新方法。低密度奇偶校验矩阵可以根据它的每个子矩阵划分成行和列，并且这些子矩阵中的每一个也包括相应的行和列。例如，当执行位节点处理时，可以一起处理1个或更多个子矩阵的相同列（例如，1个或更多个子矩阵中的所有1个SUP列，全部2个SUP 1个或更多个子矩阵中的 / nd>列等）。类似地，当执行校验节点处理时，可以一起处理1个或更多个子矩阵的相同行（例如，1个或更多个子矩阵中的所有1 ^{行，全部2个 1个或多个子矩阵中的行等）。}

24. 发明申请

US20070157061A1 Sub-matrix-based implementation of LDPC (Low Density Parity Check ) decoder 失效
标题翻译： LDPC（低密度奇偶校验）解码器的基于子矩阵的实现
公开(公告)号：US20070157061A1
公开(公告)日：2007-07-05
申请号：US11360267
申请日：2006-02-23
申请人： Tak Lee , Hau Tran , Ba-Zhong Shen , Kelly Cameron
发明人： Tak Lee , Hau Tran , Ba-Zhong Shen , Kelly Cameron
IPC分类号： H03M13/00
CPC分类号： H03M13/116 , H03M13/1137 , H03M13/255 , H03M13/27 , H03M13/6362 , H03M13/6566
摘要： Sub-matrix-based implementation of LDPC (Low Density Parity Check) decoder. A novel approach is presented by which an LDPC coded signal is decoded by processing 1 sub-matrix at a time. A low density parity check matrix corresponding to the LDPC code includes rows and columns of sub-matrices. For example, when performing bit node processing, 1 or more sub-matrices in a column are processed; when performing check node processing, 1 or more sub-matrices in a row are processed. If desired, when performing bit node processing, the sub-matrices in each column are successively processed together (e.g., all column 1 sub-matrices, all column 2 sub-matrices, etc.). Analogously, when performing check node processing, the sub-matrices in each row can be successively processed together (e.g., all row 1 sub-matrices, all row 2 sub-matrices in row 2, etc.).
摘要翻译： LDPC（低密度奇偶校验）解码器的基于子矩阵的实现。提出了一种新颖的方法，通过该方法通过一次处理1个子矩阵对LDPC编码信号进行解码。对应于LDPC码的低密度奇偶校验矩阵包括子矩阵的行和列。例如，当执行位节点处理时，处理列中的一个或多个子矩阵; 当执行校验节点处理时，处理一行中的一个或多个子矩阵。如果需要，当执行位节点处理时，每列中的子矩阵被连续处理（例如，所有列1个子矩阵，全部2个子矩阵等）。类似地，当执行校验节点处理时，可以一起连续地处理每行中的子矩阵（例如，所有行1子矩阵，行2中的所有行2子矩阵等）。

25. 发明申请

US20060156169A1 LDPC (Low Density Parity Check) coding and interleaving implemented in MIMO communication systems 有权
标题翻译：在MIMO通信系统中实现的LDPC（低密度奇偶校验）编码和交织
公开(公告)号：US20060156169A1
公开(公告)日：2006-07-13
申请号：US11264998
申请日：2005-11-02
申请人： Ba-Zhong Shen , Christopher Hansen , Joseph Lauer , Kelly Cameron , Tak Lee , Hau Tran
发明人： Ba-Zhong Shen , Christopher Hansen , Joseph Lauer , Kelly Cameron , Tak Lee , Hau Tran
IPC分类号： H03M13/00
CPC分类号： H04L27/2626 , H03M13/1148 , H03M13/116 , H03M13/255 , H03M13/6362 , H04B7/0617 , H04L1/0057 , H04L1/0071 , H04L5/0023 , H04L27/2647 , H04L27/34
摘要： LDPC (Low Density Parity Check) coding and interleaving implemented in multiple-input-multiple-output (MIMO) communication systems. Initially, a novel approach is presented by which a wide variety of irregular LDPC codes may be generated using GRS or RS codes. These irregular LDPC codes can provide better overall performance than regular LDPC codes in terms of providing for lower BER (Bit Error Rate) as a function of SNR (Signal to Noise Ratio). A variety of communication device types are also presented that may employ the error correcting coding using a GRS-based irregular LDPC code, along with appropriately selected interleaving, to provide for even better performance. These communication devices may be implemented to in wireless communication systems including those that comply with the recommendation practices and standards being developed by the IEEE 802.11n Task Group (i.e., the Task Group that is working to develop a standard for 802.11 TGn (High Throughput)).
摘要翻译：在多输入多输出（MIMO）通信系统中实现的LDPC（低密度奇偶校验）编码和交织。最初，提出了一种新颖的方法，通过该方法可以使用GRS或RS代码生成各种不规则的LDPC码。在提供作为SNR（信噪比）的函数的较低BER（误码率）方面，这些不规则LDPC码可以提供比常规LDPC码更好的总体性能。还提出了各种通信设备类型，其可以采用基于GRS的不规则LDPC码的纠错编码以及适当选择的交织，以提供更好的性能。这些通信设备可以被实现在无线通信系统中，包括符合由IEEE 802.11n任务组（即，正在努力制定802.11Gn（高吞吐量）的标准的任务组）开发的推荐做法和标准的通信系统，）。

26. 发明申请

US20050246618A1 Efficient design to implement min**/min**- or max**/max**- functions in LDPC (low density parity check) decoders 失效
标题翻译：高效设计实现LDPC（低密度奇偶校验）解码器中的min ** / min ** - 或max ** / max ** - 函数
公开(公告)号：US20050246618A1
公开(公告)日：2005-11-03
申请号：US11172165
申请日：2005-06-30
申请人： Hau Tran , Kelly Cameron , Ba-Zhong Shen
发明人： Hau Tran , Kelly Cameron , Ba-Zhong Shen
IPC分类号： G06F11/00 , H03M13/00 , H03M13/03 , H03M13/11 , H03M13/45
CPC分类号： H03M13/3911 , H03M13/1111 , H03M13/1117 , H03M13/112 , H03M13/45 , H04L1/005 , H04L1/0057
摘要： Efficient design to implement min**/min**− or max**/max**− functions in LDPC (Low Density Parity Check) decoders. When compared to prior art approaches, the novel and efficient implementation presented herein allows for the use of substantially less hardware and surface area within an actual communication device implemented to perform these calculations. In certain embodiments, the min** processing (and/or max** processing) is implemented to assist in the computationally intensive calculations required to decoded LDPC coded signals. In one instance, this is operable to assist in check node processing when decoding LDPC coded signals. However, the efficient principles and architectures presented herein may be implemented within other communication device types to decode other types of coded signals as well. For example, the processing presented herein may perform calculations within a variety of decoders including LDPC decoders, turbo decoders, TTCM decoders, and/or other decoder types without departing from the scope and spirit of the invention.
摘要翻译：高效设计实现LDPC（低密度奇偶校验）解码器中的min ** / min ** - 或max ** / max ** - 函数。当与现有技术方法相比时，本文提出的新颖且有效的实现允许在实现为执行这些计算的实际通信设备中使用实质上更少的硬件和表面积。在某些实施例中，实现最小**处理（和/或最大**处理）以帮助解码LDPC编码信号所需的计算密集计算。在一种情况下，这可用于在解码LDPC编码信号时辅助校验节点处理。然而，本文呈现的有效原理和架构可以在其他通信设备类型内实现，以解码其他类型的编码信号。例如，在不脱离本发明的范围和精神的情况下，这里呈现的处理可以在包括LDPC解码器，turbo解码器，TTCM解码器和/或其他解码器类型的各种解码器中执行计算。

27. 发明申请

US20050172209A1 Efficient LDPC code decoding with new minus operator in a finite precision radix system 失效
标题翻译：在有限精度基数系统中使用新的减运算符进行高效LDPC码解码
公开(公告)号：US20050172209A1
公开(公告)日：2005-08-04
申请号：US10782142
申请日：2004-02-19
申请人： Kelly Cameron , Hau Tran , Ba-Zhong Shen
发明人： Kelly Cameron , Hau Tran , Ba-Zhong Shen
IPC分类号： H03M13/03 , H03M13/11 , H03M13/25 , H04L1/00
CPC分类号： H04L1/0058 , H03M13/1117 , H03M13/112 , H03M13/1131 , H03M13/1134 , H03M13/255 , H03M13/6583 , H04L1/005
摘要： Efficient LDPC code decoding with new minus operator in a finite precision radix system. A new mathematical operator is introduced and applied to the decoding of LDPC coded signals. This new operator is referred to as the min†− (min-dagger minus) operator herein. This min†− processing is appropriately applied during the updating of the edge messages with respect to the variable nodes. In a bit level decoding approach to decoding LDPC coded signals, the updating of the edge messages with respect to the bit nodes is performed using the new min†− operator. This approach provides very comparable performance to min** processing as also applied to updating of the edge messages with respect to the bit nodes and may also provide for a significant savings in hardware. Also, within finite precision radix systems, the new min†− operator provides a means by which always meaningful results may be achieved during the decoding processing.
摘要翻译：在有限精度基数系统中使用新的减运算符进行高效LDPC码解码。引入新的数学运算符并将其应用于LDPC编码信号的解码。这个新操作符在这里被称为最小† - （最小匕首减号）运算符。在边缘消息相对于可变节点的更新期间，该最小†处理被适当地应用。在解码LDPC编码信号的位电平解码方法中，使用新的最小†运算符执行相对于比特节点的边缘消息的更新。这种方法提供与min **处理非常可比的性能，也适用于相对于位节点的边缘消息的更新，并且还可以显着地节省硬件。此外，在有限精度基数系统中，新的最小运算符提供了一种在解码处理期间可以实现有意义的结果的手段。

28. 发明申请

US20050028071A1 LDPC (Low Density Parity Check) coded modulation hybrid decoding 有权
标题翻译： LDPC（低密度奇偶校验）编码调制混合解码
公开(公告)号：US20050028071A1
公开(公告)日：2005-02-03
申请号：US10723574
申请日：2003-11-26
申请人： Ba-Zhong Shen , Hau Tran , Kelly Cameron
发明人： Ba-Zhong Shen , Hau Tran , Kelly Cameron
IPC分类号： H03M13/11 , H03M13/25 , H04L1/00 , G06F11/00 , H03M13/00
CPC分类号： H04L1/005 , H03M13/1105 , H03M13/255 , H04L1/0058
摘要： LDPC (Low Density Parity Check) coded modulation hybrid decoding. A novel approach is presented wherein a combination of bit decoding and symbol level decoding (e.g., hybrid decoding) is performed for LDPC coded signals. Check node updating and symbol node updating are successively and alternatively performed on bit edge messages for a predetermined number of decoding iterations or until a sufficient degree of precision is achieved. The symbol node updating of the bit edge messages involves using symbol metrics corresponding to the symbol being decoded as well as the bit edge messages most recently updated by check node updating. The check node updating of the bit edge messages involves using the bit edge messages most recently updated by symbol node updating. The symbol node updating also involves computing possible soft symbol estimates for the symbol during each decoding iteration.
摘要翻译： LDPC（低密度奇偶校验）编码调制混合解码。提出了一种新颖的方法，其中对LDPC编码信号执行比特解码和符号级解码（例如混合解码）的组合。对于预定数量的解码迭代，或直到达到足够的精确度，连续替代地对位边消息执行检查节点更新和符号节点更新。位边消息的符号节点更新涉及使用与被解码的符号相对应的符号度量以及最近由校验节点更新更新的位边消息。位边消息的校验节点更新涉及使用最近通过符号节点更新更新的位边消息。符号节点更新还涉及在每次解码迭代期间计算符号的可能的软符号估计。

29. 发明申请

US20050021555A1 Parallel concatenated code with soft-in soft-out interactive turbo decoder 失效
标题翻译：并行级联代码与软入软交互式turbo解码器
公开(公告)号：US20050021555A1
公开(公告)日：2005-01-27
申请号：US10897200
申请日：2004-07-22
申请人： Kelly Cameron , Hau Tran , Ba-Zhong Shen , Christopher Jones
发明人： Kelly Cameron , Hau Tran , Ba-Zhong Shen , Christopher Jones
IPC分类号： H03M13/15 , H03M13/25 , H03M13/27 , H03M13/29 , H03M13/41 , H03M13/45 , H04L1/00 , G06F17/30
CPC分类号： H03M13/3972 , H03M13/151 , H03M13/1515 , H03M13/25 , H03M13/258 , H03M13/27 , H03M13/2757 , H03M13/29 , H03M13/2966 , H03M13/2978 , H03M13/3905 , H03M13/3922 , H03M13/3927 , H03M13/3988 , H03M13/4107 , H03M13/6505 , H03M13/6561 , H04L1/0041 , H04L1/005 , H04L1/006 , H04L1/0065 , H04L1/0066 , H04L1/0068 , H04L1/0071
摘要： A method for parallel concatenated (Turbo) encoding and decoding. Turbo encoders receive a sequence of input data tuples and encode them. The input sequence may correspond to a sequence of an original data source, or to an already coded data sequence such as provided by a Reed-Solomon encoder. A turbo encoder generally comprises two or more encoders separated by one or more interleavers. The input data tuples may be interleaved using a modulo scheme in which the interleaving is according to some method (such as block or random interleaving) with the added stipulation that the input tuples may be interleaved only to interleaved positions having the same modulo−N (where N is an integer) as they have in the input data sequence. If all the input tuples are encoded by all encoders then output tuples can be chosen sequentially from the encoders and no tuples will be missed. If the input tuples comprise multiple bits, the bits may be interleaved independently to interleaved positions having the same modulo−N and the same bit position. This may improve the robustness of the code. A first encoder may have no interleaver or all encoders may have interleavers, whether the input tuple bits are interleaved independently or not. Modulo type interleaving also allows decoding in parallel.
摘要翻译：一种并行级联（Turbo）编码和解码的方法。 Turbo编码器接收一系列输入数据元组并进行编码。输入序列可以对应于原始数据源的序列，或者对应于已由Reed-Solomon编码器提供的已经编码的数据序列。 turbo编码器通常包括由一个或多个交织器分离的两个或更多个编码器。输入数据元组可以使用其中交织根据某些方法（例如块或随机交织）的加法规则进行交织，其中输入元组可以只交织到具有相同模N的交织位置其中N是整数），因为它们在输入数据序列中具有。如果所有的输入元组都是由所有的编码器编码的，那么输出元组可以从编码器顺序选择，也不会丢失元组。如果输入元组包含多个比特，那么这些比特可以与具有相同模N和相同比特位置的交织位置独立交织。这可以提高代码的鲁棒性。第一编码器可以不具有交织器，或者所有编码器可以具有交织器，无论输入元组位是否独立交错。模式类型交织也允许并行解码。

30. 发明申请

US20080065961A1 LDPC (low density parity check) coded modulation symbol decoding 失效
标题翻译： LDPC（低密度奇偶校验）编码调制符号解码
公开(公告)号：US20080065961A1
公开(公告)日：2008-03-13
申请号：US11543956
申请日：2006-10-05
申请人： Ba-Zhong Shen , Hau Tran , Kelly Cameron
发明人： Ba-Zhong Shen , Hau Tran , Kelly Cameron
IPC分类号： H03M13/00
CPC分类号： H04L27/2602 , G11B20/1833 , H03M13/1111 , H03M13/1117 , H03M13/112 , H03M13/25 , H03M13/255 , H03M13/256 , H03M13/258 , H03M13/2957 , H03M13/4161 , H03M13/45 , H03M13/6516 , H03M13/6583 , H04L1/0041 , H04L1/005 , H04L1/0058 , H04L1/006 , H04L1/1671 , H04L27/18
摘要： LDPC (Low Density Parity Check) coded modulation symbol decoding. Symbol decoding is supported by appropriately modifying an LDPC tripartite graph to eliminate the bit nodes thereby generating an LDPC bipartite graph (such that symbol nodes are appropriately mapped directly to check nodes thereby obviating the bit nodes). The edges that communicatively couple the symbol nodes to the check nodes are labeled appropriately to support symbol decoding of the LDPC coded modulation signal. The iterative decoding processing may involve updating the check nodes as well as estimating the symbol sequence and updating the symbol nodes. In some embodiments, an alternative hybrid decoding approach may be performed such that a combination of bit level and symbol level decoding is performed. This LDPC symbol decoding out-performs bit decoding only. In addition, it provides comparable or better performance of bit decoding involving iterative updating of the associated metrics.
摘要翻译： LDPC（低密度奇偶校验）编码调制符号解码。通过适当地修改LDPC三部分图来消除比特节点从而生成LDPC二分图（使得符号节点被适当地映射到校验节点从而消除比特节点）来支持符号解码。将符号节点通信地耦合到校验节点的边缘被适当地标记以支持LDPC编码调制信号的符号解码。迭代解码处理可以包括更新校验节点以及估计符号序列和更新符号节点。在一些实施例中，可以执行替代的混合解码方法，使得执行位电平和符号电平解码的组合。该LDPC码解码仅执行比特解码。此外，它提供可比较或更好的比特解码性能，涉及相关度量的迭代更新。

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