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    • 1. 发明申请
    • LDPC (low density parity check) coded modulation hybrid decoding
    • LDPC(低密度奇偶校验)编码调制混合解码
    • US20080005650A1
    • 2008-01-03
    • US11701156
    • 2007-02-01
    • Ba-Zhong ShenHau TranKelly Cameron
    • Ba-Zhong ShenHau TranKelly Cameron
    • G06F11/00
    • H04L1/005H03M13/1105H03M13/255H04L1/0058
    • LDPC (Low Density Parity Check) coded modulation hybrid decoding. A novel approach is presented wherein a combination of bit decoding and symbol level decoding (e.g., hybrid decoding) is performed for LDPC coded signals. Check node updating and symbol node updating are successively and alternatively performed on bit edge messages for a predetermined number of decoding iterations or until a sufficient degree of precision is achieved. The symbol node updating of the bit edge messages involves using symbol metrics corresponding to the symbol being decoded as well as the bit edge messages most recently updated by check node updating. The check node updating of the bit edge messages involves using the bit edge messages most recently updated by symbol node updating. The symbol node updating also involves computing possible soft symbol estimates for the symbol during each decoding iteration.
    • LDPC(低密度奇偶校验)编码调制混合解码。 提出了一种新颖的方法,其中对LDPC编码信号执行比特解码和符号级解码(例如混合解码)的组合。 对于预定数量的解码迭代,或直到达到足够的精确度,连续替代地对位边消息执行检查节点更新和符号节点更新。 位边消息的符号节点更新涉及使用与被解码的符号相对应的符号度量以及最近由校验节点更新更新的位边消息。 位边消息的校验节点更新涉及使用最近通过符号节点更新更新的位边消息。 符号节点更新还涉及在每次解码迭代期间计算符号的可能的软符号估计。
    • 2. 发明申请
    • Short length LDPC (Low Density Parity Check) code and modulation adapted for high speed Ethernet applications
    • 适用于高速以太网应用的短长度LDPC(低密度奇偶校验)码和调制
    • US20060041821A1
    • 2006-02-23
    • US11190657
    • 2005-07-27
    • Ba-Zhong ShenKelly CameronHau TranScott Powell
    • Ba-Zhong ShenKelly CameronHau TranScott Powell
    • H03M13/00
    • H04L27/04H03M13/118H03M13/255H04L25/4917H04L27/3416
    • A short length LDPC (Low Density Parity Check) code and modulation adapted for high speed Ethernet applications. In some instances, the short length-LDPC code and modulation may be employed within the recommended practices currently being developed by the IEEE 802.3an (10GBASE-T) Task Force. The IEEE 802.3an (10GBASE-T) Task Force has been commissioned to develop and standardize communications protocol adapted particularly for Ethernet operation over 4 wire twisted pair cables. A new LDPC code, some possible embodiments of constellations and the corresponding mappings, as well as possible embodiments of various parity check matrices, H, of the LDPC code are presented herein to provide for better overall performance than other proposed LDPC codes existent in the art of high speed Ethernet applications. Moreover, this proposed LDPC code may be decoded using a communication device having much less complexity than required to decode other proposed LDPC codes existent in this technology space.
    • 适用于高速以太网应用的短长度LDPC(低密度奇偶校验)码和调制。 在一些情况下,可以在IEEE 802.3an(10GBASE-T)工作组当前正在开发的推荐做法中采用短长度LDPC码和调制。 IEEE 802.3an(10GBASE-T)工作组已委托开发和标准化通信协议,特别适用于通过4线双绞线电缆进行以太网操作。 本文中呈现了新的LDPC码,星座的一些可能的实施例和对应的映射以及LDPC码的各种奇偶校验矩阵H的可能实施例,以提供比本领域中存在的其它提出的LDPC码更好的总体性能 的高速以太网应用。 此外,该提出的LDPC码可以使用比在该技术空间中存在的其它提出的LDPC码要求更低的复杂度的通信设备进行解码。
    • 3. 发明申请
    • Efficient front end memory arrangement to support parallel bit node and check node processing in LDPC (Low Density Parity Check) decoders
    • 有效的前端存储器布置支持LDPC(低密度奇偶校验)解码器中的并行比特节点和校验节点处理
    • US20050262421A1
    • 2005-11-24
    • US11171727
    • 2005-06-30
    • Hau TranKelly CameronBa-Zhong Shen
    • Hau TranKelly CameronBa-Zhong Shen
    • H03M13/00H03M13/11
    • H03M13/6563H03M13/1137H03M13/1165
    • Efficient front end memory arrangement to support parallel bit node and check node processing in LDPC (Low Density Parity Check) decoders. A novel approach is presented by which the front end design of device capable to decode LDPC coded signals facilitates parallel decoding processing of the LDPC coded signal. The implementation of the front end memory management in conjunction with the implementation of a metric generator operate cooperatively lend themselves for very efficient parallel decoding processing of LDPC coded signals. There are several embodiments by which the front end memory management and the metric generator may be implemented to facilitate this parallel decoding processing of LDPC coded signals. This also allows for the decoding of variable code rate and/or variable modulation signals whose code rate and/or modulation varies as frequently as on a block by block basis (e.g., a block may include a group of symbols within a frame).
    • 有效的前端存储器布置支持LDPC(低密度奇偶校验)解码器中的并行比特节点和校验节点处理。 提出了一种能够对LDPC编码信号进行解码的装置的前端设计有助于LDPC编码信号的并行解码处理的新颖方法。 结合执行度量发生器的前端存储器管理的实现协同地借助于LDPC编码信号的非常有效的并行解码处理。 存在可以实现前端存储器管理和度量生成器以促进LDPC编码信号的这种并行解码处理的几个实施例。 这也允许解码可变码率和/或可变调制信号,其码率和/或调制随着逐个块的频率而变化(例如,一个块可以包括帧内的符号组)。
    • 8. 发明申请
    • Amplifying magnitude metric of received signals during iterative decoding of LDPC (Low Density Parity Check) code and LDPC coded modulation
    • 在LDPC(低密度奇偶校验)码和LDPC编码调制的迭代解码期间,放大接收信号的幅度度量
    • US20060107179A1
    • 2006-05-18
    • US11190334
    • 2005-07-27
    • Ba-Zhong ShenKelly CameronScott PowellHau Tran
    • Ba-Zhong ShenKelly CameronScott PowellHau Tran
    • H03M13/00
    • H03M13/658H03M13/1111
    • Amplifying magnitude metric of received signals during iterative decoding of LDPC code and LDPC coded modulation. By appropriately selecting a metric coefficient value that is used to calculate the initial conditions when decoding LDPC coded signals, a significant reduction in BER may be achieved at certain SNRs. The appropriate selection of the metric coefficient value may be performed depending on the particular SNR at which a communication system is operating. By adjusting this metric coefficient value according to the given LDPC code, modulation, and noise variance, the overall performance of the decoding may be significantly improved. The convergence speed is slowed down so that the decoder will not go to the wrong codeword, and the moving range of the outputs of the decoder is restricted so that the output will not oscillate too much and will eventually move to the correct codeword.
    • 在LDPC码和LDPC编码调制的迭代解码期间放大接收信号的幅度度量。 通过在解码LDPC编码信号时适当地选择用于计算初始条件的度量系数值,可以在某些SNR下实现BER的显着降低。 可以根据通信系统正在操作的特定SNR来执行度量系数值的适当选择。 通过根据给定的LDPC码,调制和噪声方差调整该度量系数值,可以显着提高解码的整体性能。 收敛速度变慢,因此解码器不会进入错误的码字,解码器的输出的移动范围受到限制,使得输出不会振荡太多,最终会移动到正确的码字。