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21. 发明授权

US06348356B1 Method and apparatus for determining the robustness of memory cells to alpha-particle/cosmic ray induced soft errors 有权
标题翻译：用于确定存储器细胞对α粒子/宇宙射线引起的软错误的鲁棒性的方法和装置
公开(公告)号：US06348356B1
公开(公告)日：2002-02-19
申请号：US09664636
申请日：2000-09-19
申请人： Sunil Narayan Shabde , Richard C. Blish, II , Donald L. Wollesen
发明人： Sunil Narayan Shabde , Richard C. Blish, II , Donald L. Wollesen
IPC分类号： G01R3126
CPC分类号： G11C29/028 , G11C11/401 , G11C11/41 , G11C29/50 , G11C2029/5002 , G11C2029/5006
摘要： Method for determining the robustness of a device to soft errors generated by alpha-particle and/or cosmic ray strikes. In one embodiment, the method includes the steps of estimating energies of the alpha-particle and/or cosmic ray strikes; computing a number of electron-hole pairs generated for a predetermined distance of travel by the alpha-particle and/or cosmic ray into the device based on the estimated energies; computing the absorption coefficient in silicon for a light pulse with a predetermined wavelength; computing a first pulse width/intensity for the light pulse to generate the number of electron-hole pairs for the predetermined distance of travel by the light pulse into the device; producing the light pulse, the light pulse having a light pulse energy which is controlled by a pulse width and an intensity, wherein the pulse width/intensity is at a second pulse width/intensity which is less than the first pulse width/intensity and the light pulse energy is at a first light pulse energy which is low enough to avoid generating soft errors in the device; applying the light pulse to the device at a predetermined location; varying the light pulse energy to a second light pulse energy to generate a soft error; and detecting soft errors in the device. The present invention additionally provides an inexpensive method that would accurately simulate an alpha-particle and/or cosmic ray strike in predetermined areas of a memory cell.
摘要翻译：用于确定器件对由α粒子和/或宇宙射线撞击产生的软误差的鲁棒性的方法。在一个实施例中，该方法包括估计α粒子和/或宇宙射线撞击的能量的步骤; 基于所估计的能量，将通过α粒子和/或宇宙射线产生的预定距离的电子 - 空穴对计算到所述装置中; 计算具有预定波长的光脉冲的硅中的吸收系数; 计算所述光脉冲的第一脉冲宽度/强度，以通过所述光脉冲将所述预定距离的电子 - 空穴对的数量产生到所述装置中; 产生光脉冲，该光脉冲具有由脉冲宽度和强度控制的光脉冲能量，其中脉冲宽度/强度处于小于第一脉冲宽度/强度的第二脉冲宽度/强度，并且光脉冲能量处于第一光脉冲能量，其足够低以避免在装置中产生软误差; 在预定位置将光脉冲施加到设备; 将光脉冲能量改变为第二光脉冲能量以产生软误差; 并检测设备中的软错误。本发明另外提供了一种廉价的方法，其可以精确地模拟存储器单元的预定区域中的α粒子和/或宇宙射线的撞击。

22. 发明授权

US6119325A High pressure water stream to separate a multi-layer integrated circuit device and package 失效
标题翻译：高压水流分离多层集成电路器件和封装
公开(公告)号：US6119325A
公开(公告)日：2000-09-19
申请号：US199889
申请日：1998-11-24
申请人： J. Courtney Black , Richard C. Blish, II
发明人： J. Courtney Black , Richard C. Blish, II
IPC分类号： H01L21/60 , H01L21/44
CPC分类号： H01L24/81 , H01L2224/81801 , H01L2924/01005 , H01L2924/01033 , H01L2924/014 , H01L2924/14 , Y10T29/49815 , Y10T29/49821 , Y10T29/49822 , Y10T29/53274
摘要： Aspects for device and package separation of a multi-layer integrated circuit device attached at a frontside to an integrated circuit package are described. In an exemplary method aspect, the method includes slicing through material coupling the multi-layer integrated circuit to the integrated circuit package with a high power water stream. The slicing further includes cutting through solder bump material. Additionally, the multi-layer integrated circuit device is utilized for device analysis from a frontside following separation from the integrated circuit package by the step of slicing.
摘要翻译：描述了在前端附接到集成电路封装的多层集成电路器件的器件和封装分离的方面。在示例性方法方面，该方法包括将具有多功能水流的多层集成电路耦合到集成电路封装的材料切片。切片还包括切割焊料凸块材料。此外，多层集成电路器件用于通过切片步骤从分离集成电路封装之后的正面进行器件分析。

23. 发明授权

US5914873A Distributed voltage converter apparatus and method for high power microprocessor with array connections 失效
标题翻译：具有阵列连接的大功率微处理器的分布式电压转换装置和方法
公开(公告)号：US5914873A
公开(公告)日：1999-06-22
申请号：US885677
申请日：1997-06-30
申请人： Richard C. Blish, II
发明人： Richard C. Blish, II
IPC分类号： G06F1/26 , H02M1/14
CPC分类号： G06F1/26
摘要： The present invention provides a relief to the low voltage, high current spiral trend being seen in the microprocessor industry. A microprocessor module is designed to receive a voltage V2, which is substantially higher than a logic gate utilization voltage V3. V2 is supplied at a current rating of I2 to a plurality of within-module voltage converters, designated as 220a, 220n, which directly distribute voltage V3 and the appropriate current portion I3 to the respective logic gates 210. Preferably, voltage V2 is substantially greater in magnitude than voltage V3, typically V2:V3 being at least 5:1 but preferably 40:1 to as much as 100:1. By example, V2=50 vdc, 12=3 amps and V3=1.0 vdc would satisfy the ratio considerations. The microprocessor loads serviced by the present invention constitute millions of logic gates requiring low voltages ranging from 0.75 Vdc to 1.5 Vdc. Other microprocessor loads, such as cache, can be powered with flip chip technology using the technique of the present invention. A selected number of microprocessor logic gates, designated as numeral 210, are powered through electrical interconnections 205 (bumps), from respective voltage converters 220a . . . 220n. Each voltage converter includes power conversion components, namely a pre-regulator pulse width modulator controller circuit 223, a thin film transformer 221, and output voltage regulator circuit 222 embedded in deep wells of substrate 230.
摘要翻译：本发明提供了在微处理器行业中看到的低电压，大电流螺旋趋势的解决方案。微处理器模块设计成接收电压V2，其大大高于逻辑门利用电压V3。 V2以电流额定值I2提供给多个模块内电压转换器，称为220a，220n，它们将电压V3和适当的电流部分I3直接分配到相应的逻辑门210。优选地，电压V2大大地在电压V3的范围内，通常V2：V3至少为5:1，但优选为40:1至多达100:1。例如，V2 = 50vdc，12 = 3安培和V3 = 1.0vdc将满足比率考虑。由本发明提供的微处理器负载构成了数百万个逻辑门，其需要0.75V至1.5Vdc范围内的低电压。其他微处理器负载，如高速缓存，可使用本发明技术的倒装芯片技术来供电。指定为数字210的选定数量的微处理器逻辑门通过来自各个电压转换器220a的电互连205（凸起）供电。。。 220n。每个电压转换器包括功率转换组件，即预调节器脉宽调制器控制器电路223，薄膜变压器221和嵌入在衬底230的深阱中的输出稳压器电路222。

24. 发明授权

US5489801A Quad flat package heat slug composition 失效
公开(公告)号：US5489801A
公开(公告)日：1996-02-06
申请号：US371894
申请日：1995-01-12
申请人： Richard C. Blish, II
发明人： Richard C. Blish, II
IPC分类号： H01L23/29 , H01L23/433 , H01L23/495 , H01L23/28
CPC分类号： H01L23/4334 , H01L23/295 , H01L2924/0002 , Y10T29/49121
摘要： An integrated circuit package which contains a heat slug that extends from an integrated circuit to a top surface of a surrounding housing. The heat slug has a coefficient of thermal expansion that matches the coefficients of thermal expansion of the housing and the integrated circuit to reduce thermal stresses in the package.

25. 发明授权

US5397746A Quad flat package heat slug composition 失效
标题翻译：四扁平包装热块组成
公开(公告)号：US5397746A
公开(公告)日：1995-03-14
申请号：US147144
申请日：1993-11-03
申请人： Richard C. Blish, II
发明人： Richard C. Blish, II
IPC分类号： H01L23/29 , H01L23/433 , H01L21/60
CPC分类号： H01L23/4334 , H01L23/295 , H01L2924/0002 , Y10T29/49121
摘要： An integrated circuit package which contains a heat slug that extends from an integrated circuit to a top surface of a surrounding housing. The heat slug has a coefficient of thermal expansion that matches the coefficients of thermal expansion of the housing and the integrated circuit to reduce thermal stresses in the package.
摘要翻译：一种集成电路封装，其包含从集成电路延伸到周围壳体的顶表面的散热片。热段具有与壳体和集成电路的热膨胀系数匹配的热膨胀系数，以减少封装中的热应力。

26. 发明授权

US4213818A Selective plasma vapor etching process 失效
标题翻译：选择性等离子体蒸气蚀刻工艺
公开(公告)号：US4213818A
公开(公告)日：1980-07-22
申请号：US1039
申请日：1979-01-04
申请人： Kyle E. Lemons , Richard C. Blish, II , Jan D. Reimer
发明人： Kyle E. Lemons , Richard C. Blish, II , Jan D. Reimer
IPC分类号： H01L21/3065 , H01L21/311 , H01L21/306 , C23F1/02
CPC分类号： H01L21/31116 , H01L21/3065 , H01L21/31138
摘要： Selective plasma vapor etching process for performing operations on a solid body formed of at least two different materials capable of being vapor etched exposed at, at least, one surface of the body, with the body being disposed in a chamber having a partial vacuum therein. A gas plasma is created within the chamber to produce active species of atoms and molecules so that these species come into contact with the surface of the body to chemically react at least one of the materials with active species from the gas plasma to form a gas-non-gaseous chemical reaction by controlling the concentration and reaction kinetics of specific species, and by controlling the activation energy of the etching reactions to produce a difference in rates between the materials so that the etching is more selective to one material over the other. The species is also controlled by the frequency of the electromagnetic energy.
摘要翻译：选择性等离子体蒸汽蚀刻工艺，用于对由至少两种不同材料形成的固体进行操作，所述至少两种不同的材料能够在主体的至少一个表面处被暴露于所述主体的至少一个表面，其中所述主体设置在其中具有部分真空的腔室中。在室内产生气体等离子体以产生原子和分子的活性物质，使得这些物质与身体的表面接触以使来自气体等离子体的活性物质中的至少一种材料与至少一种物质发生化学反应，通过控制特定物质的浓度和反应动力学，以及通过控制蚀刻反应的活化能以产生材料之间的速率差，使得蚀刻对另一种材料的选择性更高，从而实现非气态化学反应。该物种也受电磁能量的频率控制。

27. 发明授权

US4040897A Etchants for glass films on metal substrates 失效
标题翻译：用于金属基底上玻璃膜的蚀刻剂
公开(公告)号：US4040897A
公开(公告)日：1977-08-09
申请号：US740546
申请日：1976-11-10
申请人： Richard C. Blish, II , Kyle Eugene Lemons
发明人： Richard C. Blish, II , Kyle Eugene Lemons
IPC分类号： C03C15/00 , H01L21/311 , H01L21/312
CPC分类号： C03C15/00 , H01L21/31111
摘要： An aqueous solution for etching a glass layer on a metal (aluminum) substrate without substantial attack on the metal. The solution comprises buffered hydrofluoric acid, sodium chloride, and either (a) a fluorocarbon surfactant capable of forming a protective thin film upon the aluminum, or (b) a 6-hydroxy alcohol (e.g., mannitol or sorbitol).
摘要翻译：用于在金属（铝）衬底上蚀刻玻璃层而不对金属造成实质性冲击的水溶液。溶液包括缓冲氢氟酸，氯化钠和（a）能够在铝上形成保护性薄膜的碳氟表面活性剂，或（b）6-羟基醇（例如甘露糖醇或山梨糖醇）。

28. 发明授权

US07561465B2 Methods and systems for recovering data in a nonvolatile memory array 有权
标题翻译：用于在非易失性存储器阵列中恢复数据的方法和系统
公开(公告)号：US07561465B2
公开(公告)日：2009-07-14
申请号：US11724774
申请日：2007-03-16
申请人： Bryan William Hancock , Nicholas H. Tripsas , Richard C. Blish, II
发明人： Bryan William Hancock , Nicholas H. Tripsas , Richard C. Blish, II
IPC分类号： G11C16/06
CPC分类号： G11C16/3404 , G11C11/5671 , G11C16/3418 , G11C16/3422 , G11C16/3431 , G11C2029/0411
摘要： One embodiment of the invention relates to a method for refreshing a nonvolatile memory array. In the method, a threshold voltage of a multi-bit memory cell is analyzed to determine if it has drifted outside of a number of allowable voltage windows, wherein each allowable voltage windows corresponds to a different multi-bit value. If the threshold voltage of the cell has drifted outside of the number of allowable voltage states, then the cell is recovered by adjusting at least one voltage boundary of at least one of the number of allowable voltage states.
摘要翻译：本发明的一个实施例涉及一种用于刷新非易失性存储器阵列的方法。在该方法中，分析多位存储单元的阈值电压以确定其是否漂移在许多允许电压窗口之外，其中每个可允许电压窗对应于不同的多位值。如果电池的阈值电压漂移在容许电压状态数之外，则通过调节至少一个容许电压状态数量的至少一个电压边界来恢复电池。

29. 发明授权

US07460369B1 Counterflow microchannel cooler for integrated circuits 有权
标题翻译：用于集成电路的逆流微通道冷却器
公开(公告)号：US07460369B1
公开(公告)日：2008-12-02
申请号：US11756749
申请日：2007-06-01
申请人： Richard C. Blish, II
发明人： Richard C. Blish, II
IPC分类号： H05K7/20
CPC分类号： F28F7/02 , F28F2260/02 , H01L23/473 , H01L2224/16 , H01L2224/73204 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/1461 , H01L2924/15312 , H01L2924/16152 , Y10T29/49124 , H01L2924/00 , H01L2224/0401
摘要： A plurality of channels are formed in a base, e.g., a substrate of an integrated circuit, each channel extending between edges of the base. Two pairs of manifolds are provided, the first pair communicating with a first group of channels and the second pair communicating with a second group of channels, the first group of channels and the first pair of plena isolated from the second group of channels and the second pair of plena. Each of the pairs of manifolds includes multiple branches coupled to the channels and a common plenum. Cooling fluid is injected into the channels from different sides of the base, causing fluid to flow in different directions in the two groups of channels, the channels in thermal contact with the integrated circuit.
摘要翻译：在基座（例如集成电路的基板）中形成多个通道，每个通道在基座的边缘之间延伸。提供两对歧管，第一对与第一组通道通信，第二对与第二组通道通信，第一组通道和第一对通道与第二组通道隔离，第二组通道与第二组通道隔离，一对斑马。每对歧管包括耦合到通道和共同气室的多个分支。冷却液从基座的不同侧注入通道，导致流体沿两组通道不同方向流动，通道与集成电路热接触。

30. 发明授权

US06751294B1 Prevention of parametic or functional changes to silicon semiconductor device properties during x-ray inspection 有权
标题翻译：在x射线检查期间防止硅半导体器件性质的参数或功能变化
公开(公告)号：US06751294B1
公开(公告)日：2004-06-15
申请号：US10215075
申请日：2002-08-08
申请人： Richard C. Blish II , Susan Xia Li , David S. Lehtonen , J. Courtney Black , Don C. Darling
发明人： Richard C. Blish II , Susan Xia Li , David S. Lehtonen , J. Courtney Black , Don C. Darling
IPC分类号： G21K300
CPC分类号： G21K1/10 , G01N23/04 , G21K5/04
摘要： An apparatus for x-raying a semiconductor device which includes semiconductor material and conductive material, the apparatus including a source of x-rays, a filter for receiving x-rays from the source of x-rays and allowing transmission of x-rays to the device, the filter having an atomic number greater than the atomic number of the conductive material of the device, and an x-ray imager for receiving x-rays from the device.
摘要翻译：一种用于对包括半导体材料和导电材料的半导体器件进行x射线的装置，该装置包括x射线源，用于从X射线源接收x射线并允许x射线向器件，具有大于器件的导电材料的原子序数的原子序数的滤光器和用于从器件接收x射线的x射线成像器。

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